IRF620S, SiHF620S Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Halogen-free According to IEC 61249-2-21 Definition • Surface Mount • Available in Tape and Reel • Dynamic dV/dt Rating • Repetitive Avalanche Rated • Fast Switching • Simple Drive Requirements • Ease of Paralleling • Compliant to RoHS Directive 2002/95/EC 200 RDS(on) () VGS = 10 V 0.80 Qg (Max.) (nC) 14 Qgs (nC) 3.0 Qgd (nC) 7.9 Configuration Single D D2PAK DESCRIPTION (TO-263) Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The D2PAK (TO-263) is a surface mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK (TO-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. G G D S S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free D2PAK (TO-263) SiHF620S-GE3 IRF620SPbF SiHF620S-E3 D2PAK (TO-263) SiHF620STRL-GE3a IRF620STRLPbFa SiHF620STL-E3a D2PAK (TO-263) SiHF620STRR-GE3a IRF620STRRPbFa SiHF620STR-E3a Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Linear Derating Factor (PCB Mount)e Single Pulse Avalanche Energyb Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Maximum Power Dissipation (PCB Mount)e Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) SYMBOL VDS VGS VGS at 10 V TC = 25 °C TC = 100 °C ID IDM EAS IAR EAR TC = 25 °C TA = 25 °C PD dV/dt TJ, Tstg for 10 s LIMIT 200 ± 20 5.2 3.3 18 0.40 0.025 110 5.2 5.0 50 3.0 5.0 - 55 to + 150 300d UNIT V A W/°C mJ A mJ W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 6.1 mH, Rg = 25 , IAS = 5.2 A (see fig. 12). c. ISD 5.2 A, dI/dt 95 A/μs, VDD VDS, TJ 150 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91028 S11-1046-Rev. D, 30-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF620S, SiHF620S Vishay Siliconix THERMAL RESISTANCE RATINGS SYMBOL TYP. MAX. Maximum Junction-to-Ambient PARAMETER RthJA - 62 Maximum Junction-to-Ambient (PCB Mount)a RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 2.5 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage VDS VGS = 0, ID = 250 μA 200 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.29 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 200 V, VGS = 0 V - - 25 VDS = 160 V, VGS = 0 V, TJ = 125 °C - - 250 Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs ID = 3.1 Ab VGS = 10 V VDS = 50 V, ID = 3.1 Ab μA - - 0.80 1.5 - - S - 260 - - 100 - - 30 - - - 14 Dynamic Input Capacitance Ciss Output Capacitance Coss VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs - - 3.0 Gate-Drain Charge Qgd - - 7.9 Turn-On Delay Time td(on) - 7.2 - tr - 22 - - 19 - - 13 - - 4.5 - - 7.5 - - - 5.2 - - 18 Rise Time Turn-Off Delay Time Fall Time td(off) VGS = 10 V ID = 4.8 A, VDS = 160 V, see fig. 6 and 13b VDD = 100 V, ID = 4.8 A, Rg = 18 , RD = 20 , see fig. 10b tf pF nC ns Dynamic Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact D nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 5.2 A, VGS = 0 Vb TJ = 25 °C, IF = 4.8 A, dI/dt = 100 A/μsb - - 1.8 V - 150 300 ns - 0.91 1.8 μC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. www.vishay.com 2 Document Number: 91028 S11-1046-Rev. D, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF620S, SiHF620S Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 101 100 4.5 V 10-1 ID, Drain Current (A) ID, Drain Current (A) 101 Top 150 °C 100 25 °C 10-1 10-2 10-2 20 µs Pulse Width TC = 25 °C 10-1 100 101 4 VDS, Drain-to-Source Voltage (V) 91028_01 20 µs Pulse Width VDS = 50 V 4.5 V 10-1 10-2 91028_02 20 µs Pulse Width TC = 150 °C 10-1 100 101 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TC = 150 °C Document Number: 91028 S11-1046-Rev. D, 30-May-11 7 8 9 10 Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain Current (A) 100 VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 6 VGS, Gate-to-Source Voltage (V) 91028_03 Fig. 1 - Typical Output Characteristics, TC = 25 °C 101 5 3.0 2.5 ID = 4.8 A VGS = 10 V 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 91028_04 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF620S, SiHF620S 750 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Capacitance (pF) 600 450 Ciss 300 Coss 150 Crss ISD, Reverse Drain Current (A) Vishay Siliconix 101 150 °C 25 °C 100 VGS = 0 V 0 100 101 0.5 VDS, Drain-to-Source Voltage (V) 91028_05 91028_07 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 102 ID = 4.8 A VDS = 100 V VDS = 40 V 12 8 2 10 µs 10 100 µs 5 1 ms 2 1 10 ms 5 4 For test circuit see figure 13 0 0 91028_06 3 6 9 12 Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 TC = 25 °C TJ = 150 °C Single Pulse 2 0.1 0.1 15 QG, Total Gate Charge (nC) 1.5 1.3 Operation in this area limited by RDS(on) 5 VDS = 160 V 16 1.0 Fig. 7 - Typical Source-Drain Diode Forward Voltage ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 20 0.8 VSD, Source-to-Drain Voltage (V) 91028_08 2 5 1 2 5 10 2 5 102 2 5 103 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91028 S11-1046-Rev. D, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF620S, SiHF620S Vishay Siliconix RD VDS 6.0 VGS 5.0 ID, Drain Current (A) D.U.T. Rg 4.0 + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 3.0 2.0 Fig. 10a - Switching Time Test Circuit 1.0 VDS 90 % 0.0 25 50 75 100 125 150 TC, Case Temperature (°C) 91028_09 10 % VGS Fig. 9 - Maximum Drain Current vs. Case Temperature td(on) td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 1 0 − 0.5 0.2 PDM 0.1 0.05 0.1 t1 0.02 0.01 Single Pulse (Thermal Response) t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-2 10-5 91028_11 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91028 S11-1046-Rev. D, 30-May-11 www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF620S, SiHF620S Vishay Siliconix L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T Rg + - I AS V DD VDS 10 V 0.01 Ω tp IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Energy (mJ) 300 ID 2.3 A 3.3 A Bottom 5.2 A Top 250 200 150 100 50 0 VDD = 50 V 25 91028_12c 50 75 100 125 150 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91028 S11-1046-Rev. D, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF620S, SiHF620S Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91028. Document Number: 91028 S11-1046-Rev. D, 30-May-11 www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000