IRF624S, SiHF624S Datasheet

IRF624S, SiHF624S
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount
• Available in Tape and Reel
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• Fast Switching
• Ease of Paralleling
• Simple Drive Requirements
• Compliant to RoHS Directive 2002/95/EC
250
RDS(on) ()
VGS = 10 V
1.1
Qg (Max.) (nC)
14
Qgs (nC)
2.7
Qgd (nC)
7.8
Configuration
Single
D
DESCRIPTION
D2PAK (TO-263)
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D2PAK (TO-263) is a surface mount power package
capable of accommodating die sizes up to HEX-4. It
provides the highest power capability and the lowest
possible on-resistance in any existing surface mount
package. The D2PAK (TO-263) is suitable for high current
applications because of its low internal connection
resistance and can dissipate up to 2.0 W in a typical surface
mount application.
G
G D
S
S
N-Channel MOSFET
ORDERING INFORMATION
D2PAK (TO-263)
SiHF624S-GE3
IRF624SPbF
SiHF624S-E3
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Currenta
Linear Derating Factor
Linear Derating Factor (PCB Mount)e
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
Maximum Power Dissipation (PCB Mount)e
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
SYMBOL
VDS
VGS
VGS at 10 V
TC = 25 °C
TC = 100 °C
ID
IDM
EAS
IAR
EAR
TC = 25 °C
TA = 25 °C
PD
dV/dt
TJ, Tstg
for 10 s
LIMIT
250
± 20
4.4
2.8
14
0.40
0.025
100
4.4
5.0
50
3.1
4.8
- 55 to + 150
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 8.3 mH, Rg = 25 , IAS = 4.4 A (see fig. 12).
c. ISD  4.4 A, dI/dt  90 A/μs, VDD  VDS, TJ  150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91030
S11-1047-Rev. C, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF624S, SiHF624S
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
Maximum Junction-to-Ambient
(PCB Mount)a
RthJA
-
-
40
Maximum Junction-to-Ambient
RthJA
-
-
62
Maximum Junction-to-Case (Drain)
RthJC
-
-
2.5
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
VDS
VGS = 0, ID = 250 μA
250
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.36
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
nA
VGS = ± 20 V
-
-
± 100
VDS = 250 V, VGS = 0 V
-
-
25
VDS = 200V, VGS = 0 V, TJ = 125 °C
-
-
250
IGSS
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
IDSS
RDS(on)
gfs
ID = 2.6 Ab
VGS = 10 V
VDS = 50 V, ID = 2.6 Ab
μA
-
-
1.1

1.5
-
-
S
-
260
-
-
77
-
-
15
-
-
-
14
-
-
2.7
-
-
7.8
-
7.0
-
-
13
-
-
20
-
-
12
-
-
4.5
-
-
7.5
-
-
-
4.4
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Rise Time
tr
Turn-Off Delay Time
td(off)
Fall Time
tf
Internal Drain Inductance
LD
Internal Source Inductance
LS
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
VGS = 10 V
ID = 4.4 A, VDS = 200 V
see fig. 6 and 13b
VDD = 125 V, ID = 4.4 A
Rg = 18 , RD= 28 
see fig. 10b
Between lead,
6 mm (0.25") from
package and center of
die contact
D
pF
nC
ns
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Currenta
IS
D
A
G
S
-
-
14
VSD
TJ = 25 °C, IS = 4.4 A, VGS = 0 Vb
-
-
1.8
V
Body Diode Reverse Recovery Time
trr
-
200
400
ns
Body Diode Reverse Recovery Charge
Qrr
TJ = 25 °C, IF = 4.4 A,
dI/dt = 100 A/μsb
-
0.93
1.9
μC
Forward Turn-On Time
ton
Body Diode Voltage
ISM
MOSFET symbol
showing the
integral reverse
p - n junction diode
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
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Document Number: 91030
S11-1047-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF624S, SiHF624S
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
101
Top
4.5 V
10-1
ID, Drain Current (A)
ID, Drain Current (A)
101
150 °C
100
25 °C
10-1
20 µs Pulse Width
TC = 25 °C
100
10-1
101
4
VDS, Drain-to-Source Voltage (V)
91030_01
20 µs Pulse Width
VDS = 50 V
4.5 V
10-1
20 µs Pulse Width
TC = 150 °C
100
10-1
91030_02
101
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Document Number: 91030
S11-1047-Rev. C, 30-May-11
7
8
9
10
Fig. 3 - Typical Transfer Characteristics
RDS(on), Drain-to-Source On Resistance
(Normalized)
ID, Drain Current (A)
100
VGS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
6
VGS, Gate-to-Source Voltage (V)
91030_03
Fig. 1 - Typical Output Characteristics, TC = 25 °C
101
5
91030_04
3.0
2.5
ID = 4.4 A
VGS = 10 V
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF624S, SiHF624S
Vishay Siliconix
600
Capacitance (pF)
500
ISD, Reverse Drain Current (A)
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
400
Ciss
300
200
Coss
100
Crss
101
150 °C
25 °C
0
100
101
0.4
VDS, Drain-to-Source Voltage (V)
91030_05
20
0.6
102
ID, Drain Current (A)
VDS = 50 V
12
8
4
For test circuit
see figure 13
0
0
91030_06
2
4
6
8
10
12
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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4
2
10 µs
10
100 µs
5
2
1 ms
1
10 ms
5
TC = 25 °C
TJ = 150 °C
Single Pulse
2
0.1
14
QG, Total Gate Charge (nC)
1.4
Operation in this area limited
by RDS(on)
5
VDS = 200 V
VDS = 125 V
1.2
1.0
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID = 4.4 A
16
0.8
VSD, Source-to-Drain Voltage (V)
91030_07
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
VGS, Gate-to-Source Voltage (V)
VGS = 0 V
100
0.1
91030_08
2
5
1
2
5
10
2
5
102
2
5
103
VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91030
S11-1047-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF624S, SiHF624S
Vishay Siliconix
RD
VDS
5.0
VGS
D.U.T.
ID, Drain Current (A)
Rg
+
- VDD
4.0
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
3.0
2.0
Fig. 10a - Switching Time Test Circuit
1.0
VDS
90 %
0.0
25
50
75
100
125
150
TC, Case Temperature (°C)
91030_09
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
10
1
0 - 0.5
0.2
PDM
0.1
0.1
0.05
0.02
0.01
t1
Single Pulse
(Thermal Response)
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
10-2
10-5
91030_11
10-4
10-3
10-2
0.1
1
10
t1, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91030
S11-1047-Rev. C, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF624S, SiHF624S
Vishay Siliconix
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T.
Rg
+
-
IAS
V DD
VDS
10 V
0.01 Ω
tp
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
EAS, Single Pulse Energy (mJ)
240
ID
2.0 A
2.8 A
Bottom 4.4 A
Top
200
160
120
80
40
0
VDD = 50 V
25
91030_12c
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91030
S11-1047-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF624S, SiHF624S
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91030.
Document Number: 91030
S11-1047-Rev. C, 30-May-11
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Package Information
Vishay Siliconix
TO-263AB (HIGH VOLTAGE)
A
(Datum A)
3
A
4
4
L1
B
A
E
c2
H
Gauge
plane
4
0° to 8°
5
D
B
Detail A
Seating plane
H
1
2
C
3
C
L
L3
L4
Detail “A”
Rotated 90° CW
scale 8:1
L2
B
A1
B
A
2 x b2
c
2xb
E
0.010 M A M B
± 0.004 M B
2xe
Plating
5
b1, b3
Base
metal
c1
(c)
D1
4
5
(b, b2)
Lead tip
MILLIMETERS
DIM.
MIN.
MAX.
View A - A
INCHES
MIN.
4
E1
Section B - B and C - C
Scale: none
MILLIMETERS
MAX.
DIM.
MIN.
INCHES
MAX.
MIN.
MAX.
A
4.06
4.83
0.160
0.190
D1
6.86
-
0.270
-
A1
0.00
0.25
0.000
0.010
E
9.65
10.67
0.380
0.420
6.22
-
0.245
-
b
0.51
0.99
0.020
0.039
E1
b1
0.51
0.89
0.020
0.035
e
b2
1.14
1.78
0.045
0.070
H
14.61
15.88
0.575
0.625
b3
1.14
1.73
0.045
0.068
L
1.78
2.79
0.070
0.110
2.54 BSC
0.100 BSC
c
0.38
0.74
0.015
0.029
L1
-
1.65
-
0.066
c1
0.38
0.58
0.015
0.023
L2
-
1.78
-
0.070
c2
1.14
1.65
0.045
0.065
L3
D
8.38
9.65
0.330
0.380
L4
0.25 BSC
4.78
5.28
0.010 BSC
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
Document Number: 91364
Revision: 15-Sep-08
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1
Document Number: 91000