PVHT Datasheet

PVHT
www.vishay.com
Vishay Sfernice
High Stability - Very High Temperature (270 °C)
Thin Film Wraparound Chip Resistors, Sulfur Resistant
FEATURES
• Operating temperature range: -55 °C; +250 °C
• Storage temperature: -55 °C; +270 °C
• Gold terminations (< 1 μm thick)
• 5 sizes available (0402, 0603, 0805, 1206,
2010); other sizes upon request
• Temperature coefficient down to 5 ppm/°C
typical, 10 ppm/°C maximum (-55 °C; +270 °C)
• Tolerance down to 0.05 %
INTRODUCTION
For applications such as down hole applications, the need
for parts able to withstand very severe conditions
(temperature as high as 250 °C powered or up to 270 °C
un-powered) has led Vishay Sfernice to push out the limit of
the thin film technology.
Designers might read the application note “Power
Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays
(P, PRA etc…) (High Temperature Application)”
www.vishay.com/doc?53047 in conjunction with this
datasheet to help them to properly design their board and
get the best performances of the PVHT.
• Load life stability: 0.8 % typical (1 % max.) after 2000 h at
250 °C (ambient) at Pn
• Shelf life stability: 1.5 % typical after 8000 h
• SMD wraparound
• 0.02 % upon request
• TCR remains constant after long term storage at 270 °C
• Sulfur resistant (per ASTM B809-95 humid vapor test)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
Vishay Sfernice research and development engineers will be
willing to support any customer design considerations.
STANDARD ELECTRICAL SPECIFICATIONS
RATED POWER (1)(2)
P250 °C
W
RESISTANCE
RANGE
Ω
LIMITING ELEMENT
VOLTAGE
V
TEMPERATURE
COEFFICIENT (3)
± ppm/°C
TOLERANCE
±%
MODEL
SIZE
PVHT0402
0402
39 to 45K
0.031
50
0.05, 0.1, 0.5, 1
5, 10, 15, 25, 30, 50, 55
PVHT0603
0603
39 to 108K
0.062
75
0.05, 0.1, 0.5, 1
5, 10, 15, 25, 30, 50, 55
PVHT0805
0805
39 to 240K
0.100
150
0.05, 0.1, 0.5, 1
5, 10, 15, 25, 30, 50, 55
PVHT1206
1206
39 to 900K
0.165
200
0.05, 0.1, 0.5, 1
5, 10, 15, 25, 30, 50, 55
PVHT2010
2010
39 to 2.5M
0.2
300
0.05, 0.1, 0.5, 1
5, 10, 15, 25, 30, 50, 55
Notes
(1) For power handling improvement, please refer to application note 53047 “Power Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays (High Temperature Applications)” www.vishay.com/doc?/53047 and consult Vishay Sfernice
(2) See derating curve on next page
(3) See Table 1 on next page
CLIMATIC SPECIFICATIONS
Operating temperature range
Storage temperature range
-55 °C; +250 °C
-55 °C; +270 °C
MECHANICAL SPECIFICATIONS
Substrate
Alumina
Resistive Element
Thin Film
Passivation
Silicon nitride (Si3N4)
Protection
PERFORMANCE VS. HUMID SULFUR VAPOR
Test conditions
Test results
Revision: 13-Nov-15
50 °C ± 2 °C, 85 % ± 4 % RH,
exposure time 500 h
Resistance drift < (0.05 % R + 0.05 Ω),
no corrosion products observed
Terminations
Epoxy + Silicone
Gold (< 1 μm) over nickel barrier
Caution:
Performances obtained with following mounting conditions:
• Test board material: alumina
• Solder paste: PbSnAg (93.5/5/1.5)
Document Number: 53060
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PVHT
www.vishay.com
Vishay Sfernice
TABLE 1 - TEMPERATURE COEFFICIENT
Z
Y
E
H
5 ppm/°C
0 °C; +70 °C
10 ppm/°C
-55 °C; +270 °C
10 ppm/°C
-55 °C; +155 °C
15 ppm/°C
-55 °C; +270 °C
25 ppm/°C
-55 °C; +155 °C
30 ppm/°C
-55 °C; +270 °C
50 ppm/°C
-55 °C; +155 °C
55 ppm/°C
-55 °C; +270 °C
TABLE 2
RANGE (Ω)
TOL. (± %)
TCR CODE
0402
SERIES
From 39 to 45K
0.05, 0.1, 0.5, 1
Z; Y; E; H
0603
From 39 to 108K
0.05, 0.1, 0.5, 1
Z; Y; E; H
0805
From 39 to 240K
0.05, 0.1, 0.5, 1
Z; Y; E; H
1206
From 39 to 900K
0.05, 0.1, 0.5, 1
Z; Y; E; H
2010
From 39 to 2.5M
0.05, 0.1, 0.5, 1
Z; Y; E; H
0.08
Rated Power (W)
Rated Power (W)
POWER DERATING CURVE
0.06
0.04
0.25
0.20
0.15
0.10
0.02
0
0.05
0
50
100
150
200
250
0
300
0
50
100
Ambient Temperature (°C)
PVHT0402 Power Derating Curve
200
250
300
PVHT0805 Power Derating Curve
0.150
Rated Power (W)
Rated Power (W)
150
Ambient Temperature (°C)
0.125
0.100
0.075
0.35
0.30
0.25
0.20
0.15
0.050
0.10
0.025
0
0.05
0
50
100
150
200
250
300
Ambient Temperature (°C)
PVHT0603 Power Derating Curve
Revision: 13-Nov-15
0
0
50
100
150
200
250
300
Ambient Temperature (°C)
PVHT1206 Power Derating Curve
Document Number: 53060
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PVHT
www.vishay.com
Rated Power (W)
Vishay Sfernice
1.2
1.0
0.8
0.6
0.4
0.2
0
0
50
100
150
200
250
300
Ambient Temperature (°C)
PVHT2010 Power Derating Curve
DIMENSIONS in millimeters (inches)
A
D
D
B
C
E
E
CASE SIZE
A
B
MAX. TOL.
+0.152 (+0.006)
MIN. TOL.
-0.152 (-0.006)
MAX. TOL.
+0.127 (+0.005)
MIN. TOL.
-0.127 (-0.005)
D/E
C
NOMINAL
NOMINAL
NOMINAL
TOLERANCE
0402
1.00 (0.039)
0.60 (0.024)
0.25 (0.010)
0.1 (0.004)
0603
1.52 (0.060)
0.85 (0.033)
0805
1.91 (0.075)
1.27 (0.050)
1206
3.06 (0.120)
1.60 (0.063)
0.40 (0.016)
2010
5.08 (0.200)
2.54 (0.100)
0.48 (0.019)
0.4 (0.016)
± 0.051 (0.002)
0.38 (0.015)
0.13 (0.005)
SUGGESTED LAND PATTERN (TO IPC-7351A)
Gmin.
Xmax.
Zmax.
CHIP SIZE
DIMENSIONS (in millimeter)
Zmax.
Gmin.
Xmax.
0402
1.55
0.15
0.73
0603
2.37
0.35
0.98
0805
2.76
0.74
1.40
1206
3.91
1.85
1.73
2010
5.93
3.71
2.67
Revision: 13-Nov-15
Document Number: 53060
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PVHT
www.vishay.com
Vishay Sfernice
LOAD LIFE STABILITY CURVES
2000
ΔR/R (%)
Drift (ppm)
STORAGE CURVE
0
-2000
-4000
0.5
0.4
0.3
0.2
Sample 1
Sample 2
Sample 3
-6000
-8000
0.1
0
-10 000
-0.1
-12 000
-0.2
-14 000
-0.3
-16 000
-0.4
- 18 000
0
2000
4000
6000
8000
-0.5
10 000
Sample 1
Sample 2
Sample 3
0
200
400
600
800
Time (h)
1000
1200
Time (h)
250 °C Drift (Storage) vs. Time
PVHT2010: 0.2 W/250 °C
Note
• Test performed on samples of 3 different values coming from
different lots.
PACKAGING
PACKAGING RULES
ESD packaging available: waffle-pack, and plastic tape and
reel (low conductivity). Paper tape available upon request
(ESD only).
Waffle Pack
Can be filled up to maximum quantity indicated in the table
here above, taking into account the minimum order quantity.
When quantity ordered exceeds maximum quantity of a
single waffle pack, the waffle packs are stacked up on the
top of each other and closed by one single cover.
To get “not stacked up” waffle pack in case of ordered
quantity > maximum number of pieces per package:
Please consult Vishay Sfernice for specific ordering
code.
NUMBER OF PIECES PER PACKAGE
SIZE MOQ
TAPE AND REEL
WAFFLE PACK
2" × 2"
MIN.
MAX.
0402
0603
0805
5000
100
200
8 mm
100
1206
140
2010
60
TAPE
WIDTH
4000
2000
Tape and Reel
See part numbering information to get the quantity desired
by tape.
8 mm
GLOBAL PART NUMBER INFORMATION
GLOBAL PART NUMBERING: PVHT1206Y1001BGT63
(Limited to 18 digits: If more digits are necessary a codification of some digits might be used)
P
V
GLOBAL
MODEL
PVHT
H
T
1
2
0
6
Y
1
0
0
1
B
G
T
6
3
SIZE
TCR
VALUE
TOLERANCE
TERMINATION
PACKAGING
OPTION
0402
0603
0805
1206
2010
Z
Y
E
H
The first three digits are
significant figures and
the last digit specifies
the number of zeros to
follow, R designates
decimal point
W = 0.05 %
B = 0.1 %
D = 0.5 %
F=1%
G = gold
1 or 2 digits:
see codification of
packaging table
Leave blank
if no option
10R0 = 10 Ω
3901 = 3900 Ω
1004 = 1 MΩ
Revision: 13-Nov-15
Document Number: 53060
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PVHT
www.vishay.com
Vishay Sfernice
CODIFICATION OF PACKAGING
CODE
PACKAGING
WAFFLE PACK
W
100 min., 1 mult
WA
100 min., 100 mult (available only in size 1206)
PLASTIC TAPE (standard tape for all sizes, except 0402)
T
100 min., 1 mult
TA
100 min., 100 mult
TB
250 min., 250 mult
TC
500 min., 500 mult
TD
1000 min., 1000 mult
TE
2500 min., 2500 mult
TF
Full tape (quantity depending on size of chips)
PAPER TAPE (standard for 0402, upon request for other sizes)
PT
100 min., 1 mult
PA
100 min., 100 mult
PB
250 min., 250 mult
PC
500 min., 500 mult
PD
1000 min., 1000 mult
PE
2500 min., 2500 mult
PF
Full tape (quantity depending on size of chips)
Revision: 13-Nov-15
Document Number: 53060
5
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 02-Oct-12
1
Document Number: 91000