PHR www.vishay.com ESCC ( Vishay Sfernice ) 4001/023 Qualified High Precision (5 ppm, 0.01 %), Thin Film Chip Resistors FEATURES • Load life stability at ± 70 °C for 2000 h: 0.15 % under Pn • Low temperature coefficient down to ± 5 ppm/°C • Very low noise (< -35 dB) and voltage coefficient (< 0.01 ppm/V) Vishay Sfernice Thin Film division holds ESCC QML qualification (ESCC technology flow qualification). • Resistance range: 10 to 3 M (depending on size) These High-Rel. components are ideal for low noise and precision applications, superior stability, low temperature coefficient of resistance, and low voltage coefficient, Vishay Sfernice’s precision thin film wraparound resistors exceed requirements of MIL-PRF-55342G characteristics Y (± 10 ppm/°C). • TCR in lot tracking 5 ppm/°C • Laser trimmed tolerances to ± 0.01 % • Termination: Thin film technology • SnPb terminations over nickel barrier • ESCC 4001 (generic specifications) • ESCC 4001/023 (detailed specifications) • ESCC qualified • SMD wraparound chip resistor • Operating temperature range: -65 °C to +155 °C • From 0402 to 2010 • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 STANDARD ELECTRICAL SPECIFICATIONS RATED POWER RESISTANCE AT + 70 °C RANGE (Pn) W (1) LIMITING ELEMENT VOLTAGE (UL) V (1) INSULATION VOLTAGE (Ui) V TOLERANCE ±% TEMPERATURE COEFFICIENT ± ppm/°C 30 50 0.01, 0.02, 0.05, 0.1 5, 10, 25 35 100 0.01, 0.02, 0.05, 0.1 5, 10, 25 0.125 75 200 0.01, 0.02, 0.05, 0.1 5, 10, 25 10 to 3.5M 0.25 100 300 0.01, 0.02, 0.05, 0.1 5, 10, 25 10 to 6M 0.50 150 300 0.01, 0.02, 0.05, 0.1 5, 10, 25 MODEL ESCC SIZE VARIANT NUMBER PHR 0402 0402 13 and 14 10 to 150K 0.05 PHR 0603 0603 01 and 05 10 to 500K 0.1 PHR 0805 0805 02 and 06 10 to 750K PHR 1206 1206 03 and 07 PHR 2010 2010 04 and 08 Note (1) Limiting voltages and power rating are already derated (for maximum ratings admissible, refer to P chip: www.vishay.com/cod?53017). CLIMATIC SPECIFICATIONS MECHANICAL SPECIFICATIONS Operating temperature range -65 °C; +155 °C Substrate material Alumina Technology Thin Film Soldering temperature (Tsol) 260 °C, immersion 10 s Film Nickel Chromium with mineral passivation Protection Epoxy and silicone Terminations B type: SnPb over nickel barrier for solder reflow (3) G type: Gold Note (2) For B terminations use recommended reflow profile #1 as per Application Note “Guidelines for Vishay Sfernice Resistive and Inductive Components” (document number: 52029) Revision: 28-Aug-15 Document Number: 53037 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PHR www.vishay.com Vishay Sfernice DIMENSIONS in millimeters A D D B C E VARIANT NUMBER 01, 05 02, 06 03, 07 04, 08 13, 14 STYLE 0603 0805 1206 2010 0402 E A MIN. 1.39 1.78 2.87 4.95 0.87 B MAX. 2.16 2.55 3.64 5.72 1.64 MIN. 0.62 1.14 1.47 2.41 0.47 MAX. 1.01 1.53 1.86 2.8 0.86 DIMENSIONS C MIN. MAX. 0.25 1.02 0.25 1.02 0.25 1.02 0.25 1.02 0.25 1.02 D MIN. 0.17 0.17 0.17 0.35 0.09 E MAX. 0.51 0.51 0.51 0.85 0.38 MIN. 0.25 0.25 0.25 0.35 0.12 MAX. 0.51 0.51 0.51 0.85 0.38 TRACEABILITY DEFINITIONS The two major traceability elements are defined as: • The primary process lot number named Front End lot (FE lot). One “FE lot” is composed of several wafers issued from the same thin film deposition sequence. • The date code named Batch Number (BN). The “BN” is defined after completion of the end of production testing sequence. The lot homogeneity is given by the “FE lot” and not by the “BN”. According to the applied rules validated by the ESCC through the product qualification, the following situations are agreed: • Parts coming from different “FE lost” might have the same “BN”. • A maximum of two different “BN” might be applied to the same “FE lot” to enable the use of overruns from a previous PO. • Unless requested / approved by the customer the “BN” will be 2 years old maximum. SPECIFIC TRACEABILITY REQUIREMENTS The following specific requirements have to be treated as: • A customer who requires “Lot Homogeneity” has to mention it on the PO as “SINGLE PRODUCTION LOT”. • A customer who requires “Lot Homogeneity” in addition to a “Single Batch Number” has to mention it on the PO as “SINGLE PRODUCTION LOT AND OPTION R0101”. END OF PRODUCTION TESTING Mandatory testing performed at the end of the production process: • 100 % overload: Voltage 6.25 Pn x Rn or 2 UL whichever is less - duration 2 s • 100 % burn in: 168 h at Pn at 70 °C OPTIONS LOT VALIDATION TESTING For procurement of qualified components, lot validation testing is not required and shall only be performed if specifically stipulated in the purchase order. For procurement of unqualified components, lot validation testing shall be performed as stipulated in the purchase order. The need for lot validation testing shall be determined by the orderer. When lot validation testing is required, it shall consist of the performance of one or more of the tests or subgroup test sequences of chart F4 indicated in the ESA Generic Specification ESCC 4001. The testing to be performed and the sample size shall be as stipulated in the purchase order. When procurement of more than one component type is involved from a family, range or series, the selection of representative samples shall also be stipulated in the purchase order. Lot validation testing will be composed of one LVT charges and LVT samples: • Lot validation test charges has to be ordered separately on purchase order. • Lot validation samples have to be ordered separately on purchase orderer. FINAL INSPECTION If requested by the orderer a final inspection can be performed on site. Final inspection has to be stipulated separately on purchase order. Revision: 28-Aug-15 Document Number: 53037 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PHR www.vishay.com Vishay Sfernice LAND PATTERN in millimeters X m ax . Gmin. Zmax. CHIP SIZE 0402 0603 0705/0805 1206 2010 Zmax. 1.55 2.37 2.76 3.91 5.93 Gmin. 0.15 0.35 0.74 1.85 3.71 Xmax. 0.73 0.98 1.40 1.73 2.67 Note • Suggested land pattern: According to IPC-7351A QUALIFIED OHMIC RANGE ESCC VARIANT MODEL 01 to 08 and 13 to 14 PHR (1) QUALIFIED OHMIC RANGE OHMIC RANGE () TOLERANCE (%) 10 to < 50 0.1 MODEL 50 to < 100 0.05 and 0.1 100 to < 250 0.02, 0.05 and 0.1 ESCC VARIANT 01 to 08 and 13 to 14 PHR 250 TEMPERATURE COEFFICIENT (ppm/°C) ESCC CODE 10 to < 20 E: 25 (-55 °C; +155 °C) 2 E : 25 (-55 °C ; +155 °C) 20 to < 50 Y : 10 (-55 °C ; +155 °C) Z : 5 (+22 °C ; +70 °C) 2 1 0 E : 25 (-55 °C ; +155 °C) Y : 10 (-55 °C ; +155 °C) Z : 5 (+22 °C ; +70 °C) C : 5 (-55 °C ; +155 °C) 2 1 0 9 50 0.01, 0.02, 0.05 and 0.1 QUALIFIED OHMIC RANGE: MAX. VALUE PHR 0402 OHMIC RANGE () (1) (1) PHR 0603 PHR 0805 PHR 1206 PHR 2010 250 k 1 M 3 M 100 k (67 k for TCR C) 200 k (160 k for TCR C) Note (1) For values, TCR, tolerance outside of qualified range: Please consult. POPULAR OPTIONS EXTENDED FEATURES OPTION 0041 Production according to ESCC 4001/023 for: Cases, ohmic values, tolerance or TCR outside of qualified range. Please consult Vishay Sfernice for feasibility. You may consult Vishay Sfernice for chip sizes, ohmic values and tolerances outside of the qualified range. Two types of packaging are available: Waffle-pack and tape and reel. NUMBER OF PIECES PER PACKAGE SIZE WAFFLE PACK 2" × 2" TAPE AND REEL (3) MIN. 0402 0603 50 1206 140 2010 60 MAX. 5000 100 0805 TAPE WIDTH 4000 2000 RATED POWER PACKAGING POWER DERATING CURVE 500 2010 1206 250 0805 125 100 8 mm 0603 50 0 0402 0 70 155 AMBIENT TEMPERATURE IN °C Note (2) MoQ: 50 pieces Revision: 28-Aug-15 Document Number: 53037 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PHR www.vishay.com Vishay Sfernice PERFORMANCE TEST CONDITIONS REQUIREMENTS ESA/SCC 4001/023 MIL-PRF-55342G TYPICAL Short time overload U = 6.25 Pn x Rn Umax. < 2 UL - 2 s ± 0.05 % + (0.05 x 100/Rn) 0.10 % ± 0.01 % Rapid temperature change -55 °C / +155 °C 5 cycles CEI 66-2-14 Test Na ± 0.05 % + (0.05 x 100/Rn) 0.1 % (for 100 cycles) ± 0.01 % ± 0.015 % (for 500 cycles) Soldering (thermal shock) 260 °C / 10 s CEI 68-2-20 A Test T6 (met. 1A) ± 0.05 % + (0.05 x 100/Rn) - ± 0.005 % Terminal strength: adhesion bend strength of end plated facing CEI 115-1 Clause 4.32 CEI 115-1 Clause 4.33 ± 0.05 % + (0.05 x 100/Rn) - ± 0.01 % CEI 67-2-1 / CEI 68-2-2 CEI 67-2-13 / CEI 68-2-30 ± 0.10 % + (0.05 x 100/Rn) - ± 0.02 % Insulation resistance > 1 G Load life 2000 h Pn at +70 °C 90’ / 30’ cycle ± 0.15 % + (0.05 x 100/Rn) 0.5 % ± 0.02 % Insulation resistance > 1 G High temperature exposure 2000 h Pn at +155 °C CEI 68-2-20A Test B ± 0.15 % + (0.05 x 100/Rn) ± 0.10 % (duration 1000 h) ± 0.05 % Insulation resistance > 1 G Climatic sequence ESCC/PHR CODIFICATION CORRESPONDANCE TABLES VARIANT MODEL CASE SIZE 13 0402 01 0603 02 0805 03 1206 04 B (tin/lead) 2010 PHR 14 TERMINATION 0402 05 0603 06 0805 07 1206 08 2010 G (gold) ESCC/PHR CODIFICATION CORRESPONDANCE TABLES TEMPERATURE COEFFICIENT ESCC CODE PHR CODE 5 ppm/°C (+22 °C; +70 °C) 0 Z 10 ppm/°C (-55 °C; +155 °C) 1 Y 25 ppm/°C (-55 °C; +155 °C) 2 E 5 ppm/°C (-55 °C; +155 °C) 9 C ESCC/PHR CODIFICATION CORRESPONDANCE TABLES TOLERANCE ESCC CODE 0.1 % B B 0.05 % W W 0.02 % P P 0.01 % L L Revision: 28-Aug-15 PHR CODE Document Number: 53037 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PHR www.vishay.com Vishay Sfernice GLOBAL PART NUMBER INFORMATION LIMITED TO 18 DIGITS: If more digits are necessary a codification of some digits might be necessary P H R 0 6 TYPE TCR PHR0402 PHR0603 PHR0805 PHR1206 PHR2010 Y = ± 10 ppm/°C E = ± 25 ppm/°C Z = 5 ppm/°C (+22 °C; +70 °C) C = 5 ppm/°C (-55 °C; +155 °C) 0 3 Y 1 0 OHMIC VALUE The first three digits are significant figures and the last digit specifies the number of zero to follow. R designates decimal point. Example: 10R0 = 10 3901 = 3900 1004 = 1 M 0 3 B B T 0 1 4 TOLERANCE TERMINATION PACKAGING OPTION L = ± 0.01 % P = ± 0.02 % W = ± 0.05 % B = ± 0.10 % B: SnPb over nickel barrier G: Gold For more information see Codification of Packaging table Leave blank if no option Note • Terminations B: Variants 01 / 02 / 03 / 04 and 13 Terminations G: Variants 05 / 06 / 07 / 08 and 14 GLOBAL PART NUMBER INFORMATION ESCC Code 4 0 0 1 0 ESCC SPEC VARIANT 4001023 13 or 14 = 0402 01 or 05 = 0603 02 or 06 = 0805 03 or 07 = 1206 04 or 08 = 2010 2 3 0 1 1 OHMIC VALUE The first three digits are significant figures and the last digit specifies the number of zero to follow. R designates decimal point. Example: 10R0 = 10 3901 = 3900 1004 = 1 M 0 0 3 B 1 TOLERANCE TCR L = ± 0.01 % P = ± 0.02 % W = ± 0.05 % B = ± 0.10 % 1 = ± 10 ppm/°C 0 = ± 5 ppm/°C (+22 °C; +70 °C) 2 = ± 25 ppm/°C 9 = ± 5 ppm/°C (-55 °C; +155 °C) CODIFICATION PACKAGING - Waffle Pack CODIFICATION PACKAGING - Paper Tape (2) CODE 18 CODE 18 W WA PACKAGING PT 100 min., 1 mult 100 min., 100 mult (1) PA 100 min., 100 mult PB 250 min., 250 mult CODIFICATION PACKAGING - Plastic Tape CODE 18 T (2) PACKAGING 50 min. (100 min. for size 0402), 1 mult TA 100 min., 100 mult TB 250 min., 250 mult TC 500 min., 500 mult TD 1000 min., 1000 mult TE 2500 min., 2500 mult TF Full tape (3) Revision: 28-Aug-15 PACKAGING 25 min. (100 min. for size 0402), 1 mult PC 500 min., 500 mult PD 1000 min., 1000 mult PE 2500 min., 2500 mult PF Full tape (3) Notes Available only in size 1206. (2) Plastic tape in standard for all sizes except 0402. Paper tape in standard for size 0402 (option for other sizes. Availability to be checked with factory). (3) Qty. depending on size of chips. (1) Document Number: 53037 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000