T1070P www.vishay.com Vishay Semiconductors Silicon NPN Phototransistor FEATURES • Package type: chip • Package form: single chip • Dimensions (L x W x H in mm): 0.72 x 0.72 x 0.22 • Wafer diameter (in mm): 100 • Radiant sensitive area (in mm2): 0.25 • High photo sensitivity E • Suitable for visible light B • Fast response times • Angle of half sensitivity: ϕ = ± 60° • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 21682 DESCRIPTION APPLICATIONS T1070P ambient light sensor chip is a silicon NPN epitaxial planar phototransistor. It is sensitive to visible light much like the human eye and has peak sensitivity at 570 nm. • Ambient light sensor • Backlight dimmer GENERAL INFORMATION The datasheet is based on Vishay optoelectronics sample testing under certain predetermined and assumed conditions, and is provided for illustration purpose only. Customers are encouraged to perform testing in actual proposed packaged and used conditions. Vishay optoelectronics die products are tested using Vishay optoelectronics based quality assurance procedures and are manufactured using Vishay optoelectronics established processes. Estimates such as those described and set forth in this datasheet for semiconductor die will vary depending on a number of packaging, handling, use, and other factors. Therefore sold die may not perform on an equivalent basis to standard package products. PRODUCT SUMMARY IPCE (μA) ϕ (deg) λ0.5 (nm) 50 ± 60 440 to 800 PACKAGING REMARKS PACKAGE FORM wafer sawn on foil with disco frame MOQ: 55 000 pcs chip COMPONENT T1070P Note • Test condition see table “Basic Characteristics” ORDERING INFORMATION ORDERING CODE T1070P-SD-F Note • MOQ: minimum order quantity ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified) PARAMETER SYMBOL VALUE UNIT Collector emitter voltage TEST CONDITION VCEO 6 V Emitter collector voltage VECO 1.5 V Collector current IC 20 mA Junction temperature Tj 100 °C Operating temperature range Tamb -40 to +100 °C Storage temperature range Tstg1 -40 to +100 °C Storage temperature range on foil Tstg2 -40 to +50 °C Rev. 1.7, 29-Sep-14 Document Number: 81119 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 T1070P www.vishay.com Vishay Semiconductors BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) PARAMETER Collector emitter breakdown voltage Collector dark current Collector emitter capacitance Collector light current TEST CONDITION SYMBOL MIN. IC = 0.1 mA V(BR)CEO 6 TYP. MAX. UNIT V VCE = 5 V, E = 0 ICEO 3 VCE = 5 V, f = 1 MHz, E = 0 CCEO 16 pF EV = 20 lx, CIE illuminant A, VCE = 5 V IPCE 10 μA 50 nA EV = 100 lx, CIE illuminant A, VCE = 5 V IPCE 50 μA CIE illuminant A TKIPCE 1.18 %/K LED, white Temperature coefficient of IPCE TKIPCE 0.9 %/K Angle of half sensitivity ϕ ± 60 deg Wavelength of peak sensitivity λp 570 nm λ0.5 440 to 800 nm VCEsat 0.1 V Range of spectral bandwidth Collector emitter saturation voltage EV = 20 lx, CIE illuminant A, IPCE = 1.2 μA Note • The measurements are based on samples of die which are mounted on a TO-header without resin coating BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) 1000 VCE = 5 V 10 -7 IPCE - Photo Current (µA) ICEO - Collector Dark Current (A) 10 -6 10 -8 10 -9 10 -10 10 -11 10 10 -12 10 -13 -40 19758 1 -20 0 20 40 60 80 Tamb - Ambient Temperature (°C) 100 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0 VCE = 5 V, white LED -40 19759 -20 0 20 40 60 80 Tamb - Ambient Temperature (°C) 100 Fig. 2 - Relative Photo Current vs. Ambient Temperature Rev. 1.7, 29-Sep-14 100 E v - Illuminance (Ix) 1000 Fig. 3 - Photo Current vs. Illuminance CCE0 - Collector Emitter Capacitance (pF) 2.2 0.4 0.2 10 19760 Fig. 1 - Collector Dark Current vs. Ambient Temperature IPCE rel - Relative Photo Current 100 25 f = 1 MHz 20 15 10 19762 5 0 0.1 1.0 10.0 VCE - Collector Emitter Voltage (V) Fig. 4 - Collector Emitter Capacitance vs. Collector Emitter Voltage Document Number: 81119 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 T1070P www.vishay.com Vishay Semiconductors S(λ)rel - Relative Spectral Sensitivity 1.0 20019 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 300 400 500 600 700 800 900 1000 1100 λ - Wavelength (nm) Fig. 5 - Relative Spectral Sensitivity vs. Wavelength MECHANICAL DIMENSIONS PARAMETER SYMBOL MIN. TYP. MAX. UNIT Length of chip edge (x-direction) Lx 0.72 Length of chip edge (y-direction) Ly 0.72 mm Sensitive area AS 0.5 x 0.5 mm2 Die height Bond pad emitter (E) mm H 0.22 mm axb 0.1 x 0.1 mm2 ADDITIONAL INFORMATION Frontside metallization, base (B), emitter (E) aluminum Backside metallization, collector gold alloy Dicing Die bonding technology sawing epoxy bonding Note • All chips are checked in accordance with the Vishay Semiconductor, specification of visual inspection FVOV6870. The visual inspection shall be made in accordance with the “specification of visual inspection as referenced”. The visual inspection of chip backside is performed with stereo microscope with incident light and 40x to 80x magnification. The quality inspection (final visual inspection) is performed by production. An additional visual inspection step as special release procedure by QM is not installed. HANDLING AND STORAGE CONDITIONS • The hermetically sealed shipment lots shall be opened in temperature and moisture controlled cleanroom environment only. It is mandatory to follow the rules for disposition of material that can be hazardous for humans and environment. • Product must be handled only at ESD safe workstations. Standard ESD precautions and safe work environments are as defined in MIL-HDBK-263. • Singulated die are not to be handled with tweezers. A vacuum wand with non metallic ESD protected tip should be used. PACKING Chips are fixed on adhesive foil. Upon request the foils can be mounted on plastic frame or disco frame. For shipment, the wafers are arranged to stacks and hermetically sealed in plastic bags to ensure protection against environmental influence (humidity and contamination). Use for recycling reliable operators only. We can help getting in touch with your nearest sales office. By agreement we will take back packing material, if it is sorted. You will have to bear the costs of transport. We will invoice you for any costs incurred for packing material that is returned unsorted or which we are not obliged to accept. Rev. 1.7, 29-Sep-14 Document Number: 81119 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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