Si3459-Smart24-KIT User's Guide

Si3459Smart24-KIT
Si3459 S M A R T 2 4 K I T U SER ’ S G UIDE
1. Introduction
The Si3483 power management controller interoperates with Si3459 PSE controllers to enable the use of a
smaller, lower-cost, and more efficiently-utilized power supplies in managed or unmanaged Power over Ethernet
(PoE) Power Sourcing Equipment (PSE) with up to 64 ports and up to three parallel power supplies. The Si3459
SMART24 kit demonstrates the use of the Si3483 in a 24-port system. Figure 1 shows the assembled kit.
Figure 1. Si3459 Smart24 Kit
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Copyright © 2015 by Silicon Laboratories
Si3459Smart24-KIT
Si3459Smart24-KIT
2. Si3459 SMART24 Kit Contents
Table 1 lists the contents of the kit.
Table 1. Si3459 SMART24 Kit Contents
Item
2
Contents
1
The Si3459 SMART24 EVB, which includes the Si3483, three Si3459 PoE controllers, isolation for
UART communications, and an alternative (non-isolated) SPI interface.
2
Two Si3402ISO-EVB powered device evaluation boards. The boards are configured to provide a Class
3 signature.
3
One Si3402ISO-C4- EVB. This board is configured to supply a Class 4 signature. The Class 4 boards
are marked Class 4 and can also be identified by the diodes on the back of the board.
4
Three switchable loads. The switchable loads draw approximately 6.5, 13, or 19.5 W from the PSE.
5
One 24-port connector board to bring the Si3459 power to Ethernet jacks. The connector board does
not have Ethernet data functionality.
6
PoE USB adapter. This adapter supports USB to UART, SPI or I2C. It provides a UART connection to
the Si3459 SMART24 Kit.
7
Three Ethernet cables, one USB cable, and two 24-wire ribbon cables.
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3. Using the Si3459 SMART24 kit
3.1. Hardware Configuration
The boards are connected as shown in Figure 1. The PoE USB Adapter card’s UART connector (labeled “UART”
on the top side and “J817” on the bottom side) should be connected to J2 (UART) on the Si3459 SMART24 EVB. A
nominal 50 V power supply is connected to J7 (note the polarity). For high-power support according to the IEEE
standard, the supply voltage should be between 51 and 57 V. For normal power levels, the power supply can be 45
to 57 V. The total required power supply wattage can be as high as 720 W to apply full power at all ports. Effective
evaluation can be done with a power supply of 40 W or more. Once configured, the Si3483 manages the available
power. The large diode, D1 will be forward-biased in case of incorrect input polarity.
Note: It is recommended that the power supply be connected to the board and then turned on to reduce large inrush current
charging the 33 µF filter capacitor on the board.
Table 2 lists the jumper settings. The evaluation board schematic pages (Figures 10 through 16) also indicate
jumper placement.
Table 2. Si3459 SMART24 Jumper Settings
Jumper
Function
Initial Setting
JP1
select reset state in absence of PoE-USB
ON (1,2)
JP2
UART baud selection, default 115.2 kHz
ON (1,2)
JP3
UART baud selection, default 115.2 kHz
ON (1,2)
JP4
UART baud selection, default 115.2 kHz
ON (1,2)
JP5
Power Supply 3 Status, Default not present
ON (2,3)
JP6
SPI/UART select
ON (1,2)
JP7
Si3483 reset
off
J8
U2 Si3459 Address
ON (addr=0,0,0,0)
J9
U3 Si3459 Address
ON (addr=0,0,0,1)
J10
U4 Si3459 Address
ON (addr=0,0,1,0)
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3.2. Installing the PoE USB Adapter
Note: Before the PoE USB adapter is plugged in, the device driver should be installed.
If you have previously installed the PoEUSB device, depending on your operating system, you may need to
uninstall the previous version before installing the new version. To uninstall the previous version, select “Programs
and Features” or “Add or Remove Programs” from the Control Panel and then uninstall “Windows Driver Package Silicon Labs (WinUSB) MultiPortSerial”.
Figure 2. Programs and Features Screen
To install the PoE USB adapter drivers, run PoEUSBSetup_v1.1.exe from the supplied disk, and follow the
instructions including accepting the end user license agreement. The PoE USB adapter supplied with the Si3459
SMART24 kit has been tested to be compatible with Windows XP®, Windows Vista®, and Windows 7® operating
systems.
After successful installation, plug in the USB cable; the PoE USB device should be recognized. For Windows XP,
select “No not at this time” when Windows prompts to search for software, and select “Install the software
automatically” on the next screen. After successful installation, a PC reboot may be required.
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4. Demonstration Use of the Power Manager GUI
The Silicon Labs power manager GUI is used to configure and observe the Si3459 SMART24 via the supplied PoE
USB adapter. Note that once the Si3483 has been configured, it can run in hardware only mode without the GUI or
PoE USB-to-UART adapter.
The demonstration assumes the Power Manager GUI has been configured as follows:
40
W of power available on Power Supply 2. Set Power Supply 1 to zero for demonstration in the
standalone mode. This is because, in the standalone mode, the control line for Power Supply 1 status is
low (disabled) when the USB cable is unplugged.
Port 1 High Power (PoE+, 30 W) all other ports standard PoE (15.4 W)
Port 1 critical priority; all other ports low priority
Consumption-based power management
Retry after reconnect for overloads
Leave Legacy and Midspan boxes unchecked.
Jumpers should be set to “Initial Setting” as shown in Table 2.
Figure 3. Configuration Screen
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Power
Supply 2 is inserted and will be used for the demonstration.
Figure 4. Initial Screen Status
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The Si3459 SMART24 kit ships with three powered devices based on the Si3402 with loads for up to approximately
19.5 W of input power. The loads are arranged as one to three 5 W resistors, which draw 5 W each at the PD
output voltage of 5 V. Due to the PD input diode bridge and the dc-to-dc conversion efficiency, each resistor causes
approximately 6.5 W of power to be drawn from the PSE.
This means that the PD will draw approximately 6.5, 13, or 19.5 W from the PSE, depending on the number of load
resistors connected.
Perform the following steps:
1. Connect a Class 3 PD with a 6.5 W load (switches off) into Port 1 and a Class 4 PD with a 6.5 W load into
Port 2. The status window is shown in Figure 5. Since sufficient power is available, both ports are granted
power. Because Port 2 was not enabled as PoE+, the Class 4 PD is only granted 15.4 W.
Figure 5. Status Screen with Class 3 PD on Port 1 and Class 4 PD on Port 2
2. Disconnect the PDs from Step 1, and connect the Class 4 PD to Port 1 and Class 3 PDs to each of Ports 2
and 3. Initially, use a 6.5 W load on each PD.
All three ports are granted power. Port 1 is now granted 30 W since Port 1 is enabled for high power
(PoE+). Since only one resistor is connected, approximately 6.5 W is drawn on each port.
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Figure 6. Status Screen with Class 4 PD on Port 1 and Class 3 PDs on Ports 2 and 3
3. Increase the Load on the ports to create a port overload by switching in more load resistors.
For Port 2 or Port 3 (with Class 3 PDs), the port overload condition occurs with the three resistors, which
corresponds to about 19.5 W of input power. The following screen shot shows the result of an overload
(indicated by the status “blocked”) on Port 3.
To reset the port, decrease the load back to one resistor; unplug the PD, and plug it back in. This
demonstrates “retry after reconnect”.
For Port 1 (PoE+ port with Class 4 PD), the overload does not happen even with 19.5 W being drawn by
the PD.
Note: Use caution because the load resistors and PD can get HOT!.
Figure 7. Status Screen after an Overload on Port 3
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Figure 8. Status Screen Showing Class 4 PD on Port 1 Drawing 18 W
4. Demonstrate the port priority and system overload protection features.
Disconnect all PDs, and then connect the Class 3 PDs to Ports 2 and 3 with two load resistors so that they
draw 13 W each (26 W total power).
Connect the Class 4 PD with three resistors (19.5 W) to Port 1. Port 1 is granted power, and a system-level
overload is created with approximately 45.5 W. Either Port 3 or Ports 2 and 3 will be turned off depending
on whether the Si3483 reported a severe overload (>44 W). Because the PDs have a soft start circuit, it is
possible that only Port 3 is turned off when the power exceeds 40 W. The ports that are turned off will not
turn back on until the load on Port 1 is reduced. This is because there is not enough power available to
grant 15.4 W from the Class 3 PD.
Figure 9. Status Screen Showing Port 3 Denied Power Due to Insufficient Power Available
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The Si3483 will manage power on all Si3459 devices to which it is connected. The number of Si3459 devices
connected is discovered upon power up. This means that the Si3483 can manage power on up to 64 ports.
Once configured, the Si3483 will continue to manage the power even when the host is disconnected. To
demonstrate this, exit the GUI, disconnect the PoE USB adapter, and repeat the above tests. While there is no
visual display, the behavior is the same. The PD status can be seen by looking at the LEDs on the Si3402
evaluation boards located on the RJ-45 connector. These LEDs glow steadily if power is supplied.
Note that, in the schematics shown in Figure 6, the Reset and Pgood2 signals are routed through an Si8651
isolator. The Si8651 default state is high so that, when the USB connector is removed, the Si3483 is not held in
reset, and Power Supply 2 is still configured as inserted. This is why Power Supply 2 was chosen to be inserted in
the above examples.
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5. Easing Software Development with the Serial Packet Protocol SDK
A host MCU uses the Serial Packet Protocol (SPP) to communicate with an Si3483 Power Management Controller.
A Serial Packet Client in the host MCU implements the client side of the Serial Packet Protocol. A reference
implementation of a Serial Packet Client (available upon request) greatly reduces the software development effort
needed to use the Si3483.
Please refer to the Si3483 data sheet for further details on taking the next step in development with the Si3483
power management controller.
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6. Unmanaged Operation
The Si3459 SMART24 demonstrator was designed to operate in conjunction with the PoE-USB and GUI monitor
program. It may be desirable to demonstrate and verify standalone unmanaged operation of the Si3482. If the
PoE-USB adapter is removed, it is necessary to replace signals driven by the PoE-USB. A practical method is to
temporarily jumper between the PoE-domain host domain power supplies across the isolator.
Connect as follows:
1. J2 pin 16 to J5 pin 9 (GND_host bridged to GND_PoE)
2. J2 pin 6 to J5 pin 1 (3.3V host powered from 3.3V_PoE)
3. J2 pin 8 to J2 pin 13 (sets PGOOD1 high)
If these connections are made, the Si3459 SMART24 board may be powered without a PoE-USB adapter
attached. The Si3483 will operate from configuration settings stored in its nonvolatile memory.
Note that the PoE power supply must be isolated according to the PoE standard. If jumpered in this manner, do not
otherwise connect to J2.
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7. Circuit Board
The following pages contain the detailed schematics, BOM, and layout for the Si3459 SMART24 Evaluation Board.
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RTN12
RTN13
RTN14
RTN15
RTN16
RTN17
RTN18
RTN19
RTN20
RTN21
RTN22
RTN23
RTN0
RTN1
RTN2
RTN3
RTN4
RTN5
RTN6
RTN7
RTN8
RTN9
RTN10
RTN11
2
4
6
8
10
12
14
16
18
20
22
24
HEADER 12x2
1
3
5
7
9
11
13
15
17
19
21
23
J8
2
4
6
8
10
12
14
16
18
20
22
24
HEADER 12x2
1
3
5
7
9
11
13
15
17
19
21
23
J4
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
VOUT18
VOUT19
VOUT20
VOUT21
VOUT22
VOUT23
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
J7A
RJ-45
A1
A2
MX0+
MX0-
VOUT16
RTN16
VOUT8
RTN8
VOUT0
MX1+
MX1-
RTN0
A3
A6
A1
A2
A3
A6
A4
A5
MX2+
MX2-
J7B
RJ-45
J6B
RJ-45
B1
B2
VOUT17
RTN17
VOUT9
RTN9
VOUT1
RTN1
B3
B6
B7
B8
J7C
RJ-45
J6C
RJ-45
C1
C2
VOUT18
RTN18
VOUT10
RTN10
VOUT2
RTN2
C3
C6
C4
C5
MX0+
MX0MX1+
MX1MX2+
MX2MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2MX3+
MX3-
J7D
RJ-45
J6D
RJ-45
MX0+
MX0-
J5D
RJ-45
D1
D2
VOUT19
RTN19
VOUT11
RTN11
VOUT3
RTN3
D3
D6
MX1+
MX1MX2+
MX2MX3+
MX3-
J7E
RJ-45
J6E
RJ-45
MX0+
MX0-
J5E
RJ-45
E1
E2
VOUT20
RTN20
VOUT12
RTN12
VOUT4
RTN4
E3
E6
E7
E8
MX1+
MX1MX2+
MX2MX3+
MX3-
J7F
RJ-45
J6F
RJ-45
MX0+
MX0-
J5F
RJ-45
F1
F2
VOUT21
RTN21
VOUT13
RTN13
VOUT5
RTN5
F3
F6
F4
F5
MX1+
MX1MX2+
MX2MX3+
MX3-
J7G
RJ-45
J6G
RJ-45
MX0+
MX0-
J5G
RJ-45
G1
G2
VOUT22
RTN22
VOUT14
RTN14
VOUT6
RTN6
G3
G6
MX1+
MX1MX2+
MX2MX3+
MX3-
J7H
RJ-45
J6H
RJ-45
MX0+
MX0-
J5H
RJ-45
H1
H2
VOUT23
RTN23
VOUT15
RTN15
VOUT7
RTN7
H3
H6
H7
H8
J5C
RJ-45
Figure 16. RJ45 Ethernet Connector Board
A7
A8
MX3+
MX3MX0+
MX0MX1+
MX1-
B4
B5
MX2+
MX2MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2-
C7
C8
MX3+
MX3MX0+
MX0MX1+
MX1-
D4
D5
MX2+
MX2-
D7
D8
MX3+
MX3MX0+
MX0MX1+
MX1-
E4
E5
MX2+
MX2MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2-
F7
F8
MX3+
MX3MX0+
MX0MX1+
MX1-
G4
G5
MX2+
MX2-
G7
G8
MX3+
MX3MX0+
MX0MX1+
MX1-
H4
H5
MX2+
MX2MX3+
MX3-
J5B
RJ-45
B1
B2
B3
B6
B7
B8
C1
C2
C3
C6
C4
C5
D1
D2
D3
D6
D4
D5
E1
E2
E3
E6
E4
E5
E7
E8
F1
F2
F3
F6
F4
F5
G1
G2
G3
G6
G4
G5
H1
H2
H3
H6
H4
H5
H7
H8
J6A
RJ-45
MX0+
MX0MX1+
MX1-
A4
A5
MX2+
MX2-
A7
A8
MX3+
MX3MX0+
MX0MX1+
MX1-
B4
B5
MX2+
MX2MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2-
C7
C8
MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2-
D7
D8
MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2-
F7
F8
MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2-
G7
G8
MX3+
MX3MX0+
MX0MX1+
MX1MX2+
MX2MX3+
MX3-
J5A
RJ-45
A1
A2
A3
A6
A4
A5
A7
A8
B1
B2
B3
B6
B4
B5
B7
B8
C1
C2
C3
C6
C4
C5
C7
C8
D1
D2
D3
D6
D4
D5
D7
D8
E1
E2
E3
E6
E4
E5
E7
E8
F1
F2
F3
F6
F4
F5
F7
F8
G1
G2
G3
G6
G4
G5
G7
G8
H1
H2
H3
H6
H4
H5
H7
H8
MX1+
MX1MX2+
MX2MX3+
MX3-
Si3459Smart24-KIT
Si3459Smart24-KIT
7.1. Bill of Materials
Table 3. Si3459Smart24 Bill of Materials
Qty
Value
Ref
4
0.1uF
1
Voltage
Tol
Type
PCB Footprint
Mfr Part Number
Mfr
C1,C26,C40,C54
16V
±20%
X7R
C0603
C0603X7R160-104M
Venkel
4.7uF
C2
10V
±20%
X7R
C1206
C1206X7R100-475M
Venkel
2
680pF
C3,C4
250V
±15%
Y3
C1808
GA342QR7GD681KW
01L
MuRata
1
0.1uF
C5
16V
±20%
X7R
C0805
C0805X7R160-104M
Venkel
2
33uF
C6,C11
100V
±20%
Alum_El
ec
C3.5X8MM-RAD
ECA2AM330
Panasonic
15
0.1uF
C9,C12,C20,C21,C
22,C23,C34,C35,C
36,C37,C48,C49,C
50,C51,C120
100V
±20%
X7R
C0603
C0603X7R101-104M
Venkel
4
10uF
C10,C25,C39,C53
10V
±10%
X5R
C0603
C0603X5R100-106K
Venkel
24
0.22uF
C13,C14,C15,C16,
C17,C18,C19,C24,
C27,C28,C29,C30,
C31,C32,C33,C38,
C41,C42,C43,C44,
C45,C46,C47,C52
100V
±10%
X7R
C0805
C0805C224K1RACTU
Kemet
2
0.1uF
C55,C56
16V
±10%
X7R
C0805
C0805X7R160-104K
Venkel
1
MBRS31
00T3
D1
3A
100V
Schottky
DO-214AB
MBRS3100T3
On Semi
1
GREEN
D2
30mA
2.2V
SMT
LED-0805-K
LTST-C170GKT
LITE_ON
INC
1
ES1B
D3
1.0A
100V
Fast
DO-214AC
ES1B
Diodes Inc.
24
SMAJ58
A
D4,D5,D6,D7,D8,D
9,D10,D11,D12,D1
3,D14,D15,D16,D1
7,D18,D19,D20,D2
1,D22,D23,D24,D2
5,D26,D27
400W
58V
GP
DO-214AC
SMAJ58A
Littelfuse
6
HEADER JP1,JP2,JP3,JP4,J
1x3
P5,JP6
Header
CONN-1X3
TSW-103-07-T-S
Samtec
1
JUMPER
JP7
Header
CONN1X2
TSW-102-07-T-S
Samtec
18
Jumper
Shunt
JS1,JS2,JS3,JS4,J
S5,JS6,JS7,JS8,JS
9,JS10,JS11,JS12,
JS13,JS14,JS15,J
S16,JS17,JS18
Shunt
N/A
SNT-100-BK-T
Samtec
20
Rating
Y3
Confidential Rev. 0.1
Si3459Smart24-KIT
Table 3. Si3459Smart24 Bill of Materials
Qty
Value
Ref
1
HEADER
5x2
1
Rating
Voltage
Type
PCB Footprint
Mfr Part Number
Mfr
J1
Header
CONN2X5
TSW-105-07-T-D
Samtec
HEADER
8x2
J2
Header
CONN2X8
TSW-108-07-S-D
Samtec
2
HEADER
12x2
J3,J4
Header
CONN2X12-2MM
TMM-112-01-T-D
Samtec
1
5X2
Shroude
d Header
J5
Shroude
d
CONN2X5-4W
5103309-1
Tyco
1
CONN
SOCKET
3x2 RA
J6
Socket
CONN2X3-FRA
SSQ-103-02-G-D-RA
Samtec
1
CONN
TRBLK 2
J7
TERM
BLK
MALE
CONN-TB-17572
42
1757242
PHOENIX
CONTACT
3
HEADER
4x3
J8,J9,J10
Header
CONN3X4
TSW-104-07-G-T
Samtec
1
100uH
L1
Shielded
IND-CTSLF1045
CTSLF1045-101M
Central
Tech
6
4-40
MH1,MH2,MH3,MH
4,MH5,MH6
HDW
MH-125NP
NSS-4-4-01
Richco
Plastic Co
1
Si3459-S
MART24
REV 3.0
PCB1
BARE
PCB
N/A
Si3459-SMART24
REV 3.0
Silicon
Labs
24
FDMC36 Q1,Q2,Q3,Q4,Q5,
12
Q6,Q7,Q8,Q9,Q10,
Q11,Q12,Q13,Q14,
Q15,Q16,Q17,Q18,
Q19,Q20,Q21,Q22,
Q23,Q24
12A
100V
N-CHNL
POWER33
FDMC3612
Fairchild
1
FQT5P1
0
Q25
1.0A
100V
P-CHNL
SOT223-GDS
FQT5P10
Fairchild
4
1K
R1,R2,R10,R11
1/10W
±1%
ThickFilm
R0603
CR0603-10W-1001F
Venkel
8
10K
R3,R4,R5,R6,R7,R
8,R9,R12
1/10W
±1%
ThickFilm
R0603
CR0603-10W-1002F
Venkel
1
332
R13
1/10W
±1%
ThickFilm
R0603
CR0603-10W-3320F
Venkel
1.0 A
Tol
±20%
Confidential Rev. 0.1
21
Si3459Smart24-KIT
Table 3. Si3459Smart24 Bill of Materials
Qty
Value
Ref
Rating
24
0.255
R14,R15,R16,R17,
R18,R19,R20,R21,
R22,R23,R24,R25,
R26,R27,R28,R29,
R30,R31,R32,R33,
R34,R35,R36,R37
1
1.0
1
Voltage
Tol
Type
PCB Footprint
Mfr Part Number
Mfr
1/8W
±1%
ThickFilm
R0805
LCR0805-R255F
Venkel
R38
1/4W
±1%
ThickFilm
R1206
CR1206-4W-1R00F
Venkel
0
R39
1A
ThickFilm
R0603
CR0603-16W-000
Venkel
6
STANDOFF
SO1,SO2,SO3,
SO4,SO5,SO6
4810
Keystone
Electronics
1
SW
PUSHBUTTON
SW1
7
TPV
26
HDW
Tactile
SW4N6.5X4.5-PB
101-0161-EV
Mountain
Switch
TPV1,TPV2,TPV3,
TPV4,TPV5,TPV6,
TPV7
PCB
Feature
VIA-TP
N/A
N/A
BLACK
TP1,TP2,TP3,TP4,
TP5,TP6,TP7,TP8,
TP9,TP10,TP11,
TP12,TP13,TP14,
TP15,TP16,TP17,
TP18,TP19,TP20,
TP21,TP22,TP23,
TP24,TP25,TP26
Loop
TESTPOINT
151-203-RC
Kobiconn
1
Si3483
U1
MCU
QFN24N4X4P0.5
Si3483-A01-GM
Silicon
Labs
3
Si3459-B
02-IM
U2,U3,U4
PSE
QFN56M8X8P0.5
E5.85
Si3459-B02-IM
Silicon
Labs
1
Si8651
U5
Isolator
SO16N6.0P1.27
Si8651BB-B-IS1
Silicon
Labs
22
50mA
2500
VRMS
12Vdc
Confidential Rev. 0.1
Si3459Smart24-KIT
Figure 17. Si3459 SMART24 Silkscreen
7.2. Circuit Board Layout
Confidential Rev. 0.1
23
Figure 18. Si3459 SMART24 Top Layer
Si3459Smart24-KIT
24
Confidential Rev. 0.1
Figure 19. Si3459 SMART24 Ground Layer
Si3459Smart24-KIT
Confidential Rev. 0.1
25
Figure 20. Si3459 SMART24 Power Plane
Si3459Smart24-KIT
26
Confidential Rev. 0.1
Figure 21. Si3459 SMART24 Bottom Layer
Si3459Smart24-KIT
Confidential Rev. 0.1
27
Smart.
Connected.
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Products
Quality
Support and Community
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Disclaimer
Silicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers
using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific
device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories
reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy
or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply
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