MEC1308 Keyboard and Embedded Controller for Notebook PC Product Brief

MEC1308
Keyboard and Embedded Controller for Notebook PC
Features
• 3.3V Operation with 5V Tolerant Buffers on PS/2
pins
• ACPI 1.0/2.0 PC99/PC2001 Compliant
• LPC Interface with Clock Run Support
- Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
- 15 Direct IRQs
- ACPI SCI Interface
- nSMI output and supporting PM registers
- Shadowed write only registers
• Internal 64K SRAM
- Loaded at VCC1 power from the HOST/8051
SPI Memory Interface
- Provides 64KB of 8051 program space
- 32k-Byte region shared with 8051data space
• HOST/8051 SPI Memory Interface
- 3-pin Full Duplex serial communication interface.
- Two Chip Select Pins
- Fully 8051 Controlled
- Hardware Support for two SPI Flash Configurations:
•
•
•
•
- Switched SPI Flash Configuration
- Parallel Shared SPI Flash Configuration
• Two Power Planes
- Low Standby Current in Sleep Mode
• ACPI Embedded Controller Interface
• Configuration Register Set Compatible with ISA
Plug-and-Play Standard (Version 1.0a)
• High-Performance Embedded 8051 Keyboard
and System Controller
- Provides System Power Management
- System Watch Dog Timer (WDT)
- 8042 Style Host Interface
- Supports Interrupt and Polling Access
- 1024 Boot /ROM
- 256 Bytes Data RAM
- On-Chip Memory-Mapped Control Registers
- Access to VCC0 Backed Registers
- Up to 18x8 Keyboard Scan Matrix
- Two 16-Bit Timer/Counters
- Integrated Full-Duplex Serial Port Interface
- Seventy-Three 8051 Interrupt Sources
 2014 Microchip Technology Inc.
•
•
•
•
•
- Thirty-Two 8-Bit, Host/8051 Mailbox Registers
- Sixty-Four Maskable Hardware Wake-Up
Events
- Fast GATEA20
- Fast CPU_RESET
- Multiple Clock Sources and Operating Frequencies
- IDLE and SLEEP Modes
Accurate Fail-Safe Ring Oscillator
- Single Clock source for most 8051 and SIO
functions
- Provides 2% frequency accuracy
- Lock Bit provides status
Integrated Standby Power Reset Generator
- VCC1_RST# output
VCC0 Backed Resources
- 16 Byte VCC0 Backed Registers
- VCC0 Backed Status Register
- 32.768KHz-input clock
- <2μA Standby Current (typ)
Two 8584-Style I2C/SMBus Controllers
- 8051 Controlled Logic Allows I2C/SMBus
Master or Slave Operation
- I2C/SMBus Controllers are Fully Operational
on Standby Power
- 2 Sets of Dedicated Pins per I2C/SMBus
Controller
Four independent Hardware Driven PS/2 Ports
48 General Purpose I/O Pins
- Maskable Hardware Wake-Event Capable
- Programmable Open-Drain/Push-Pull Outputs
7 General-Purpose Outputs
Four Programmable Pulse-Width Modulator Outputs
- Independent Clock Rates
- 6-Bit Duty Cycle Granularity
- Operational in both Full on and Standby
modes
Consumer Infrared Receiver for Vista (CIRV)
- Consumer Infrared Remote Control Receiver
Interface
- Support of all common CIR formats in S0
power state, per Vista standard mechanism.
DS00001753A-page 1
MEC1308
•
•
•
•
- Hardware matching of Microsoft Remote
input frames, with PME Wake (S3/S4/S5
power states).
- Programmable High-Speed Synchronous
Communications Engine (SCE) with a 32Byte FIFO and Programmable Threshold
- LED Control for Activity Indication
Dual Fan Tachometer Inputs
Debug Port (UART)
- High-Speed 16550A-Compatible UART with
16-Byte Send/Receive FIFOs
- Programmable Baud Rate Generator
- Relocatable to 480 Different Base I/O
Addresses
- 15 IRQ Options
BC-Link Interconnection Bus
- Combined High Speed/Low Speed Bus Master Controller
General Purpose Analog to Digital Converter (GPADC)
- 10-bit conversion precision
- 10-bit conversion per channel is completed in
10.91us
- 4 ADC general purpose channels
- Channel 0 has a 5 volt tolerant input
- 10-bit Conversion with 3.22 mV resolution
- 0 to 3.3 VDC Conversion Range
- Channel 1, 2, & 3 has a 3.3 volt tolerant input
with a 10-bit, 3.22 mV resolution
- Optional continuous sampling at a programmable rate
- Integral Non-Linearity of ±0.5 LSB; Dynamic
Non-Linearity of ±0.5 LSB
DS00001753A-page 2
Description
The MEC1308 is a 128-pin 3.3V LPC-based ACPI 2.0
and PC99/PC2001 compliant Notebook I/O Controller.
See Figure 1, "MEC1308 Block Diagram".
The MEC1308 incorporates a high-performance 8051based keyboard and system controller with internal 64k
byte RAM; a 1K byte Boot ROM, and 16-bytes battery
backed registers. The 64K RAM is loaded via HOST/
8051 SPI Memory Interface. The HOST/8051 SPI
Memory Interface can be configured in Switched SPI
Flash Configuration or Parallel Shared SPI Flash Configuration.
The MEC1308 has four PS/2 ports; an 16C550A-compatible 2 pin UART for Debug Port; a Consumer Infrared Receiver for Vista (CIRV), two 8584-style I2C/
SMBus controllers with two selectable ports per controller; a Serial IRQ peripheral agent interface; an ACPI
Embedded Controller Interface; forty-eight General
Purpose I/O pins and seven General Purpose Outputs;
four independently programmable pulse width modulators; dual fan control through the implementation of two
fan tachometer input pins; hardware monitoring of a
PWM input and maskable hardware wake-up events;
one BC-Link Combined High Speed/Low Speed Bus
Master Controller; 4 channel Analog to Digital Converter.
The MEC1308 has two separate power planes to provide “instant on” and system power management functions. Additionally, the MEC1308 incorporates
sophisticated power control circuitry (PCC). The PCC
supports multiple low power down modes. Wake-up
events and ACPI-related functions are supported
through the SCI Interface.
The MEC1308 supports the ISA Plug-and-Play Standard (Version 1.0a) and provides all the functionality for
current Windows O/S’s. The I/O Address and Hardware IRQ of each logical device in the MEC1308 may
be reprogrammed through the internal configuration
registers. There are 480 I/O address location options
and 15 IRQs for each logical device.
 2014 Microchip Technology Inc.
MEC1308
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DS00001753A-page 3
MEC1308
BLOCK DIAGRAM
FIGURE 1:
MEC1308 BLOCK DIAGRAM
VCC1(5)
VCC2(2)
VSS(7)
nRESET_OUT
SYSTEM
RESET
CIR_LED
CIR_IN
CIRV
LAD [3:0]
LFRAME#
LRESET#
MEC1308 - 128 Pin
BC_CLK
BC_DAT
BC_INT#
BC-Link Bus
Master Controller
LPC BUS
HOST CPU
INTERFACE
CONFIGURATION REGISTERS
POWER
MANAGEMENT
Analog to Digital
Converter.
ADC[0:3]
Pulse Width
Modulator Output
PWM[0:4]
Fan Tachometer
FAN_TACH[1:2]
CONTROL, ADDRESS, DATA
nEC_SCI
nSMI
SER_IRQ
CLKRUN#
PCI_CLK
TXD
RXD
VCC1_RST#
PWRGD
OUT
GENERAL
PURPOSE I/O
INTERFACE I/O
INTERRUPTS
nEC_SCI
MAILBOX REGISTERS
8051
16C550A
COMPATIBLE
SERIAL PORT
POWER
Reset &
Control
ACPI
EMBEDDED
CONTROLLER
PM1
BLOCK
256B Direct
RAM
KSI[0:7]
KSO[0:17]
KBRST, A20M
PS/2 PORTS
WDT
Accurate
Ring
Oscillator
64KB Executable
SRAM
ACCESS BUS
1
AB1A_DATA, AB1A_CLK
AB1B_DATA, AB1B_CLK
ACCESS BUS
2
AB2A_DATA , AB2A_CLK
AB2B_DATA , AB2B_CLK
VCC2 Controlled
DS00001753A-page 4
18 x 8
KEYBOARD
INTERFACE
1024B Boot ROM
PWR_FAIL
Reg
Note: This block diagram shows internal block
interfaces before pin multiplexing, and should not used
for pin count.
nBAT_LED, nPWR_LED,
nFDD_LED, nDMS_LED
LED DRIVER
8051RX
KCLK, EMCLK, IMCLK, PS2CLK
D
16 Bytes
Reg
8051TX
8051 SUB-BLOCK
EXTERNAL CONTROL
REGISTERS
KDAT, EMDAT, IMDAT, PS2DAT
VCC0
Resources
XTAL2
XTAL1
VCC0
AGND
OUT0, OUT1, OUT7 - OUT11
GPIO00 – GPIO47
VCC1 Controlled
SPI
Interface
SPI
Switch
HSTCLK, HSTCS0#, HSTCS1#
HSTDATAIN, HSTDATAOUT
FLCLK, FLCS0#, FLCS1#
FLDATAIN, FLDATAOUT
 2014 Microchip Technology Inc.
FIGURE 2:
 2014 Microchip Technology Inc.
http://www.microchip.com/packaging
Note: For the most current package drawings,
see the Microchip Packaging Specification at
MEC1308
PACKAGE OUTLINES
128-PIN VTQFP PACKAGE
DS00001753A-page 5
Note: For the most current package drawings,
see the Microchip Packaging Specification at
http://www.microchip.com/packaging
MEC1308
FIGURE 3:
144 BALL TFBGA PACKAGE
DS00001753A-page 6
 2014 Microchip Technology Inc.
MEC1308
APPENDIX A:
TABLE A-1:
PRODUCT BRIEF REVISION HISTORY
REVISION HISTORY
Revision
DS00001753A (05-21-14)
 2014 Microchip Technology Inc.
Section/Figure/Entry
Correction
Document release
DS00001753A-page 7
MEC1308
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DS00001753A-page 8
 2014 Microchip Technology Inc.
MEC1308
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
[X]
-
Temperature
Range
XXX
-
Package
[X](1)
Tape and Reel
Option
Examples:
a)
b)
Device:
MEC1308
Temperature
Range:
Blank
i
Package:
NU
PZV
Tape and Reel
Option:
Blank
TR
=
0°C to
= -40°C to
=
=
+85°C
+85°C
MEC1308-NU for 128-pin VTQFP RoHS
Compliant package
MEC1308-PZV for 144 ball TFBGA
(7mm x 7mm) RoHS Compliant package
(Extended Commercial)
(Industrial)
128-pin VTQFP
144 ball TFBGA
= Standard packaging (tray)
= Tape and Reel(1)
Note 1:
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Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and is
not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
Reel size is 4,000.
DS00001753A-page 9
MEC1308
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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ISBN: 9781632762368
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DS00001753A-page 10
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DS00001753A-page 11