LF PA K PSMN013-30YLC N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology Rev. 3 — 24 October 2011 Product data sheet 1. Product profile 1.1 General description Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High reliability Power SO8 package, qualified to 175°C Optimised for 4.5V Gate drive utilising NextPower Superjunction technology Low parasitic inductance and resistance Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads 1.3 Applications DC-to-DC converters Synchronous buck regulator Load switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - - 30 V ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 - - 32 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 26 W Tj junction temperature -55 - 175 °C VGS = 4.5 V; ID = 10 A; Tj = 25 °C; see Figure 12 - 14.4 16.9 mΩ VGS = 10 V; ID = 10 A; Tj = 25 °C; see Figure 12 - 11.6 13.6 mΩ Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge VGS = 4.5 V; ID = 10 A; VDS = 15 V; see Figure 14; see Figure 15 - 1.2 - nC QG(tot) total gate charge VGS = 4.5 V; ID = 10 A; VDS = 15 V; see Figure 14; see Figure 15 - 4 - nC PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol mb D G S mbb076 1 2 3 4 SOT669 (LFPAK; Power-SO8) 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PSMN013-30YLC LFPAK; Power-SO8 plastic single-ended surface-mounted package; 4 leads SOT669 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 30 V VDGR drain-gate voltage 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 30 V VGS gate-source voltage ID drain current -20 20 V VGS = 10 V; Tmb = 25 °C; see Figure 1 - 32 A VGS = 10 V; Tmb = 100 °C; see Figure 1 - 23 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 4 - 130 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 26 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature VESD electrostatic discharge voltage - 260 °C MM (JEDEC JESD22-A115) 130 - V Source-drain diode IS source current Tmb = 25 °C - 23 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 130 A VGS = 10 V; Tj(init) = 25 °C; ID = 32 A; Vsup ≤ 30 V; RGS = 50 Ω; unclamped; see Figure 3 - 7 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy PSMN013-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 2 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 003aag245 40 03na19 120 ID (A) Pder (%) 30 80 20 40 10 0 0 0 Fig 1. 50 100 150 Tmb (°C) 0 200 50 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aag246 102 IAL (A) 10 (1) (2) 1 10-1 10-3 Fig 3. 10-2 10-1 1 tAL (ms) 10 Single pulse avalanche rating; avalanche current as a function of avalanche time PSMN013-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 3 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 003aag247 103 ID (A) Limit RDSon= V DS / ID 102 tp =10 μ s 100 μ s 10 DC 1 ms 1 10 ms 100 ms 10-1 10-1 Fig 4. 1 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage PSMN013-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 4 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 5 - 5.66 5.83 K/W 003aag248 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 0.05 0.02 δ= P 10-1 tp T single shot t tp T 10-2 10-6 Fig 5. 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN013-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 5 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 27 - - V 1.05 1.68 1.95 V 0.5 - - V Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 10; see Figure 11 ID = 10 mA; VDS = VGS; Tj = 150 °C IDSS drain leakage current ID = 1 mA; VDS = VGS; Tj = -55 °C - - 2.25 V VDS = 30 V; VGS = 0 V; Tj = 25 °C - - 1 µA VDS = 30 V; VGS = 0 V; Tj = 150 °C - - 100 µA - - 100 nA IGSS gate leakage current VGS = 16 V; VDS = 0 V; Tj = 25 °C VGS = -16 V; VDS = 0 V; Tj = 25 °C - - 100 nA RDSon drain-source on-state resistance VGS = 4.5 V; ID = 10 A; Tj = 25 °C; see Figure 12 - 14.4 16.9 mΩ VGS = 4.5 V; ID = 10 A; Tj = 150 °C; see Figure 12; see Figure 13 - - 27.2 mΩ VGS = 10 V; ID = 10 A; Tj = 25 °C; see Figure 12 - 11.6 13.6 mΩ VGS = 10 V; ID = 10 A; Tj = 150 °C; see Figure 12; see Figure 13 - - 22.1 mΩ f = 1 MHz - 2.12 4.24 Ω ID = 10 A; VDS = 15 V; VGS = 10 V; see Figure 14; see Figure 15 - 8.3 - nC ID = 10 A; VDS = 15 V; VGS = 4.5 V; see Figure 14; see Figure 15 - 4 - nC ID = 0 A; VDS = 0 V; VGS = 10 V - 7.7 - nC ID = 10 A; VDS = 15 V; VGS = 4.5 V; see Figure 14; see Figure 15 - 1.3 - nC - 0.9 - nC RG gate resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gate-source charge QGS(th-pl) post-threshold gate-source charge - 0.4 - nC QGD gate-drain charge - 1.2 - nC VGS(pl) gate-source plateau voltage ID = 10 A; VDS = 15 V; see Figure 14; see Figure 15 - 2.7 - V Ciss input capacitance Coss output capacitance VDS = 15 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 16 Crss reverse transfer capacitance td(on) turn-on delay time VDS = 15 V; RL = 0.6 Ω; VGS = 4.5 V; RG(ext) = 4.7 Ω - 521 - pF - 128 - pF - 39 - pF - 11.6 - ns tr rise time - 9.9 - ns td(off) turn-off delay time - 16.3 - ns tf fall time - 6.2 - ns PSMN013-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 6 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit Qoss output charge VGS = 0 V; VDS = 15 V; f = 1 MHz; Tj = 25 °C - 3.3 - nC Source-drain diode VSD source-drain voltage IS = 10 A; VGS = 0 V; Tj = 25 °C; see Figure 17 - 0.86 1.1 V trr reverse recovery time - 16 - ns Qr recovered charge IS = 10 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 15 V - 6 - nC ta reverse recovery rise time 9.5 - ns reverse recovery fall time VGS = 0 V; IS = 10 A; dIS/dt = -100 A/µs; VDS = 15 V; see Figure 18 - tb - 6.5 - ns 003aag249 40 10 ID (A) 003aag250 40 3.5 4.5 RDSon (mΩ) 30 30 VGS (V) = 3.0 20 20 2.8 2.6 10 10 2.4 2.2 0 0 0 Fig 6. 1 2 3 VDS(V) 4 Output characteristics; drain current as a function of drain-source voltage; typical values PSMN013-30YLC Product data sheet 0 Fig 7. 4 8 12 16 VGS (V) 20 Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 7 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 003aag251 50 gfs (S) 003aag252 40 ID (A) 40 30 30 20 20 Tj = 150 °C Tj = 25 °C 10 10 0 0 0 Fig 8. 10 20 30 ID (A) 40 Forward transconductance as a function of drain current; typical values 0 Fig 9. 1 2 3 Transfer characteristics; drain current as a function of gate-source voltage; typical values 003aag253 10-1 VGS (V) 4 003aag254 3 ID (A) VGS(th) (V) 10-2 Min 10-3 Max (1mA) ID=5mA 1mA 2 Typ Max 10-4 1 Min (5mA) 10-5 10-6 0 1 2 VGS (V) 3 Fig 10. Sub-threshold drain current as a function of gate-source voltage PSMN013-30YLC Product data sheet 0 -60 0 60 120 Tj (DC) 180 Fig 11. Gate-source threshold voltage as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 8 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 003aag255 50 2.8 RDSon (mΩ) 003aag256 2 3.0 a 4.5V 40 1.5 VGS (V) = 3.5 30 VGS =10V 1 20 4.5 10 0.5 10 0 0 10 20 30 40 ID (A) 50 Fig 12. Drain-source on-state resistance as a function of drain current; typical values 0 -60 0 60 120 003aag257 VGS (V) ID 180 Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature 10 VDS Tj (DC) 24V 8 VGS(pl) 6V 6 VGS(th) VDS = 15V VGS 4 QGS1 QGS2 QGS QGD QG(tot) 2 003aaa508 0 0 Fig 14. Gate charge waveform definitions PSMN013-30YLC Product data sheet 2 4 6 8 10 QG (nC) Fig 15. Gate-source voltage as a function of gate charge; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 9 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 003aag258 103 IS (A) Ciss C (pF) 30 Coss 102 20 Crss 10 10-1 003aag259 40 1 10 VDS (V) Tj = 150 °C 10 Tj = 25 °C 0 102 0 Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 0.3 0.6 0.9 VSD (V) 1.2 Fig 17. Source current as a function of source-drain voltage; typical values 003a a f 444 ID (A) trr ta tb 0 0.25 IRM I RM t (s ) Fig 18. Reverse recovery timing definition PSMN013-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 10 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 7. Package outline Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads A2 A E SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w M A b 1/2 X c e A (A 3) A1 C θ L detail X y C 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) A UNIT A1 A2 A3 b b2 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 mm b3 b4 2.2 2.0 0.9 0.7 c D (1) c2 D1(1) E(1) E1(1) max 0.25 0.30 4.10 4.20 0.19 0.24 3.80 5.0 4.8 3.3 3.1 e H L L1 L2 w y θ 1.27 6.2 5.8 0.85 0.40 1.3 0.8 1.3 0.8 0.25 0.1 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 06-03-16 11-03-25 MO-235 Fig 19. Package outline SOT669 (LFPAK; Power-SO8) PSMN013-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 11 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN013-30YLC v.3 20111024 Product data sheet - PSMN013-30YLC v.2 - PSMN013-30YLC v.1 Modifications: PSMN013-30YLC v.2 PSMN013-30YLC Product data sheet • • Status changed from preliminary to product. Various changes to content. 20110929 Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 12 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 9. Legal information 9.1 Data sheet status Document status [1] [2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. 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NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 13 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PSMN013-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 October 2011 © NXP B.V. 2011. All rights reserved. 14 of 15 PSMN013-30YLC NXP Semiconductors N-channel 30 V 13.6 mΩ logic level MOSFET in LFPAK using NextPower technology 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Contact information. . . . . . . . . . . . . . . . . . . . . .14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 24 October 2011 Document identifier: PSMN013-30YLC