NUS2401SNT1 D

NUS2401SNT1
Integrated PNP/NPN Digital
Transistors Array
This new option of integrated digital transistors is designed to
replace a discrete solution array of three transistors and their external
resistor bias network. BRTs (Bias Resistor Transistors) contain a
single transistor with a monolithic bias network consisting of two
resistors; a series base resistor and a base−emitter resistor. The BRT
technology eliminates these individual components by integrating
them into a single device, therefore the integration of three BRTs
results in a significant reduction of both system cost and board space.
This new device is packaged in the SC−74/Case 318F package which
is designed for low power surface mount applications.
http://onsemi.com
(6)
(5)
(4)
Q3
Features
•
•
•
•
•
•
Integrated Design
Reduces Board Space and Components Count
Simplifies Circuitry Design
Offered in Surface Mount Package Technology (SC−74)
Available in 3000 Unit Tape and Reel
Pb−Free Package is Available
Q1
(1)
Audio Muting Applications
Drive Circuits Applications
Industrial: Small Appliances, Security Systems, Automated Test
Consumer: TVs and VCRs, Stereo Receivers, CD Players,
Cassette Recorders
MAXIMUM RATINGS (Maximum ratings are those values beyond which
device damage can occur. Electrical Characteristics are not guaranteed over
this range.)
Rating
Symbol
Value
Unit
Collector−Base Voltage
V(BR)CBO
60
Vdc
Collector−Emitter Voltage
V(BR)CEO
50
Vdc
Emitter−Base Voltage
V(BR)EBO
7.0
Vdc
IC
200
mAdc
Symbol
Max
Unit
Power Dissipation
PD
350
mW
Junction Temperature
TJ
150
°C
Storage Temperature
Tstg
−55 to +150
°C
Collector Current − Continuous
THERMAL CHARACTERISTICS
Characteristic
(2)
(3)
MARKING
DIAGRAM
6
Applications
•
•
•
•
Q2
1
SC−74
CASE 318F
STYLE 4
50
M
G
50 M G
G
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
NUS2401SNT1
NUS2401SNT1G
Package
Shipping†
SC−74
3000/Tape & Reel
SC−74
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 3
Publication Order Number:
NUS2401SNT1/D
NUS2401SNT1
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted: TJ = 25°C for typical values, common for Q1, Q2, and Q3, − minus signed for Q3 (PNP) omitted.)
Symbol
Min
Typ
Max
Unit
ICBO
−
−
100
nAdc
ICEO
−
−
500
nAdc
IEBO
−
−
−
−
500
0.1
mA
Collector−Base Breakdown Voltage (IC = 10 mA, IE = 0)
V(BR)CBO
50
−
−
V
Collector−Emitter Breakdown Voltage (Note 1)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
−
V
hFE
35
150
60
350
−
−
−
−
−
−
0.25
0.25
Characteristic
OFF CHARACTERISTICS
Collector−Base Cutoff Current (VCB = 50 V, IE = 0)
Collector−Emitter Cutoff Current (VCE = 50 V, IB = 0)
Emitter−Base Cutoff Current (VCE = 6.0 V, IC = 0)
Q3
Q1, Q2
ON CHARACTERISTICS (Note 1)
DC Current Gain
Q3
Q1, Q2
Collector−Emitter Saturation Voltage
(IC = 10 mA, IB = 0.3 mA)
(IC = 10 mA, IB = 1.0 mA)
Q3
Q1, Q2
VCE(sat)
Vdc
Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
−
−
0.2
V
Output Voltage (off) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW)
VOH
4.9
−
−
V
kW
Input Resistor
Q3
Q1, Q2
R1
7.0
0.13
10
0.175
13
0.22
Resistor Ratio
Q3
Q1, Q2
R1/R2
−
−
1.0
∞
−
−
1. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2%.
http://onsemi.com
2
NUS2401SNT1
VCE(sat), MAXIMUM COLLECTOR VOLTAGE (V)
PD, POWER DISSIPATION (mW)
400
350
300
250
200
150
100
RqJA = 357°C/W
50
0
−50
0
50
100
TA, AMBIENT TEMPERATURE (°C)
150
1
TA = −25°C
0.1
75°C
25°C
0.01
IC/IB = 10
0
10
Figure 1. Derating Curve
Cob, CAPACITANCE (pF)
hFE, DC CURRENT GAIN
80
6
75°C
25°C
TA = −25°C
100
VCE = 10 V
1
10
IC, COLLECTOR CURRENT (mA)
4
3
2
1
0
100
f = 1 MHz
IE = 0 V
TA = 25°C
5
0
10
Figure 3. DC Current Gain
30
40
20
50
IC, COLLECTOR CURRENT (mA)
60
Figure 4. Output Capacitance
100
10
25°C
Vin, INPUT VOLTAGE (V)
IC, COLLECTOR CURRENT (mA)
70
Figure 2. Maximum Collector Voltage versus
Collector Current
1000
10
20
50
60
30
40
IC, COLLECTOR CURRENT (mA)
TA = 75°C
−25°C
10
VO = 5 V
1
0
0.1
0.2
0.3 0.4 0.5 0.6 0.7
Vin, INPUT VOLTAGE (V)
0.8
0.9
25°C
1
0.1
1
Figure 5. Output Current versus Input Voltage
−25°C
TA = 75°C
VO = 0.2 V
0
10
30
40
20
50
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage versus Output Current
http://onsemi.com
3
60
NUS2401SNT1
1000
1
IC/IB = 10
hFE , DC CURRENT GAIN (NORMALIZED)
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS − Q3 (PNP)
TA=−25°C
0.1
25°C
75°C
0.01
0
20
25°C
100
10
−25°C
10
IC, COLLECTOR CURRENT (mA)
Figure 7. VCE(sat) versus IC
Figure 8. DC Current Gain
50
1
100
3
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
lE = 0 V
TA = 25°C
2
1
0
10
20
30
40
VR, REVERSE BIAS VOLTAGE (VOLTS)
TA=−25°C
10
1
0.1
0.01
0.001
50
100
VO = 5 V
0
1
2
3
4
5
6
7
Vin, INPUT VOLTAGE (VOLTS)
VO = 0.2 V
TA=−25°C
25°C
75°C
1
0
10
8
9
Figure 10. Output Current versus Input
Voltage
10
0.1
100
25°C
75°C
Figure 9. Output Capacitance
V in , INPUT VOLTAGE (VOLTS)
Cob , CAPACITANCE (pF)
TA=75°C
IC, COLLECTOR CURRENT (mA)
40
4
0
VCE = 10 V
20
30
IC, COLLECTOR CURRENT (mA)
40
50
Figure 11. Input Voltage versus Output Current
http://onsemi.com
4
10
NUS2401SNT1
PACKAGE DIMENSIONS
SC−74
CASE 318F−05
ISSUE L
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. 318F−01, −02, −03 OBSOLETE. NEW
STANDARD 318F−04.
D
6
HE
1
5
4
2
3
E
MILLIMETERS
DIM
MIN
NOM
MAX
MIN
A
0.90
1.00
1.10
0.035
A1
0.01
0.06
0.10
0.001
b
0.25
0.37
0.50
0.010
c
0.10
0.18
0.26
0.004
D
2.90
3.00
3.10
0.114
E
1.30
1.50
1.70
0.051
e
0.85
0.95
1.05
0.034
L
0.20
0.40
0.60
0.008
HE
2.50
2.75
3.00
0.099
0°
0°
10°
q
−
STYLE 4:
PIN 1. COLLECTOR 2
2. EMITTER 1/EMITTER 2
3. COLLECTOR 1
4. EMITTER 3
5. BASE 1/BASE 2/COLLECTOR 3
6. BASE 3
b
e
0.05 (0.002)
q
C
A
L
A1
INCHES
NOM
0.039
0.002
0.015
0.007
0.118
0.059
0.037
0.016
0.108
−
MAX
0.043
0.004
0.020
0.010
0.122
0.067
0.041
0.024
0.118
10°
SOLDERING FOOTPRINT*
2.4
0.094
0.95
0.037
1.9
0.074
0.95
0.037
0.7
0.028
1.0
0.039
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
5
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NUS2401SNT1/D