NTD4909N Power MOSFET 30 V, 41 A, Single N−Channel, DPAK/IPAK Features Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb−Free Devices http://onsemi.com RDS(on) MAX V(BR)DSS Applications • CPU Power Delivery • DC−DC Converters 8.0 mW @ 10 V 30 V D Symbol Value Unit Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS "20 V ID 12.1 A Parameter TA = 25°C TA = 100°C Power Dissipation (RqJA) (Note 1) TA = 25°C Continuous Drain Current (RqJA) (Note 2) TA = 25°C S 8.6 PD 2.6 W 4 4 ID TA = 100°C TA = 25°C TC = 25°C 6.2 PD ID TC = 100°C Power Dissipation (RqJC) (Note 1) tp=10ms Current Limited by Package 1.37 W A 41 29 TC = 25°C PD 29.4 W TA = 25°C IDM 167 A TA = 25°C IDmaxPkg 60 A Operating Junction and Storage Temperature Source Current (Body Diode) TJ, Tstg −55 to 175 °C IS 27 A Drain to Source dV/dt dV/dt 7.0 V/ns Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, L = 0.1 mH, IL(pk) = 24 A, RG = 25 W) EAS 28 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) 4 A 8.8 TL °C 260 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. 1 2 1 3 CASE 369AA DPAK (Bent Lead) STYLE 2 2 3 1 2 3 CASE 369AD CASE 369D IPAK IPAK (Straight Lead) (Straight Lead DPAK) MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain AYWW 49 09NG Steady State Continuous Drain Current (RqJC) (Note 1) Pulsed Drain Current N−Channel G AYWW 49 09NG Power Dissipation (RqJA) (Note 2) 41 A 12 mW @ 4.5 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Continuous Drain Current (RqJA) (Note 1) ID MAX 4 Drain AYWW 49 09NG • • • • 2 1 2 3 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source A Y WW 4909N G = Assembly Location = Year = Work Week = Device Code = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. © Semiconductor Components Industries, LLC, 2014 May, 2014 − Rev. 3 1 Publication Order Number: NTD4909N/D NTD4909N THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction−to−Case (Drain) Parameter RqJC 5.1 °C/W Junction−to−TAB (Drain) RqJC−TAB 4.3 Junction−to−Ambient − Steady State (Note 3) RqJA 58.2 Junction−to−Ambient − Steady State (Note 4) RqJA 110 3. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu. 4. Surface−mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS V 15 Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = "20 V VGS(TH) VGS = VDS, ID = 250 mA VGS = 0 V, VDS = 24 V TJ = 25°C mV/°C 1.0 TJ = 125°C mA 10 "100 nA 2.2 V ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Resistance VGS(TH)/TJ RDS(on) gFS 1.7 4.0 VGS = 10 V VGS = 4.5 V Forward Transconductance 1.0 ID = 30 A 6.5 ID = 15 A 6.5 ID = 30 A 9.5 ID = 15 A 9.5 VDS = 1.5 V, ID = 30 A mV/°C 8.0 mW 12 52 S 1314 pF CHARGES AND CAPACITANCES Input Capacitance Ciss VGS = 0 V, f = 1.0 MHz, VDS = 15 V Output Capacitance Coss Reverse Transfer Capacitance Crss 17.4 Total Gate Charge QG(TOT) 7.6 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge Total Gate Charge 487 nC VGS = 4.5 V, VDS = 15 V, ID = 30 A 2.1 VGS = 10 V, VDS = 15 V, ID = 30 A 17.5 nC td(on) 11 ns tr VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 21 QGD QG(TOT) 4.3 1.3 SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(off) tf 17 2.7 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 6. Switching characteristics are independent of operating junction temperatures. 7. Assume terminal length of 110 mils. http://onsemi.com 2 NTD4909N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Symbol Test Condition Min Typ td(on) 8.0 tr 19 td(off) VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf Max Unit ns 21 2.3 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD VGS = 0 V, IS = 30 A TJ = 25°C 0.9 TJ = 125°C 0.8 tRR 30 Charge Time ta 16 Discharge Time tb Reverse Recovery Time VGS = 0 V, dIs/dt = 100 A/ms, IS = 30 A 1.1 V ns 14 QRR 20 nC Source Inductance (Note 7) LS 2.99 nH Drain Inductance, DPAK LD 0.0164 Drain Inductance, IPAK (Note 7) LD Gate Inductance (Note 7) LG 4.9 Gate Resistance RG 1.0 PACKAGE PARASITIC VALUES TA = 25°C 1.88 2.0 W Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 6. Switching characteristics are independent of operating junction temperatures. 7. Assume terminal length of 110 mils. ORDERING INFORMATION Package Shipping† NTD4909NT4G DPAK (Pb−Free) 2500 / Tape & Reel NTD4909N−1G IPAK (Pb−Free) 75 Units / Rail NTD4909N−35G IPAK Trimmed Lead (Pb−Free) 75 Units / Rail Order Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 NTD4909N TYPICAL CHARACTERISTICS 90 7 V 4.5 V 10 V 4.2 V VGS = 4.0 V VDS = 10 V 70 60 3.6 V 50 3.4 V 40 3.2 V 30 3.0 V 20 2.8 V 10 2.6 V 2.4 V 0 1 2 ID, DRAIN CURRENT (A) 3.8 V 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 80 TJ = 25°C 3 40 TJ = 25°C 20 4 TJ = 125°C TJ = −55°C 2.0 2.5 3.0 3.5 4.0 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.020 ID = 30 A TJ = 25°C 0.018 0.016 0.014 0.012 0.010 0.008 0.006 0.004 3.0 60 0 4.0 5.0 6.0 7.0 8.0 9.0 VGS (V) 10 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) 80 4.5 0.014 0.013 TJ = 25°C 0.012 0.011 0.010 VGS = 4.5 V 0.009 0.008 VGS = 10 V 0.007 0.006 0.005 0.004 15 25 35 45 55 65 75 85 95 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and Gate Voltage VGS = 0 V 1.8 ID = 30 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 10,000 2.0 1.6 1.4 1.2 1.0 TJ = 150°C 1000 TJ = 125°C 100 TJ = 85°C 0.8 0.6 −50 −25 10 0 25 50 75 100 125 150 175 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 4 30 NTD4909N TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) 2000 C, CAPACITANCE (pF) VGS = 0 V TJ = 25°C 1500 Ciss 1000 Coss 500 Crss 0 0 5 10 15 20 25 15.0 10.5 Qgs 4.5 VDD = 15 V VGS = 10 V ID = 30 A 3.0 1.5 0 0 2 4 8 6 10 12 14 16 18 Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 20 30 VGS = 0 V IS, SOURCE CURRENT (A) t, TIME (ns) Qgd 6.0 30 td(off) 100 tf tr 10 td(on) 25 20 15 TJ = 125°C 10 5 TJ = 25°C 0 1 1 10 0 100 0.2 0.4 0.6 0.8 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) 1000 ID, DRAIN CURRENT (A) 9.0 7.5 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VDD = 15 V ID = 15 A VGS = 10 V 100 10 ms 100 ms 1 ms 10 0.1 QT 12.0 1000 1 TJ = 25°C 13.5 VGS = 10 V Single Pulse TC = 25°C RDS(on) Limit Thermal Limit Package Limit 0.1 10 ms dc 1 10 30 ID = 24 A 25 20 15 10 5 0 25 100 50 75 100 125 150 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 175 NTD4909N TYPICAL CHARACTERISTICS 100 R(t) (°C/W) 10 Duty Cycle = 50% 20% 10% 5% 2% 1 1% 0.1 Single Pulse 0.01 Psi Tab−A 0.000001 0.00001 0.0001 0.001 0.1 0.01 1 10 PULSE TIME (sec) Figure 13. FET Thermal Response 60 50 40 GFS (S) 0.001 30 20 10 0 0 5 10 15 20 25 30 35 ID (A) Figure 14. GFS vs. ID http://onsemi.com 6 40 45 50 100 1000 NTD4909N PACKAGE DIMENSIONS 3.5 MM IPAK, STRAIGHT LEAD CASE 369AD ISSUE B E E3 L2 NOTES: 1.. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30mm FROM TERMINAL TIP. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD GATE OR MOLD FLASH. A E2 A1 D2 D L1 L T SEATING PLANE A1 b1 e 2X A2 3X E2 b 0.13 M T D2 DIM A A1 A2 b b1 D D2 E E2 E3 e L L1 L2 MILLIMETERS MIN MAX 2.19 2.38 0.46 0.60 0.87 1.10 0.69 0.89 0.77 1.10 5.97 6.22 4.80 −−− 6.35 6.73 4.57 5.45 4.45 5.46 2.28 BSC 3.40 3.60 −−− 2.10 0.89 1.27 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN OPTIONAL CONSTRUCTION IPAK CASE 369D ISSUE C C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 −T− SEATING PLANE K J F H D G DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− 3 PL 0.13 (0.005) M STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN T http://onsemi.com 7 MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− NTD4909N PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C A A E b3 c2 B 4 L3 Z D 1 2 H DETAIL A 3 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z L4 b2 e c b 0.005 (0.13) M C H L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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