HV QF N3 2 SOT617-11 DFN5050-32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals 8 February 2016 Package information 1. Package summary Terminal position code Q (quad) Package type descriptive code HVQFN32 Package type industry code HVQFN32 Package style descriptive code HVQFN (thermal enhanced very thin quad flatpack; no leads) Package style suffix code NA (not applicable) Package body material type P (plastic) JEDEC package outline code MO-220 Mounting method type S (surface mount) Issue date 29-1-2013 Table 1. Package summary Symbol Parameter Min Typ Nom Max Unit D package length 4.9 - 5 5.1 mm E package width 4.9 - 5 5.1 mm A seated height 0.8 - 0.85 1 mm e nominal pitch - - 0.5 - mm n2 actual quantity of termination - - 32 - SOT617-11 NXP Semiconductors DFN5050-32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals 2. Package outline HVQFN32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm D B SOT617-11 A terminal 1 index area E A A1 c detail X e1 1/2 e e v w b 9 16 C C A B C y1 C y L 8 17 e e2 Eh 1/2 e 1 24 terminal 1 index area 32 X 25 Dh 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A A1 b max 1.00 0.05 0.30 nom 0.85 0.02 0.21 min 0.80 0.00 0.18 c D(1) Dh E(1) Eh e e1 e2 L v 0.2 5.1 5.0 4.9 3.8 3.7 3.6 5.1 5.0 4.9 3.8 3.7 3.6 0.5 3.5 3.5 0.45 0.40 0.35 0.1 w y 0.05 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT617-11 References IEC JEDEC JEITA sot617-11_po European projection Issue date 12-09-11 13-01-29 MO-220 Fig. 1. Package outline HVQFN32 (SOT617-11) SOT617-11 Package information All information provided in this document is subject to legal disclaimers. 8 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved 2/5 SOT617-11 NXP Semiconductors DFN5050-32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals 3. Soldering Footprint information for reflow soldering of HVQFN32 package SOT617-11 6.1 5.8 5.3 4.2 0.15 0.5 0.25 0.25 6.1 5.8 5.3 4.2 0.9 3.2 3.6 0.2 X 0.2 0.25 0.9 0.5 0.25 3.2 3.6 0.75 0.8 solder land solder paste deposit solder land plus solder paste detail X occupied area Issue date 13-10-28 13-11-06 Dimensions in mm sot617-11_fr Fig. 2. Reflow soldering footprint for HVQFN32 (SOT617-11) SOT617-11 Package information All information provided in this document is subject to legal disclaimers. 8 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved 3/5 SOT617-11 NXP Semiconductors DFN5050-32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals 4. Legal information Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. SOT617-11 Package information All information provided in this document is subject to legal disclaimers. 8 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved 4/5 SOT617-11 NXP Semiconductors DFN5050-32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals 5. Contents 1. Package summary........................................................ 1 2. Package outline............................................................ 2 3. Soldering....................................................................... 3 4. Legal information......................................................... 4 © NXP Semiconductors N.V. 2016. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 8 February 2016 SOT617-11 Package information All information provided in this document is subject to legal disclaimers. 8 February 2016 © NXP Semiconductors N.V. 2016. All rights reserved 5/5