CM1426 LCD and Camera EMI Filter Array with ESD Protection Product Description The CM1426 is a family of pi−style EMI filter arrays with ESD protection, which integrates four, six and eight filters (C−R−C) in a Chip Scale Package with 0.50 mm pad pitch. The CM1426 has component values of 8.5 pF − 100 − 8.5 pF per channel. The CM1426 has a cut−off frequency of 230 MHz and can be used in applications where the data rates are as high as 92 Mbps. The parts include avalanche−type ESD diodes on every pin that provide a very high level of protection for sensitive electronic components against possible ESD strikes. The ESD protection diodes safely dissipate ESD strikes of ±8 kV, well beyond the maximum requirement of the IEC61000−4−2 international standard. Using the MIL−STD−883 (Method 3015) specification for Human Body Model (HBM) ESD, the pins are protected for contact discharges at greater than ±15 kV. These devices are particularly well−suited for portable electronics (e.g. wireless handsets, PDAs, notebook computers) because of their small package and easy−to−use pin assignments. In particular, the CM1426 is ideal for EMI filtering and protecting data and control lines for the I/O data ports, LCD display and camera interface in mobile handsets. The CM1426 incorporates OptiGuardt which results in improved reliability at assembly. The CM1426 is available in a space−saving, low−profile Chip Scale Package with RoHS compliant lead−free finishing. Features • Four, Six and Eight Channels of EMI Filtering with Integrated ESD Protection • 0.5 mm Pitch, 10−Bump, 1.96 mm x 1.33 mm Footprint Chip • • • • • • http://onsemi.com WLCSP10 CP SUFFIX CASE 567BL WLCSP15 CP SUFFIX CASE 567BL WLCSP20 CP SUFFIX CASE 567BX MARKING DIAGRAM N264 N266 N268 CM1426−04 CM1426−06 CM1426−08 N264 N266 N268 = CM1426−04CP = CM1426−06CP = CM1426−08CP ORDERING INFORMATION Device Package Shipping† CM1426−04CP CSP−10 (Pb−Free) 3500/Tape & Reel CM1426−06CP CSP−15 (Pb−Free) 3500/Tape & Reel Scale Package (CM1426−04) CM1426−08CP CSP−20 3500/Tape & Reel 0.5 mm Pitch, 15−Bump, 2.96 mm x 1.33 mm Footprint Chip (Pb−Free) Scale Package (CM1426−06) †For information on tape and reel specifications, 0.5 mm Pitch, 20−Bump, 3.96 mm x 1.33 mm Footprint Chip including part orientation and tape sizes, please Scale Package (CM1426−08) refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Pi−Style EMI Filters in a Capacitor−Resistor−Capacitor (C−R−C) Network ±8 kV ESD Protection on Each Channel • Greater than 20 dB Attenuation (Typical) at 1 GHz (IEC 61000−4−2 Level 4, Contact Discharge) • OptiGuardtCoated for Improved Reliability at ±15 kV ESD Protection on Each Channel (HBM) Assembly These Devices are Pb−Free and are RoHS Compliant Applications • LCD and Camera Data Lines in Mobile Handsets • I/O Port Protection for Mobile Handsets, Notebook • Wireless Handsets • Handheld PCs/PDAs • LCD and Camera Modules Computers, PDAs, etc. • EMI Filtering for Data Ports in Cell Phones, PDAs or Notebook Computers © Semiconductor Components Industries, LLC, 2011 March, 2011 − Rev. 3 1 Publication Order Number: CM1426/D CM1426 BLOCK DIAGRAM 100 FILTER+ESDn* (Pins A1−An) 8.5 pF FILTER+ESDn* (Pins C1−Cn) 8.5 pF GND (Pins B1−Bm) 1 of 4, 6 or 8 EMI/RFI + ESD Channels *See Package/Pinout Diagrams for expanded pin information. PACKAGE / PINOUT DIAGRAMS Top View (Bumps Down View) Orientation Marking A + 1 2 3 Bottom View (Bumps Up View) 4 C1 N264 B C3 B1 Orientation Marking C C2 A1 A1 C4 B2 A2 A3 A4 C3 C4 C5 CM1426−04CP 10 Bump CSP Package Orientation Marking A + 1 2 3 4 5 6 C1 N266 B Orientation Marking B1 Orientation Marking C C2 B2 C6 B3 A1 A1 A2 A3 A4 A5 A6 C2 C3 C4 C5 C6 C7 CM1426−06CP 15 Bump CSP Package + A B C 1 2 3 4 5 6 7 8 C1 N268 Orientation Marking CM1426−08CP 20 Bump CSP Package http://onsemi.com 2 B1 A1 A1 B2 A2 A3 B3 A4 A5 C8 B4 A6 A7 A8 CM1426 Table 1. PIN DESCRIPTIONS Pin(s) Name Pin(s) Name A1 FILTER1 Filter + ESD Channel 1 Description C1 FILTER1 Filter + ESD Channel 1 Description A2 FILTER2 Filter + ESD Channel 2 C2 FILTER2 Filter + ESD Channel 2 A3 FILTER3 Filter + ESD Channel 3 C3 FILTER3 Filter + ESD Channel 3 A4 FILTER4 Filter + ESD Channel 4 C4 FILTER4 Filter + ESD Channel 4 A5 FILTER5 Filter + ESD Channel 5 C5 FILTER5 Filter + ESD Channel 5 A6 FILTER6 Filter + ESD Channel 6 C6 FILTER6 Filter + ESD Channel 6 A7 FILTER7 Filter + ESD Channel 7 C7 FILTER7 Filter + ESD Channel 7 A8 FILTER8 Filter + ESD Channel 8 C8 FILTER8 Filter + ESD Channel 8 B1−B4 GND Device Ground SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units −65 to +150 °C DC Power per Resistor 100 mW DC Package Power Rating 500 mW Storage Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 3. STANDARD OPERATING CONDITIONS Parameter Operating Temperature Range Rating Units −40 to +85 °C Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol R CTOTAL Parameter Conditions Resistance Min Typ Max Units 80 100 120 Total Channel Capacitance At 2.5 VDC Reverse Bias, 1 MHz, 30 mVAC 13.6 17 20.4 pF C Capacitance C1 At 2.5 VDC Reverse Bias, 1 MHz, 30 mVAC 6.8 8.5 10.2 pF VDIODE Standoff Voltage IDIODE = 10 A 6.0 ILEAK Diode Leakage Current (reverse bias) VDIODE = 3.3 V 0.1 1 VSIG Signal Clamp Voltage Positive Clamp Negative Clamp ILOAD = 10 mA ILOAD = −10 mA 6.8 −0.8 9.0 −0.4 VESD In−system ESD Withstand Voltage a) Human Body Model, MIL−STD−883, Method 3015 b) Contact Discharge per IEC 61000−4−2 Level 4 RDYN Dynamic Resistance Positive Negative fC (Note 2) 5.6 −1.5 R = 100 , C = 17 pF 1. TA = 25°C unless otherwise specified. 2. ESD applied to input and output pins with respect to GND, one at a time. http://onsemi.com 3 A V kV ±15 ±8 2.3 0.9 Cut−off Frequency ZSOURCE = 50 , ZLOAD = 50 V 230 MHz CM1426 PERFORMANCE INFORMATION Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 1. Insertion Loss vs. Frequency (A1−C1 to GND B1) Figure 2. Insertion Loss vs. Frequency (A2−C2 to GND B1) http://onsemi.com 4 CM1426 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 3. Insertion Loss vs. Frequency (A3−C3 to GND B2) Figure 4. Insertion Loss vs. Frequency (A4−C4 to GND B2) http://onsemi.com 5 CM1426 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 5. Insertion Loss vs. Frequency (A5−C5 to GND B3) Figure 6. Insertion Loss vs. Frequency (A6−C6 to GND B3) http://onsemi.com 6 CM1426 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 7. Insertion Loss vs. Frequency (A7−C7 to GND B4) Figure 8. Insertion Loss vs. Frequency (A8−C8 to GND B4) http://onsemi.com 7 CM1426 PERFORMANCE INFORMATION (Cont’d) Typical Diode Capacitance vs. Input Voltage Figure 9. Filter Capacitance vs. Input Voltage over Temperature (normalized to capacitance at 2.5 VDC and 255C) http://onsemi.com 8 CM1426 APPLICATION INFORMATION Table 5. PRINTED CIRCUIT BOARD RECOMMENDATIONS Parameter Value Pad Size on PCB 0.240 mm Pad Shape Round Pad Definition Non−Solder Mask defined pads Solder Mask Opening 0.290 mm Round Solder Stencil Thickness 0.125 − 0.150 mm Solder Stencil Aperture Opening (laser cut, 5% tapered walls) 0.300 mm Round Solder Flux Ratio 50/50 by volume Solder Paste Type No Clean Pad Protective Finish OSP (Entek Cu Plus 106A) Tolerance − Edge To Corner Ball ±50 m Solder Ball Side Coplanarity ±20 m Maximum Dwell Time Above Liquidous 60 seconds Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste 260°C Non−Solder Mask Defined Pad 0.240 mm DIA. Solder Stencil Opening 0.300 mm DIA. Solder Mask Opening 0.290 mm DIA. Figure 10. Recommended Non−Solder Mask Defined Pad Illustration Temperature (5C) 250 200 150 100 50 0 1:00.0 2:00.0 3:00.0 Time (minutes) 4:00.0 Figure 11. Lead−free (SnAgCu) Solder Ball Reflow Profile http://onsemi.com 9 CM1426 PACKAGE DIMENSIONS WLCSP10, 1.96x1.33 CASE 567BL−01 ISSUE O PIN A1 REFERENCE 2X ÈÈ ÈÈ D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B E DIM A A1 A2 b D E eD eE 0.05 C 2X 0.05 C TOP VIEW OptiGuard Option 0.05 C ÉÉÉÉÉÉ A2 RECOMMENDED SOLDERING FOOTPRINT* A 0.05 C NOTE 3 A1 SIDE VIEW MILLIMETERS MIN MAX 0.72 0.56 0.21 0.27 0.40 REF 0.29 0.35 1.96 BSC 1.33 BSC 0.50 BSC 0.435 BSC C 0.25 SEATING PLANE A1 0.25 PACKAGE OUTLINE eD 10X 0.05 C A B 0.03 C 0.87 eD/2 b eE C 0.44 B 0.50 PITCH A 1 2 3 4 5 6 10X 0.25 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. BOTTOM VIEW http://onsemi.com 10 CM1426 PACKAGE DIMENSIONS WLCSP15, 2.96x1.33 CASE 567BS−01 ISSUE O PIN A1 REFERENCE 2X D ÈÈ A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B E DIM A A1 A2 b D E eD eE 0.05 C 2X 0.05 C TOP VIEW A2 0.05 C A RECOMMENDED SOLDERING FOOTPRINT* 0.05 C NOTE 3 A1 C SIDE VIEW SEATING PLANE eD/2 15X 0.05 C A B 0.03 C PACKAGE OUTLINE A1 0.87 eD b eE 0.44 C 15X 0.50 PITCH B A 1 2 3 4 5 6 MILLIMETERS MIN MAX 0.65 0.56 0.21 0.27 0.40 REF 0.29 0.35 2.96 BSC 1.33 BSC 0.50 BSC 0.435 BSC 0.25 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 7 8 9 BOTTOM VIEW http://onsemi.com 11 CM1426 PACKAGE DIMENSIONS WLCSP20, 3.96x1.33 CASE 567BX−01 ISSUE O PIN A1 REFERENCE 2X D ÈÈ A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B E DIM A A1 A2 b D E eD eE 0.05 C 2X 0.05 C TOP VIEW ÉÉÉÉÉÉÉÉÉÉ OptiGuard Option 0.05 C A2 MILLIMETERS MIN MAX 0.56 0.72 0.21 0.27 0.40 REF 0.29 0.35 3.96 BSC 1.33 BSC 0.50 BSC 0.435 BSC A 0.05 C NOTE 3 A1 C SIDE VIEW SEATING PLANE eD/2 20X eD b 0.05 C A B 0.03 C eE C B A 1 2 3 4 5 6 7 8 9 10 11 12 BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* PACKAGE OUTLINE A1 0.87 0.44 20X 0.50 PITCH 0.25 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. OptiGuardt is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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