CM1442 LCD and Camera EMI Filter Array with ESD Protection Product Description The CM1442 is a family of pi−style EMI filter arrays with ESD protection, which integrates six and eight filters (C−R−C) in Chip Scale Package form factor with 0.40 mm pitch. The CM1442 has component values of 15 pF − 100 W − 15 pF per channel. The CM1442 has a cut−off frequency of 120 MHz and can be used in applications where the data rates are as high as 48 Mbps. The parts include avalanche−type ESD diodes on every pin, which provide a very high level of protection for sensitive electronic components that may be subjected to electrostatic discharge (ESD). The ESD protection diodes safely dissipate ESD strikes of ±15 kV, well beyond the maximum requirement of the IEC61000−4−2 international standard. Using the MIL−STD−883 (Method 3015) specification for Human Body Model (HBM) ESD, the pins are protected for contact discharges at greater than ±30 kV. This device is particularly well suited for portable electronics (e.g. wireless handsets, PDAs, notebook computers) because of its small package format and easy−to−use pin assignments. In particular, the CM1442 is ideal for EMI filtering and protecting data and control lines for the I/O data ports, LCD display and camera interface in mobile handsets. The CM1442 incorporates OptiGuardt which results in improved reliability at assembly. The CM1442 is available in a space−saving, low−profile Chip Scale Package with RoHS compliant lead−free finishing. It is manufactured with a 0.40 mm pitch and 0.25 mm CSP solder ball to provide up to 28% board space saving versus competing CSP devices with 0.50 mm pitch and 0.30 mm CSP solder ball. http://onsemi.com WLCSP15 CP SUFFIX CASE 567BP MARKING DIAGRAM N426 N428 CM1442−06 15−Bump CSP Package CM1442−08 20−Bump CSP Package N426 N428 Device Package Shipping† CM1442−06CP CSP−15 (Pb−Free) 3500/Tape & Reel CM1442−08CP CSP−20 (Pb−Free) 3500/Tape & Reel Protection • 0.4 mm Pitch, 15−Bump, 2.360 mm x 1.053 mm Footprint Chip • • • • • †For information on tape and reel specifications, including part orientation and tape sizes, please Scale Package (CM1442−06) refer to our Tape and Reel Packaging Specification 0.4 mm Pitch, 20−Bump, 3.160 mm x 1.053 mm Footprint Chip Brochure, BRD8011/D. Scale Package (CM1442−08) Pi−Style EMI Filters in a Capacitor−Resistor−Capacitor • Greater than 30 dB Attenuation (Typical) at 1 GHz (C−R−C) Network • Chip Scale Package Features Extremely Low Lead ±15 kV ESD Protection on Each Channel Inductance for Optimum Filter and ESD Performance (IEC 61000−4−2 Level 4, Contact Discharge) • OptiGuardtCoated for Improved Reliability at ±30 kV ESD Protection on Each Channel (HBM) Assembly These Devices are Pb−Free and are RoHS Compliant Applications • LCD and Camera Data Lines in Mobile Handsets • I/O Port Protection for Mobile Handsets, Notebook • = CM1442−06CP = CM1442−08CP ORDERING INFORMATION Features • Six and Eight Channels of EMI Filtering with Integrated ESD WLCSP20 CP SUFFIX CASE 567BU • EMI Filtering for Data Ports in Cell Phones, PDAs or Notebook Computers • Handheld PCs/PDAs • LCD and Camera Modules Computers, PDAs, etc. Wireless Handsets © Semiconductor Components Industries, LLC, 2011 March, 2011 − Rev. 3 1 Publication Order Number: CM1442/D CM1442 BLOCK DIAGRAM 100 W FILTER+ESDn* (Pins A1−An) 15 pF GND (Pins B1−Bm where m = n/2) FILTER+ESDn* (Pins C1−Cn) 15 pF 1 of 6 or 8 EMI/RFI + ESD Channels *See Package/Pinout Diagrams for expanded pin information. PACKAGE / PINOUT DIAGRAMS Top View (Bumps Down View) Orientation Marking (see Note) A + 1 2 3 4 5 Bottom View (Bumps Up View) 6 C1 N426 B C3 B1 Orientation Marking C C2 C4 C5 B2 C6 B3 A1 A1 A2 A3 A4 A5 A6 C2 C3 C4 C5 C6 C7 CM1442−06CP 15 Bump CSP Package Orientation Marking (see Note) + A 1 2 4 3 5 6 7 8 C1 N428 B Orientation Marking C B1 A1 A1 B2 A2 A3 B3 A4 A5 C8 B4 A6 A7 A8 CM1442−08CP 20 Bump CSP Package Note: Lead−free devices are specified by using a “+” character for the top side orientation mark. Table 1. PIN DESCRIPTIONS Pins Name A1 FILTER1 A2 FILTER2 A3 Description Pins Name Filter + ESD Channel 1 C1 FILTER1 Filter + ESD Channel 1 Filter + ESD Channel 2 C2 FILTER2 Filter + ESD Channel 2 FILTER3 Filter + ESD Channel 3 C3 FILTER3 Filter + ESD Channel 3 A4 FILTER4 Filter + ESD Channel 4 C4 FILTER4 Filter + ESD Channel 4 A5 FILTER5 Filter + ESD Channel 5 C5 FILTER5 Filter + ESD Channel 5 A6 FILTER6 Filter + ESD Channel 6 C6 FILTER6 Filter + ESD Channel 6 A7 FILTER7 Filter + ESD Channel 7 C7 FILTER7 Filter + ESD Channel 7 A8 FILTER8 Filter + ESD Channel 8 C8 FILTER8 Filter + ESD Channel 8 B1−B4 GND Device Ground http://onsemi.com 2 Description CM1442 SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units −65 to +150 °C DC Power per Resistor 100 mW DC Package Power Rating 500 mW Storage Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 3. STANDARD OPERATING CONDITIONS Parameter Operating Temperature Range Rating Units −40 to +85 °C Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol R Parameter Conditions Typ Max Units 80 100 120 W Total Channel Capacitance At 2.5 VDC Reverse Bias, 1 MHz, 30 mVAC 24 30 36 pF C Capacitance C1 At 2.5 VDC Reverse Bias, 1 MHz, 30 mVAC 12 15 18 pF VDIODE Standoff Voltage IDIODE = 10 mA 6.0 ILEAK Diode Leakage Current (reverse bias) VDIODE = 3.3 V 0.1 1 VSIG Signal Clamp Voltage Positive Clamp Negative Clamp ILOAD = 10 mA ILOAD = −10 mA 6.8 −0.8 9.0 −0.4 VESD In−system ESD Withstand Voltage a) Human Body Model, MIL−STD−883, Method 3015 b) Contact Discharge per IEC 61000−4−2 Level 4 RDYN Dynamic Resistance Positive Negative CTOTAL fC Resistance Min (Notes 2 and 3) 5.6 −1.5 R = 100 W, C = 15 pF 1. TA = 25°C unless otherwise specified. 2. ESD applied to input and output pins with respect to GND, one at a time. 3. Unused pins are left open. http://onsemi.com 3 mA V kV ±30 ±15 2.3 0.9 Cut−off Frequency ZSOURCE = 50 W, ZLOAD = 50 W V 115 W MHz CM1442 PERFORMANCE INFORMATION Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 1. Insertion Loss vs. Frequency (A1−C1 to GND B1) Figure 2. Insertion Loss vs. Frequency (A2−C2 to GND B1) http://onsemi.com 4 CM1442 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 3. Insertion Loss vs. Frequency (A3−C3 to GND B2) Figure 4. Insertion Loss vs. Frequency (A4−C4 to GND B2) http://onsemi.com 5 CM1442 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 5. Insertion Loss vs. Frequency (A5−C5 to GND B3) Figure 6. Insertion Loss vs. Frequency (A6−C6 to GND B3) http://onsemi.com 6 CM1442 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 7. Insertion Loss vs. Frequency (A7−C7 to GND B4, CM1442−08CP Only) Figure 8. Insertion Loss vs. Frequency (A8−C8 to GND B4, CM1442−08CP Only) http://onsemi.com 7 CM1442 PERFORMANCE INFORMATION (Cont’d) Typical Diode Capacitance vs. Input Voltage Figure 9. Filter Capacitance vs. Input Voltage (normalized to capacitance at 2.5 VDC and 255C) http://onsemi.com 8 CM1442 APPLICATION INFORMATION Table 5. PRINTED CIRCUIT BOARD RECOMMENDATIONS Parameter Value Pad Size on PCB 0.240 mm Pad Shape Round Pad Definition Non−Solder Mask defined pads Solder Mask Opening 0.290 mm Round Solder Stencil Thickness 0.125 − 0.150 mm Solder Stencil Aperture Opening (laser cut, 5% tapered walls) 0.300 mm Round Solder Flux Ratio 50/50 by volume Solder Paste Type No Clean Pad Protective Finish OSP (Entek Cu Plus 106A) Tolerance − Edge To Corner Ball ±50 mm Solder Ball Side Coplanarity ±20 mm Maximum Dwell Time Above Liquidous 60 seconds Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste 260°C Non−Solder Mask Defined Pad 0.240 mm DIA. Solder Stencil Opening 0.300 mm DIA. Solder Mask Opening 0.290 mm DIA. Figure 10. Recommended Non−Solder Mask Defined Pad Illustration Temperature (5C) 250 200 150 100 50 0 1:00.0 2:00.0 3:00.0 Time (minutes) 4:00.0 Figure 11. Lead−free (SnAgCu) Solder Ball Reflow Profile http://onsemi.com 9 CM1442 PACKAGE DIMENSIONS WLCSP15, 2.36x1.05 CASE 567BP−01 ISSUE O PIN A1 REFERENCE 2X 0.05 C 2X D È È 0.05 C A E DIM A A1 A2 b D E eD eE TOP VIEW ÉÉÉÉÉÉ OptiGuard Option 0.05 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B A2 RECOMMENDED SOLDERING FOOTPRINT* A 0.05 C NOTE 3 A1 SIDE VIEW C SEATING PLANE eD/2 15X b 0.05 C A B 0.03 C eD MILLIMETERS MIN MAX 0.72 0.57 0.17 0.24 0.42 REF 0.24 0.29 2.36 BSC 1.05 BSC 0.400 BSC 0.347 BSC PACKAGE OUTLINE A1 0.35 eE 0.35 15X 0.40 PITCH C B 0.25 DIMENSIONS: MILLIMETERS A 1 2 3 4 5 6 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 7 8 9 BOTTOM VIEW http://onsemi.com 10 CM1442 PACKAGE DIMENSIONS WLCSP20, 3.16x1.05 CASE 567BU−01 ISSUE O PIN A1 REFERENCE 2X 0.05 C 2X D ÈÈ ÈÈ A E 0.05 C DIM A A1 A2 b D E eD eE TOP VIEW OptiGuard Option 0.05 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B ÉÉÉÉÉÉÉÉ A2 MILLIMETERS MIN MAX 0.69 0.54 0.17 0.24 0.42 REF 0.24 0.29 3.16 BSC 1.05 BSC 0.400 BSC 0.347 BSC A 0.05 C NOTE 3 A1 C SIDE VIEW SEATING PLANE eD/2 20X b 0.05 C A B 0.03 C eD eE C B A 1 2 3 4 5 6 7 8 9 10 1112 BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* PACKAGE OUTLINE A1 0.35 0.35 20X 0.40 PITCH 0.25 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. OptiGuardt is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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