NTMS4937N D

NTMS4937N
Power MOSFET
30 V, 13.6 A, N−Channel, SO−8
Features
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V(BR)DSS
Applications
•
•
•
•
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DC−DC Converters
Points of Loads
Power Load Switch
Motor Controls
RDS(ON) MAX
6.5 mW @ 10 V
30 V
Symbol
N−Channel
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
11.2
A
Continuous Drain
Current RqJA (Note 1)
Steady
State
TA = 25°C
Power Dissipation RqJA
(Note 1)
Steady
State
TA = 25°C
PD
1.36
W
Continuous Drain
Current RqJA (Note 2)
Steady
State
TA = 25°C
ID
8.6
A
TA = 70°C
PD
W
TA = 25°C
Power Dissipation
RqJA, t v 10 s(Note 1)
Steady
State
TA = 25°C
PD
2.0
W
Pulsed Drain Current
TA = 25°C, tp = 10 ms
IDM
112
A
TJ,
Tstg
−55 to
150
°C
IS
2.1
A
EAS
84.5
mJ
TA = 70°C
13.6
A
11
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
MARKING DIAGRAM/
PIN ASSIGNMENT
TL
1
SO−8
CASE 751
STYLE 12
Source
Source
Source
Gate
1
8
Drain
Drain
Drain
Drain
Top View
4937N = Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
260
°C
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
S
4937N
AYWWG
G
ID
0.81
Steady
State
Single Pulse Drain−to−Source Avalanche Energy
(TJ = 25°C, VDD = 30 V, VGS = 10 V,
IL = 13 Apk, L = 1.0 mH, RG = 25 W)
G
6.9
Continuous Drain
Current RqJA, t v 10 s
(Note 1)
Operating Junction and Storage Temperature
D
9.0
TA = 70°C
TA = 25°C
Power Dissipation RqJA
(Note 2)
13.6 A
8.7 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
ID MAX
Symbol
Value
Unit
Junction−to−Ambient – Steady State (Note 1)
RqJA
91.9
°C/W
Junction−to−Ambient – t v 10 s (Note 1)
RqJA
61.1
Junction−to−Foot (Drain)
RqJF
22.6
Junction−to−Ambient – Steady State (Note 2)
RqJA
154.7
Device
NTMS4937NR2G
Package
Shipping†
SO−8
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
2. Surfacemounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2009
September, 2009 − Rev. 0
1
Publication Order Number:
NTMS4937N/D
NTMS4937N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
13.1
VGS = 0 V, VDS = 24 V
mV/°C
TJ = 25°C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
±100
mA
nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
Forward Transconductance
1.0
2.5
5.1
VGS = 10 V, ID = 7.5 A
gFS
V
mV/°C
5.4
6.5
mW
VGS = 4.5 V, ID = 6.5 A
7.1
8.7
VDS = 1.5 V, ID = 7.5 A
27.3
S
2563
pF
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
25
Total Gate Charge
QG(TOT)
17.4
Threshold Gate Charge
QG(TH)
4.1
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
QG(TOT)
VGS = 0 V, f = 1.0 MHz, VDS = 25 V
VGS = 4.5 V, VDS = 15 V, ID = 7.5 A
715
nC
6.6
3.3
VGS = 10 V, VDS = 15 V, ID = 7.5 A
38.5
nC
td(on)
12.3
ns
tr
3.6
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(off)
VGS = 10 V, VDS = 15 V,
ID = 1.0 A, RG = 6.0 W
tf
33.8
38.9
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
VGS = 0 V, IS = 2.0 A
TJ = 25°C
0.72
TJ = 125°C
0.56
tRR
40
Charge Time
ta
18.8
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 2.0 A
1.0
V
ns
21.2
QRR
38
nC
LS
0.66
nH
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
TA = 25°C
0.2
1.5
0.4
3. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
1.0
W
NTMS4937N
TYPICAL PERFORMANCE CURVES
TJ = 25°C
ID, DRAIN CURRENT (AMPS)
21
2.8 V
3.6 V
3.2 V
18
15
3V
12
2.6 V
9
6
2.4 V
3
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
10V
4.5 V
4V
24
2.2 V
0
1.0
2.0
4.0
3.0
5.0
0.030
0.020
0.010
4
3
5
6
7
8
9
0.008
TJ = 25°C
0.007
VGS = 10 V
0.005
0.004
4
10
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
VGS = 4.5 V
0.006
9
14
19
24
29
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
100000
1.8
VGS = 0 V
ID = 7.5 A
VGS = 10 V
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
3.5
Figure 2. Transfer Characteristics
0.040
1.6
3
Figure 1. On−Region Characteristics
TJ = 25°C
ID = 7.5 A
2
TJ = −55°C
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.050
0.000
52
48 VDS ≥ 10 V
44
40
36
32
28
24
20
16
TJ = 125°C
12
8
TJ = 25°C
4
0
2
1.5
2.5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
27
10000
1.4
1.2
1.0
TJ = 150°C
1000
TJ = 125°C
0.8
0.6
−50
−25
0
25
50
75
100
125
150
100
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
30
NTMS4937N
TYPICAL PERFORMANCE CURVES
TJ = 25°C
3000
C, CAPACITANCE (pF)
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
3500
VGS = 0 V
Ciss
2500
2000
1500
Coss
1000
500
0
Crss
0
5
10
15
25
20
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
30
10
QT
9
8
7
VGS
6
5
4
2
VGS = 10 V
ID = 7.5 A
TJ = 25°C
1
0
5
0
Figure 7. Capacitance Variation
IS, SOURCE CURRENT (AMPS)
td(off)
100
t, TIME (ns)
35
40
2
VDD = 15 V
ID = 1 A
VGS = 10 V
tf
td(on)
10
tr
1
10
0.5
0
0.5
0.55
0.6
0.65
0.7
0.75
Figure 10. Diode Forward Voltage vs. Current
100 ms
1 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
10 ms
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
dc
1
10
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
10
0.01
0.01
1
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
10 ms
0.1
1.5
RG, GATE RESISTANCE (OHMS)
100
1
VGS = 0 V
TJ = 25°C
100
1000
ID, DRAIN CURRENT (AMPS)
10
30
15
25
20
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and
Drain−To−Source Voltage vs. Total Charge
1000
1
QGD
QGS
3
90
80
ID = 13 A
70
60
50
40
30
20
10
0
25
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
0.8
150
NTMS4937N
PACKAGE DIMENSIONS
SOIC−8
CASE 751−07
ISSUE AJ
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT*
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
1.52
0.060
7.0
0.275
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTMS4937N/D