REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add devices 03 and 04. Editorial changes throughout. 96-05-09 Monica L. Poelking B Changes in accordance with NOR 5962-R220-97. 97-03-07 Monica L. Poelking C Changes in accordance with NOR 5962-R297-97. 97-05-21 Monica L. Poelking D Add radiation features to paragraph 1.4 for device types 03 and 04. – LTG 97-12-08 Monica L. Poelking E Changes in accordance with NOR 5962-R062-99. – TVN 99-05-06 Monica L. Poelking F Correct dimensions for case outline Z in figure 1. Add radiation exposure connections for case outline Z in figure 5. Update boilerplate to the requirements of MIL-PRF-38535. Editorial changes throughout. – TVN 01-07-23 Thomas M. Hess G Add table IIB, Burn-in delta parameters. – CFS 03-10-21 Thomas M. Hess H Correct generic part number for device type 03. Update boilerplate to MIL-PRF-38535 requirements. – CFS 06-05-02 Thomas M. Hess J Update radiation features in section 1.5 and SEP table IB. Update paragraphs 4.4.4.1 thru 4.4.4.5 to current MIL-PRF-38535 requirements. - RDC 15-12-01 Charles F. Saffle REV SHEET REV J J J J J J J J J J J J J J J SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 REV J J J J J J J J J J J J J J SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 REV STATUS OF SHEETS PREPARED BY Christopher A. Rauch PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil CHECKED BY Thomas M. Hess APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 94-05-02 REVISION LEVEL MICROCIRCUIT, DIGITAL, BIPOLAR, DUAL CHANNEL, BUS TRANSCEIVER, MONOLITHIC SILICON SIZE 5962-93226 67268 J SHEET DSCC FORM 2233 APR 97 CAGE CODE A 1 OF 29 5962-E406-15 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H Federal stock class designator \ 93226 01 RHA designator (see 1.2.1) Device type (see 1.2.2) / Q X A Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types. The device types identify the circuit function as follows: Device type 01 02 03 04 Generic number Circuit function UT63M147 UT63M149 UT63M147 UT63M145 +5.0 V, dual channel bus transceiver (low idle) +5.0 V, dual channel bus transceiver (high idle) +5.0 V, dual channel bus transceiver (low idle) +5.0 V, dual channel bus transceiver (low idle) 1/ 2/ 1/ 1/ 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class M Device requirements documentation Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter X Z Descriptive designator Terminals See figure 1 See figure 1 36 24 Package style Dual-in-line package Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. __________ 1/ Idle low: TXIN, TXIN , RXOUT, RXOUT are at logic 0. 2/ Idle high: TXIN, TXIN , RXOUT, RXOUT are at logic 1. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 2 1.3 Absolute maximum ratings. 1/ Supply voltage range ........................................................................................... -0.3 V dc to +7.0 V dc Input voltage range (receiver) .............................................................................. 10 VPP Logic input voltage range ..................................................................................... -0.3 V dc to +5.5 V dc Receiver common mode input voltage range....................................................... -5.0 V to +5.0 V Output current (transmitter).................................................................................. 1.0 A Power dissipation, 100% duty cycle per channel: 2/ Device types 01, 02 ....................................................................................... 2.21 W Device types 03, 04 ....................................................................................... 3.6 W Storage temperature range .................................................................................. -65°C to +150°C Thermal impedance, junction-to-case (θJC): Device types 01, 02 ....................................................................................... 4.5°C/W Device types 03, 04 ....................................................................................... 6.0°C/W Maximum junction temperature (TJ): Device types 01, 02 ....................................................................................... 125°C Device types 03, 04 ....................................................................................... 175°C 1.4 Recommended operating conditions. Supply voltage range (VCC): Device types 01, 02 ....................................................................................... +4.75 V dc to +5.25 V dc Device types 03, 04 ....................................................................................... +4.5 V dc to +5.5 V dc Logic input voltage range ..................................................................................... 0.0 V dc to +5.0 V dc Receiver differential voltage................................................................................. 8.0 VPP Receiver common mode voltage range ............................................................... ±4.0 V dc Driver peak output current: Device types 01, 02 ....................................................................................... 700 mA Device types 03, 04 ....................................................................................... 600 mA Serial data rate: Device types 01, 02 ....................................................................................... 0 to 1 MHz Device types 03, 04 ....................................................................................... 300 KHz to 1 MHz Case operating temperature range (TC) ............................................................... -55°C to +125°C 1.5 Radiation features. For device types 03 and 04: 6 Maximum total dose available (dose rate = 50 - 300 rads (Si)/s) .........................= 1 x 10 Rads (Si) 3/ Single event phenomenon (SEP): 2 No upsets occurs at effective linear energy transfer (LET) (see 4.4.4.5) ..........≤ 14 MeV/(mg/cm ) 4/ 2 No latch-up (SEL) occur at effective LET (see 4.4.4.5) .....................................≤ 35 MeV/(mg/cm ) 4/ Dose rate induced upset (20 ns pulse) ................................................................ 5/ Dose rate induced latch-up .................................................................................. 5/ Dose rate survivability .......................................................................................... 5/ 14 2 Neutron irradiated ................................................................................................= 1 x 10 neutron/cm __________ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ VCC = 5.0 V, TC = +25°C 3/ Device types 03 and 04 may be dose rate sensitivity in a space environment and may demonstrate enhanced low dose rate sensitivity (ELDRS) effects. However, radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883, method 1019, condition A. 4/ Limits are guaranteed by design or process but not production tested unless specified by the customer through the purchase order or contract. 5/ When characterized as a result of the procuring activities request, the condition will be specified. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 3 1.6 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012).................................................... 100 percent 6/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 MIL-STD-1553 - Test Method Standard Microelectronics. Interface Standard Electronic Component Case Outlines. Aircraft Internal Time Division Command/Response Multiplex Databus. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http://www.astm.org/ or from ASTM International, P. O. Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. __________ 6/ Fault coverage is for digital circuits only. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 4 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 and figure 1 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms. The timing waveforms shall be as specified on figures 4. 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MILPRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime’s agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 132 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 5 TABLE IA. Electrical performance characteristics. Test Input low voltage, RXEN, Symbol Test conditions 1/ 2/ -55°C ≤ TC ≤ +125°C unless otherwise specified Device type Limits Min 01, 02 VIL TXIHB, TXIN, TXIN Input high voltage, RXEN, Group A subgroups 1, 2, 3 Max 0.65 03, 04 V 0.8 All 1, 2, 3 01, 02 1, 2, 3 VIH Unit 2.0 TXIHB, TXIN, TXIN Output low voltage, VOL IOL = 4 mA RXOUT, RXOUT Output high voltage, 03, 04 VOH IOH = 0.4 mA 01, 02 RXOUT, RXOUT Input low current, RXEN, 0.55 1, 2, 3 2.4 03, 04 IIL VIL = 0.4 V 01, 02 TXIHB, TXIN, TXIN Input high current, RXEN, 0.65 2.4 1, 2, 3 -1.1 03, 04 mA -0.1 40 µA 1, 2, 3 100 µA 1, 2, 3 55 mA IIH VIH = 2.7 V All 1, 2, 3 Transmitter inhibit input current, TXIHB IIIH VIH = 2.7 V 01, 02 VCC supply current ICC 0% duty cycle (non-trans.) 01, 02 -40 TXIHB, TXIN, TXIN 25% duty cycle (f = 1 MHz) 300 50% duty cycle (f = 1 MHz) 500 87.5% duty cycle (f = 1 MHz) 800 100% duty cycle (f = 500 KHz) 800 3/ 0% duty cycle (non-trans.) Functional tests 03, 04 1, 2, 3 22 25% duty cycle (f = 1 MHz) 200 50% duty cycle (f = 1 MHz) 380 87.5% duty cycle (f = 1 MHz) 650 100% duty cycle (f = 1 MHz) 740 3/ See 4.4.1b All mA 7, 8 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 6 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ 2/ -55°C ≤ TC ≤ +125°C unless otherwise specified Device type Group A subgroups Limits Min Unit 4/ Max RECEIVER Input capacitance, RXEN, TXIHB, TXIN, CIN f = 1 MHz sine wave See 4.4.1c All 4, 5, 6 Common mode input voltage 3/ VIC f = 1 MHz, direct-coupled stub; input 1.2 VPP 200 ns rise/fall ±25 ns All 4, 5, 6 Input threshold voltage (no response) VTH1 3/ f = 1 MHz, transformer couples stub; 200 ns rise/fall at (receiver output 0 to 1 transition) All 4, 5, 6 VTH2 f = 1 MHz, direct-coupled stub; 200 ns rise/fall at (receiver output 0 to 1 transition) VTH3 3/ f = 1 MHz, transformer couples stub; 200 ns rise/fall at (receiver output 0 to 1 transition) VTH4 f = 1 MHz, direct-coupled stub; 200 ns rise/fall at (receiver output 0 to 1 transition) Common mode rejection 3/ CMRR Pass/Fail Differential input voltage level 3/ VIDR 15 pF 5.0 V 0.20 VPP, L-L TXIN Input threshold voltage (response) -5.0 0.28 All 5/ 4, 5, 6 All 4, 5, 6 01, 02 4, 5, 6 01, 02, 03 4, 5, 6 04 01, 02, 03 0.86 14.0 1.20 20.0 3/ VPP, L-L 8.0 VPP 18 27 VPP, L-L 4, 5, 6 22 27 VPP, L-L 4, 5, 6 6 9 VPP, L-L TRANSMITTER Output voltage swing MIL-STD-1553B transformer-coupled stub 3/ VO1 f = 1 MHz, RL = 70Ω See figure 4, point A Output voltage swing MIL-STD-1760 transformer-coupled stub VO2 f = 1 MHz, RL = 70Ω See figure 4, point A Tested by direct-couples 7V–9V Output voltage swing MIL-STD-1553B direct-coupled stub VO3 f = 1 MHz, RL = 35Ω See figure 4, point A See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 7 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ 2/ -55°C ≤ TC ≤ +125°C unless otherwise specified Device type Group A subgroups Limits Unit 4/ Min Max 6 20 VPP, L-L TRANSMITTER – Continued Output voltage swing MIL-STD-1553A transformer-coupled stub 3/ VO4 f = 1 MHz, RL = 35Ω See figure 4, point A 01, 02, 03 4, 5, 6 Output noise voltage differential transformercoupled stub 3/ VNS1 f = DC to 10 MHz RL = 70Ω See figure 4, point A All 4, 5, 6 14 mV-RMS L-L Output noise voltage differential directcoupled stub 3/ VNS2 f = DC to 10 MHz RL = 35Ω See figure 4, point A 01, 02 4, 5, 6 10 mV-RMS L-L Output symmetry transformer-coupled stub 3/ 6/ VOS1 RL = 140Ω See figure 4, point A Measurement taken 2.5 µS after end of transmission 01, 02 Output symmetry direct-coupled stub 6/ VOS2 RL = 35Ω See figure 4, point A Measurement taken 2.5 µS after end of transmission All Output voltage distortion (overshoot or ring) transformer-coupled stub 3/ VDIS1 RL = 70Ω See figure 4, point A 01, 02 Output voltage distortion (overshoot or ring) direct-coupled stub VDIS2 Output capacitance, 03, 04 5 4, 5, 6 -360 +360 -250 +250 4, 5, 6 -90 +90 mVPP, L-L 4, 5, 6 -2.0 +2.0 VPEAK, L-L -0.9 +0.9 -1.0 +1.0 -0.3 +0.3 03, 04 03, 04 VPEAK, L-L RL = 35Ω See figure 4, point A 01, 02 COUT f = 1 MHz sine wave See 4.4.1c All 4, 5, 6 Terminal input impedance transformer-coupled stub 3/ TIZ1 f = 75 KHz to 1 MHz (power on or power off; non-transmitting; RL removed from circuit) All 4, 5, 6 1 KΩ Terminal input impedance direct-coupled stub 3/ TIZ2 f = 75 KHz to 1 MHz (power on or power off; non-transmitting; RL removed from circuit) All 4, 5, 6 2 KΩ Differential output impedance 3/ TOZ f = 1 MHz 01, 02 4, 5, 6 10 KΩ RXOUT, RXOUT 4, 5, 6 mVPP, L-L 03, 04 20 pF See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 8 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ 2/ -55°C ≤ TC ≤ +125°C unless otherwise specified Device type Group A subgroups Unit Limits Min Max AC ELECTRICAL CHARACTERISTICS Transmitter output rise and fall time, direct-coupled tR, tF f = 1 MHz, 50% duty cycle RL = 35Ω Output at 10% through 90% All 9, 10, 11 100 300 ns All 9, 10, 11 -200 200 ns 01, 02 9, 10, 11 -15 15 ns -25 25 point TXOUT , TXOUT RXOUT delay tRXDD RXOUT to RXOUT TXIN skew tTXDD TXIN to TXIN 3/ 03, 04 Zero crossing distortion direct-coupled stub tRZCD f = 1 MHz, 3.0 VPP, skew input ±150 ns, rise/fall time = 200 ns All 9, 10, 11 -150 150 ns Zero crossing stability, tTZCS RL = 35Ω See figure 4, point A Zero crossings should not deviate more than ±25 ns All 9, 10, 11 -25 25 ns tRDXOFF See figure 4, point A 01, 02 9, 10, 11 450 ns TXIN and TXIN toggling 1 MHz; TXIHB transitions from logic 0 to 1 03, 04 See figure 4, point A 01, 02 TXIN and TXIN toggling 1 MHz; TXIHB transitions from logic 1 to 0 03, 04 input TXIN and TXIN should create transmitter output zero crossings at 500, 1000, 1500, and 2000 ns Transmitter off; delay from inhibit active 3/ 7/ Transmitter on; delay from inhibit inactive 3/ 8/ Receiver off Receiver on tRDXON 3/ tRCVOFF 3/ Receiver propagation Transmitter propagation 3/ 3/ See figure 4, point A Receiver turn off time 01, 02 tRCVON See figure 4, point A Receiver turn on time 01, 02 tRCVPD See figure 4, point A Receiver propagation time 01, 02 See figure 4, point A Transmitter propagation time 01, 02 tXMITPD 100 9, 10, 11 250 ns 150 9, 10, 11 200 03, 04 ns 50 9, 10, 11 200 9, 10, 11 600 03, 04 ns 50 03, 04 ns 450 9, 10, 11 450 03, 04 ns 200 1/ Devices types 03 and 04 supplied to this drawing have been characterized through all levels M, D, P, L, R, F, G, and H of irradiation. However, this device is only tested at the 'H' level. Pre and Post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation electrical measurements for any RHA level, TA = +25°C ±5°C. All parameters are tested to worst case conditions unless otherwise specified. 2/ Unless otherwise specified, all testing shall be conducted under worst-case conditions. GND may not vary from 0.0 V dc by more than ±50 mV. 4.75 V ≤ VCC ≤ 5.25 V for device types 01 and 02; 4.5 V ≤ VCC ≤ 5.5 V for device types 03 and 04. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 9 TABLE IA. Electrical performance characteristics - Continued. 3/ Guaranteed to the limits specified in table IA, if not tested. 4/ L-L = Line to line. 5/ Pass/fail criteria per the test method described in MIL-HDBK-1553, appendix A. 6/ Test in accordance with the method described in MIL-STD-1553B output symmetry, section 4.5.2.1.1.4. 7/ Delay time from transmit inhibit (1.5 V) to transmit off (280 mV). 8/ Delay time from NOT transmit inhibit (1.5 V) to transmit off (1.2 V). TABLE IB. SEP test limits. 1/ 2/ 3/ Device type Bias VDD = 4.5 V Effective LET no upsets 03, 04 1/ 2/ 3/ LET ≤ 14 MeV/(mg/cm ) 2 -6 2 2.5 x 10 cm /bit LET ≤ 35 MeV/(mg/cm ) 2 For SEP test conditions, see 4.4.4.5 herein. Technology characterization and model verification supplemented by in-line data may be used in lieu of end-of-line testing. Test plan must be approved by TRB and qualifying activity. Worst case temperature is TA = +25°C ±10°C for SEU and TA = +125°C ±10°C for SEL. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 Maximum device cross section Bias VDD = 5.5 V For latch-up (SEL) test no latch-up effective LET SIZE 5962-93226 A REVISION LEVEL J SHEET 10 Case X Dimension Inches Min Max A .155 b .014 c .008 D .023 .015 1.890 E .570 .610 E1 .590 .620 e .100 BSC L .150 Q .001 S .005 FIGURE 1. Case outlines. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 11 Case Z Inches Dimension Min Max A .095 b .018 c .007 .013 D .810 E .580 .600 e .045 .055 L .400 Q .060 .080 FIGURE 1. Case outlines - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 12 Device type All Case outline X Terminal number Terminal symbol Channel Terminal number Terminal symbol Channel 1 TXOUT A 19 NC B 2 TXOUT A 20 RXIN B 3 GND A 21 RXIN B 4 NC A 22 GND B 5 RXOUT A 23 NC B 6 RXEN A 24 VCC B 7 GND A 25 TXIHB B 8 RXOUT A 26 TXIN B 9 NC A 27 TXIN B 10 TXOUT B 28 NC A 11 TXOUT B 29 RXIN A 12 GND B 30 RXIN A 13 NC B 31 GND A 14 RXOUT B 32 NC A 15 RXEN B 33 VCC A 16 GND B 34 TXIHB A 17 RXOUT B 35 TXIN A 18 NC B 36 TXIN A NC = No connection FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 13 Device type All Case outline Z Terminal number Terminal symbol Channel 1 TXOUT/ RXIN 1/ A 2 TXOUT / RXIN 1/ A 3 GND A 4 RXOUT A 5 RXEN A 6 RXOUT A 7 TXOUT/ RXIN 1/ B 8 TXOUT / RXIN 1/ B 9 GND B 10 RXOUT B 11 RXEN B 12 RXOUT B 13 GND B 14 VCC B 15 GND B 16 TXIHB B 17 TXIN B 18 TXIN B 19 GND A 20 VCC A 21 GND A 22 TXIHB A 23 TXIN A 24 TXIN A 1/ The case outline Z internally connects TXOUT to RXIN and TXOUT to RXIN for each channel. FIGURE 2. Terminal connections - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 14 NOTES: 1/ Idle low: TXIN, TXIN , RXOUT, RXOUT are at logic 0. 2/ Idle high: TXIN, TXIN , RXOUT, RXOUT are at logic 1. FIGURE 3. Block diagram. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 15 tRCVPD = Receiver propagation tRCVON = Receiver on tRCVOFF = Receiver off tXMITPD = Transmitter propagation tDXON = Transmitter on tRDXOFF = Transmitter off tR = Rise time tF = Fall time FIGURE 4. Timing waveforms. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 16 FIGURE 4. Timing waveforms - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 17 FIGURE 4. Timing waveforms - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 18 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or C. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125°C, minimum. b. Interim and final electrical test parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the functionality of the device. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.6 herein). c. Subgroup 4 (CIN and COUT measurements) shall be measured only for the initial test and after process or design changes which may affect input capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 MHz. Sample size is 5 devices with no failures, and all input and output terminals tested. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 19 TABLE IIA. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Subgroups (in accordance with MIL-PRF-38535, table III) Device class M Device class Q Device class V Interim electrical parameters (see 4.2) 1, 4, 9 1, 4, 9 1, 4, 9 Final electrical parameters (see 4.2) 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1/ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1/ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 2/ 3/ Group A test requirements (see 4.4) 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 Group C end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 Group D end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 1, 2, 3 Group E end-point electrical parameters (see 4.4) 1, 4, 9 1, 4, 9 1, 4, 9 1, 2, 3 3/ 1/ PDA applies to subgroup 1. 2/ PDA applies to subgroups 1 and 7. 3/ Delta limits are as specified in table IIB herein and shall be required where specified and the delta values shall be completed with reference to the zero hour electrical parameters (see table IA). Table IIB. Burn-in delta parameters (+25°C). Test Symbol Conditions Limit Supply Current ICC 0% Duty Cycle, VDD = 4.5 V ±0.15 mA or 1%, whichever is greater. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A or C. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883. b. TA = +125°C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 20 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table IA at TA = +25°C ±5°C, after exposure, to the subgroups specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883 method 1019, condition A, and as specified herein section 1.5 for device types 03 and 04. 4.4.4.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level greater than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be the pre-irradiation end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. 4.4.4.2 Neutron testing. When required by the customer, neutron testing shall be performed in accordance with test method 1017 of MIL-STD-883 and herein. All device classes must meet the post irradiation end-point electrical parameter limits as 12 2 defined in table IA, for the subgroups specified in table IIA herein at TA = +25°C ±5°C after an exposure of 2 x 10 neutrons/cm (minimum). 4.4.4.3 Dose rate induced latchup testing. When required by the customer, dose rate induced latchup testing shall be performed in accordance with test method 1020 of MIL-STD-883 and as specified herein (see 1.5). Tests shall be performed on devices, SEC, or approved test structures at technology qualification and after any design or process changes which may affect the RHA capability of the process. 4.4.4.4 Dose rate upset testing. When required by the customer, dose rate upset testing shall be performed in accordance with test method 1021 of MIL-STD-883 and herein (see 1.5). a. Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes which may affect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified. b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved radiation hardness assurance plan and MIL-PRF-38535. Device parametric parameters that influence upset immunity shall be monitored at the wafer level in accordance with the wafer level hardness assurance plan and MIL-PRF-38535. 4.4.4.5 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be required on class V devices. Sep testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP testing. The test conditions for SEP are as follows: a. The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive (i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related effects are allowed. b. The fluence shall be ≥ 100 errors or ≥ 10 ions/cm . c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. The particle range shall be ≥ 20 microns in silicon. e. The test temperature shall be +25°C and the maximum rated operating temperature ±10°C. f. Bias conditions shall be defined by the manufacturer for latchup measurements. g. For SEP test limits, see table IB herein. 7 2 5 STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 2 2 SIZE 5962-93226 A REVISION LEVEL J SHEET 21 4.4.4.6. Dose rate burnout. When required by the customer, test shall be performed on devices, SEC, or approved test structures at technology qualifications and after any design or process changes which may affect the RHA capability of the process. Dose rate burnout shall be performed in accordance with test method 1023 of MIL-STD-883 and as specified herein. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0540. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in MIL-HDBK-103 and QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DLA Land and Maritime-VA. 6.7 Additional information. When specified in the purchase order or contract, a copy of the following additional data shall be supplied. a. RHA test conditions (SEP). b. Number of upsets (SEU). c. Number of transients (SET). d. Occurrence of latch-up (SEL). STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 22 Appendix A APPENDIX A FORMS A PART OF SMD 5962-93226 A.1 SCOPE A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of military high reliability (device class Q) and space application (device Class V) are reflected in the Part or Identification Number (PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN. A.1.2 PIN. The PIN is as shown in the following example: 5962 H Federal stock class designator \ 93226 01 RHA designator (see A.1.2.1) Device type (see A.1.2.2) / Q 9 Device class designator (see A.1.2.3) Die code A Die stock detail (see A.1.2.4) \/ Drawing number A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash (-) indicates a non-RHA die. A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 03 UT63M147 Circuit function +5.0 V, dual channel bus transceiver (low idle) 1/ A.1.2.3 Device class designator. Device class Q or V Device requirements documentation Certification and qualification to the die requirements of MIL-PRF-38535 A.1.2.4 Die Details. The die details designation is a unique letter which designates the die's physical dimensions, bonding pad locations and related electrical functions, interface materials, and other assembly related information, for each product and variant supplied to this appendix. A.1.2.4.1 Die physical dimensions. Die type Figure number 03 A-1 ________ 1/ Idle low: TXIN, TXIN , RXOUT, RXOUT are at logic 0. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 23 Appendix A APPENDIX A FORMS A PART OF SMD 5962-93226 A.1.2.4.2 Die bonding pad locations and electrical functions. Die type Figure number 03 A-1 A.1.2.4.3 Interface materials. Die type Figure number 03 A-1 A.1.2.4.4 Assembly related information. Die type Figure number 03 A-1 A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details. A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details. A.2 APPLICABLE DOCUMENTS. A.2.1 Government specifications, standards, and handbooks. The following specification, standard, and handbook form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARD MIL-STD-883 - Test Method Standard Microcircuits. DEPARTMENT OF DEFENSE HANDBOOK MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) A.2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of these documents are available online at http://www.astm.org/) A.2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 24 Appendix A APPENDIX A FORMS A PART OF SMD 5962-93226 A.3 REQUIREMENTS A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The modification in the QM plan shall not effect the form, fit or function as described herein. A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein and the manufacturer’s QM plan for device classes Q and V A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1. A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as specified in A.1.2.4.2 and on figure A-1. A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1. A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and figure A-1. A.3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.5 herein. A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this document. A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA. A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535. A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein. A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuit die delivered to this drawing. A.4 VERIFICATION A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM plan shall not affect the form, fit, or function as described herein. A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the manufacturer’s QM plan. As a minimum it shall consist of: a) Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883 test method 5007. b) 100% wafer probe (see paragraph A.3.4 herein). c) 100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883 test method 2010 or the alternate procedures allowed in MIL-STD-883 test method 5004. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 25 Appendix A APPENDIX A FORMS A PART OF SMD 5962-93226 A.4.3 Conformance inspection. A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4 herein. A.5 DIE CARRIER A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and electrostatic protection. A.6 NOTES A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications and logistics purposes. A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime -VA, Columbus, Ohio, 432183990 or telephone (614)-692-0540. A.6.3 Abbreviations, symbols and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DLA Land and Maritime VA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 26 Appendix A APPENDIX A FORMS A PART OF SMD 5962-93226 NOTES: 1. All dimensions are in inches and are basic. 2. Backside bias is GND. 3. Die thickness is 0.0175 ±0.001. 4. Die backside is lapped. 5. The die center is the coordinate origin (0,0). 6. Only the square diepads are numbered. The filled diepads are used. FIGURE A-1: Die bonding pad locations and electrical functions STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 27 Appendix A APPENDIX A FORMS A PART OF SMD 5962-93226 Die bonding pad locations and electrical functions PAD XCENTER YCENTER PAD NAME 1 2 3 4 5 6 7 8 9 10 0.0635 0.0545 0.0435 0.0315 0.0025 -0.0119 -0.0275 -0.0397 -0.0564 -0.0715 0.0790 0.0790 0.0770 0.0790 0.0790 0.0791 0.0770 0.0772 0.0772 0.0790 VCC VCC VCC GND VCC N/C GND RXOUT RXEN GND 11 12 13 -0.0867 -0.0875 -0.0886 0.0791 0.0350 0.0258 RXOUT VCC GND 14 15 16 17 18 -0.0885 -0.0885 -0.0705 -0.0325 -0.0175 -0.0450 -0.0550 -0.0780 -0.0790 -0.0790 RXIN VCC VCC TXIN 19 20 21 22 23 24 25 26 27 -0.0076 0.0032 0.0315 0.0402 0.0565 0.0635 0.0865 0.0865 0.0885 -0.0779 -0.0783 -0.0790 -0.0769 -0.0780 -0.0780 -0.0640 -0.0210 -0.0010 THIHB GND VCC VCC VCC TXOUT TXOUT TXOUT 28 0.0885 0.0070 TXOUT 29 0.0855 0.0300 TXOUT 30 0.0855 0.0600 TXOUT RXIN TXIN NOTE: The die center is the coordinate origin (0,0). FIGURE A-1: Die bonding pad locations and electrical functions- Continued STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 28 Appendix A APPENDIX A FORMS A PART OF SMD 5962-93226 Die physical dimensions. Die size: 171 mils x 187 mils. Die thickness: 17.5 ±1 mils. Interface materials. Top metallization: Si Al Cu Thickness: 9 kÅ-12.5 kÅ Backside metallization: None (Back grinding) Glassivation. Type: PSG with Nitride Thickness: 10 kÅ ±1 kÅ Substrate: Dielectrically isolated Assembly related information. Substrate potential: Float/isolate die attach pad. Special assembly instructions: TXOUT and TXOUT bond out must be matched within 10 mΩ and have low resistance of less than 250 mΩ. VCC bond out on bond pads 1, 2, 3, and 22, 23, 24 must be within 10 mΩ and low resistance of less than 250 mΩ. FIGURE A-1: Die bonding pad locations and electrical functions - Continued STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-93226 A REVISION LEVEL J SHEET 29 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 15-12-01 Approved sources of supply for SMD 5962-93226 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime-VA maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-9322601MXA 3/ UT63M147BBA 5962-9322601MZA 3/ UT63M147CBA 5962-9322602MXA 3/ UT63M149BBA 5962-9322602MZA 3/ UT63M149CBA 5962-9322603Q9A 3/ UT63M147 (GEN) 5962-9322603V9A 3/ UT63M147 (GEN) 5962-9322603VZA 65342 UT63M147-CVA 5962-9322603VZC 65342 UT63M147-CVC 5962-9322603VXA 65342 UT63M147-BVA 5962-9322603VXC 65342 UT63M147-BVC 5962-9322603QXA 65342 UT63M147-BQA 5962-9322603QXC 65342 UT63M147-BQC 5962-9322603QZA 65342 UT63M147-CQA 5962-9322603QZC 65342 UT63M147-CQC 5962H9322603QXA 65342 UT63M147-BQA 5962H9322603QZA 65342 UT63M147-CQA 5962H9322603QXC 65342 UT63M147-BQC 5962H9322603QZC 65342 UT63M147-CQC 5962H9322603VXA 65342 UT63M147-BVA 5962H9322603VZA 65342 UT63M147-CVA 5962H9322603VXC 65342 UT63M147-BVC 5962H9322603VZC 65342 UT63M147-CVC 5962H9322603Q9A 65342 UT63M147-Q DIE 5962H9322603V9A 65342 UT63M147-V DIE See footnotes at end of table. Page 1 of 2 STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued. DATE: 15-12-01 Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-9322604QXA 3/ UT63M145-BQA 5962-9322604QZA 3/ UT63M145-CQA 5962-9322604QXC 3/ UT63M145-BQC 5962-9322604QZC 3/ UT63M145-CQC 5962H9322604VXA 3/ UT63M145-BVA 5962H9322604VZA 3/ UT63M145-CVA 5962H9322604VXC 3/ UT63M145-BVC 5962H9322604VZC 3/ UT63M145-CVC 5962H9322604QXA 3/ UT63M145-BQA 5962H9322604QZA 3/ UT63M145-CQA 5962H9322604QXC 3/ UT63M145-BQC 5962H9322604QZC 3/ UT63M145-CQC 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed, contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. Vendor CAGE number 65342 Vendor name and address Aeroflex Colorado Springs, Inc. dba Cobham Semiconductor Solutions 4350 Centennial Boulevard Colorado Springs, Colorado 80907-3486 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin. Page 2 of 2