® RT6268 3.7A, 36V, 100kHz Asynchronous Step-Down Converter with Load Line Compensation General Description Features The RT6268 is a high-efficiency, monolithic asynchronous step-down DC/DC converter that can deliver up to 3.7A output current from a 7V to 36V input supply. The RT6268's current mode architecture with internal compensation is optimized for 5V car charger application over a wide range of loads and output capacitors. Cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up. The RT6268 also provides output over voltage protection output under voltage protection and thermal shutdown protection. The low current (<3μA) shutdown mode provides output disconnect, enabling easy power management in batterypowered systems. The RT6268 is available in a SOP-8 (Exposed Pad) package. Ordering Information RT6268 Package Type SP: SOP-8(Exposed Pad-Option 2) Note : 7V to 36V Input Voltage Range 3.7A Peak Output Current CC/CV Mode Control Adjustable Load Line Compensation Short Circuit Protection Integrated N-MOSFET Switches Current Mode Control Fixed Frequency Operation : 100kHz Programmable Output Current Limit 60mΩ Ω Internal Power MOSFET Switch Low EMI signature Up to 95% Efficiency Cycle-by-Cycle Over Current Protection Input Under Voltage Lockout Output Under Voltage Protection Thermal Shutdown Protection Applications Lead Plating System G : Green (Halogen Free and Pb Free) Richtek products are : ±1% High Accuracy Feedback Voltage RoHS compliant and compatible with the current require- USB Power Supplies Automotive Cigarette Lighter Adapters Power Supply for Linear Chargers DC/DC Converters with Current Limited ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Pin Configurations (TOP VIEW) Marking Information VIN RT6268GSP : Product Number RT6268 GSPYMDNN YMDNN : Date Code 8 BOOT 2 EN 3 FB 4 GND 9 SW 7 GND 6 CSP 5 CSN SOP-8 (Exposed Pad) Simplified Application Circuit CBOOT L1 D1 VIN COUT VOUT VIN CIN SW RT6268 GND BOOT REN EN CSP FB CSN Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS6268-00 RSENSE September 2015 R1 R2 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT6268 Functional Pin Description Pin No. Pin Name Pin Function 1 VIN Input Supply Voltage, 7V to 36V. Must bypass with a suitably large ceramic capacitor. 2 BOOT Bootstrap for High-Side Gate Driver. Connect 0.1F or greater ceramic capacitor from BOOT to SW pins. 3 EN Enable Input Pin. A logic high enables the converter; a logic low forces the RT6268 into shutdown mode reducing the supply current to less than 3A. Attach this pin to VIN with a 100k pull up resistor for automatic startup. 4 FB Feedback Input Pin. This pin is connected to the converter output. It is used to set the output of the converter to regulate to the desired value via an external resistive voltage divider. For an adjustable output, an external resistive divider is connected to this pin. 5 CSN Current Sense Negative Input. It is used for load current limiting and load line drop compensation. 6 CSP Current Sense Positive Input. It is used for load current limiting and load line drop compensation. 7, 9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. (Connect the exposed pad to Pin 7) SW Switch Output -- Connect to external L-C filter and Schottky diode. 8 Function Block Diagram EN VIN Internal Regulator VCC VCC VIBIAS VREF EN Oscillator Current Sense Ramp Foldback Control VCC BOOT OC GND UV&OV SS Circuit + 2Meg 80p 0.8V 1p UGATE Current Control Comp SW Driver LGATE Current Limit + +EA Line Comp 100mV CSP + 1Meg CSN 10p 1Meg + EA - FB Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS6268-00 September 2015 RT6268 Operation The RT6268 is a constant frequency, current mode asynchronous step-down converter with CC and CV control. In normal operation, the high side N-MOSFET is turned on when the S-R latch is set by the oscillator and is turned off when the current comparator resets the S-R latch. While the N-MOSFET is turned off, the inductor current conducts through the external diode. Error Amplifier The error amplifier adjusts its output voltage by comparing the feedback signal (VFB) with the internal 0.8V reference. When the load current increases, it causes a drop in the feedback voltage relative to the reference, the error amplifier's output voltage then rises to allow higher inductor current to match the load current. compensating the output voltage drop to keep a constant voltage at load, whatever the load current is. The output voltage is compensated by feeding a current to the top feedback resistance R1. The load line compensation gain can be programmed according to RSENSE and Rtrace values. RSENSE CSP Rtrace1 R1 CSN Vload + IOUT _ Rtrace2 FB R2 IOUT RSENSE 20μ R1 IOUT Rtrace Oscillator The internal oscillator runs at fixed frequency 100kHz. In short circuit condition, the frequency is reduced to 20kHz for low power consumption. R1 Rtrace 20μ RSENSE Output Over Voltage Protection (OVP) The regulator provides low voltage power to supply the internal control circuits and the bootstrap power for high side gate driver. The VOUT Over Voltage is sensed by CSN pin. When CSN > 5.8V, the high side switch will be turned off immediately. When CSN < 5.5V, the driver will recovers to normal state automatically. Enable External Current Limit Protection The converter is turned on when the EN pin is higher than 2.5V and turned off when the EN pin is lower than 0.4V. Attach this pin to VIN with a 100kΩ pull up resistor for automatic startup. The external current limit is set by outside resistance (RSENSE). The average current is limited according to the following equation : Internal Regulator Soft-Start (SS) An internal current source charges an internal capacitor to build a soft-start ramp voltage. The FB voltage will track the internal ramp voltage during soft-start interval. The typical soft-start time is 3.5ms. Output Line Drop Compensation If the trace from RT6268 output terminator to the load is too long, there will be a voltage drop on the long trace which is variable with load current. RT6268 is capable of Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS6268-00 September 2015 Average Current_Limit (A) 100mV RSENSE Internal Current Limit Protection When the external RSENSE is too small and the external peak current is higher than 5.8A, the high-side switch will turn off immediately and then turn on at the next clock cycle. The inductor’s peak current will be limited at 5.8A by internal current limit. is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT6268 Output Short-Circuit Protection When V OUT is short (V FB < 0.3V), the short-circuit protection function can be started that restart the regulator cycle by cycle. The cycle time is set by the driver internally. The internal current limit time is t1 and the regulator off time is t2. The typically t1 = 5ms, t2 = 200ms. IOUT (A) Time t1 t2 Under Voltage Lockout (UVLO) To avoid mis-operation at low input voltage, when input voltage falls below 6.1V, the under voltage lockout is induced and the device is disabled. Thermal Shutdown The over temperature protection function will shut down the switching operation when the junction temperature exceeds 150°C. Once the junction temperature cools down by approximately 30° C, the converter will automatically resume switching. Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS6268-00 September 2015 RT6268 Absolute Maximum Ratings (Note 1) Supply Input Voltage -----------------------------------------------------------------------------------------------------Switch Voltage, SW -----------------------------------------------------------------------------------------------------VBOOT - VSW -----------------------------------------------------------------------------------------------------------------EN, FB, CSP, CSN ------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ---------------------------------------------------------------------------------------------- Recommended Operating Conditions −0.3V to 40V −0.3V to 40V −0.3V to 6V −0.3V to 6V 2.041W 49°C/W 15C/W 260°C 150°C −65°C to 150°C 2kV (Note 4) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 7V to 36V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 12V, VOUT = 5V, TA = 25°C, Load Current = 0A, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit VOUT OVP Detect Voltage VOVP Normal Operation. -- 5.8 -- V VOUT OVP Hysteresis VOVP Normal Operation. -- 0.3 -- V Shutdown Supply Current ISD VEN = 0V -- 1.5 3 A Supply Current IQ VEN = 3 V, VFB = 0.9V -- 0.8 1.2 mA Feedback Voltage VFB 7V = VIN = 36V 0.792 0.8 0.808 V High-Side Switch On-Resistance RDS(ON),U -- 60 -- m Low-Side Switch On-Resistance RDS(ON),L -- 20 -- -- 0 10 A -- 5.8 -- A High-Side Switch Leakage Current ISWLEAK VEN = 0V, VSW = 0V Upper Switch Current Limit ILIM Load Line Compensation Gain GLC VCSP VCSN = 100mV, check IFB 15 20 25 A/V Current Sense Voltage VSENSE VCSP VCSN 98 100 102 mV Oscillation Frequency fOSC1 85 100 115 kHz -- 20 -- kHz Short Circuit Oscillation Frequency fOSC2 VFB = 0V Minimum Off-Time tOFF -- 200 -- ns Minimum On-Time tON -- 150 -- ns Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS6268-00 September 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT6268 Parameter EN Input Threshold Voltage Symbol Test Conditions Min Typ Max Unit Logic-High VIH 2.7 -- -- Logic-Low VIL -- -- 0.4 6.3 6.6 7 V V Input Under Voltage Lockout Threshold VUVLO Input Under Voltage Lockout Hysteresis VUVLO -- 0.5 1 V Soft-Start Period tSS -- 3.5 -- ms Thermal Shutdown TSD -- 150 -- VIN Rising C Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS6268-00 September 2015 RT6268 Typical Application Circuit CBOOT 100n VIN 7V to 36V 1 20µF 0.1µF VIN September 2015 SW 8 D1 RT6268 7, BOOT GND 9 (Exposed Pad) REN 3 CSP 6 EN 100k 4 FB CSN 5 2 Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS6268-00 L1 33µH RSENSE 26m 470µF 10µF VOUT 5V/3.1A R1 180k R2 34.3k is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT6268 Typical Operating Characteristics Over Current Limit vs. Input Voltage Efficiency vs. Output Current 100 3.80 VOUT = 5V 3.75 External OCP (A) 95 Efficiency (%) VOUT = 4V 90 85 VIN = 12V VIN = 24V 80 3.70 3.65 3.60 3.55 75 3.50 70 0 0.5 1 1.5 2 2.5 3 7 3.5 10 13 16 Over Current Limit vs. Temperature 28 31 34 37 VOUT = 5V, IOUT = 3.4A 103 Frequency (kHz)1 3.8 External OCP (A) 25 Frequency vs. Input Voltage 105 VIN = 12V, VOUT = 4V 3.9 22 Input Voltage (V) Output Current (A) 4.0 19 3.7 3.6 3.5 3.4 3.3 3.2 101 99 97 3.1 3.0 95 0 25 50 75 100 7 125 10 13 16 19 22 25 28 31 Temperature (°C) Input Voltage (V) VUVLO vs. Temperature Load Transient Response 7.0 VOUT = 5V 34 37 VIN = 12V, VOUT = 5V, IOUT = 1.7A to 3.4A, RSENSE = 26mΩ, R1 = 180kΩ Rising Hysteresis (V) 6.5 VOUT (100mV/Div) Falling 6.0 5.5 IOUT (1A/Div) 5.0 0 25 50 75 100 125 Time (1ms/Div) Temperature (°C) Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS6268-00 September 2015 RT6268 Load Transient Response Output Ripple Voltage VIN = 24V, VOUT = 5V, IOUT = 1.7A to 3.4A, RSENSE = 26mΩ, R1 = 180kΩ VIN = 12V, VOUT = 5V, IOUT = 3.4A VOUT (200mV/Div) VOUT (30mV/Div) IOUT (1A/Div) VLX (5V/Div) Time (1ms/Div) Time (10μs/Div) Output Ripple Voltage VIN = 24V, VOUT = 5V, IOUT = 3.4A VOUT (30mV/Div) VLX (8V/Div) Time (10μs/Div) Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS6268-00 September 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT6268 Application Information Output Voltage Setting The resistive divider allows the FB pin to sense the output voltage as shown in Figure 1. V OUT R1 FB RT6268 R2 GND Figure 1. Output Voltage Setting The output voltage is set by an external resistive voltage divider according to the following equation : VOUT = VREF 1 R1 R2 Where VREF is the reference voltage (0.8V typ.). External Bootstrap Diode Connect a 0.1μF low ESR ceramic capacitor between the BOOT pin and SW pin. This capacitor provides the gate driver voltage for the high side MOSFET. Inductor Selection The inductor value and operating frequency determine the ripple current according to a specific input and output voltage. The ripple current DIL increases with higher VIN and decreases with higher inductance. V V IL = OUT 1 OUT VIN f L Having a lower ripple current reduces not only the ESR losses in the output capacitors but also the output voltage ripple. High frequency with small ripple current can achieve the highest efficiency operation. However, it requires a large inductor to achieve this goal. For the ripple current selection, the value of ΔIL = 0.24(IMAX) will be a reasonable starting point. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : VOUT VOUT L = 1 VIN(MAX) f I L(MAX) Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 The inductor's current rating (caused a 40°C temperature rising from 25°C ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit peak current limit. Please see Table 2 for the inductor selection reference. Table 2. Suggested Inductors for Typical Component Supplier Series Dimensions (mm) MAG.LAYERS MCD-1012S-330KU 12 x 5 x 12.5 CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the high side MOSFET. To prevent large ripple current, a low ESR input capacitor sized for the maximum RMS current should be used. The approximate RMS current is given : V IRMS = IOUT(MAX) OUT VIN VIN 1 VOUT This formula has a maximum at VIN= 2VOUT, where IRMS = IOUT/2. This simple worst case condition is commonly used for design because even significant deviations do not offer much relief. Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. For the input capacitor, two 10μF low ESR ceramic capacitors are Suggested. For the Suggested capacitor, please refer to Table 3 for more details. The selection of COUT is determined by the required ESR to minimize voltage ripple. Moreover, the amount of bulk capacitance is also a key for COUT selection to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT , is determined by : 1 VOUT IL ESR 8fCOUT The output ripple will be the highest at the maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirement. Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage is a registered trademark of Richtek Technology Corporation. DS6268-00 September 2015 RT6268 Maximum Power Dissipation (W)1 3.2 rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Four-Layer PCB 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0.0 0 Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOP-8 (Exposed Pad) package, the thermal resistance, θJA, is 49° C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.041W for SOP-8 (Exposed Pad) package 50 75 100 125 Ambient Temperature (°C) Figure 2. Derating Curve of Maximum Power Dissipation Layout Consideration Follow the PCB layout guidelines for optimal performance of the RT6268. Keep the traces of the main current paths as short and wide as possible. Put the input capacitor as close as possible to the device pins (VIN and GND). SW node is with high frequency voltage swing and should be kept at small area. Keep analog components away from the SW node to prevent stray capacitive noise pick-up. Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the RT6268. An example of PCB layout guide is shown in Figure 3 for reference. PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and qJA is the junction to ambient thermal resistance. 25 The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 2 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS6268-00 September 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT6268 LX should be connected to inductor by wide and short trace. Keep sensitive components away from this trace. Input capacitor must be placed as close to the IC as possible. VOUT BOOT CBOOT VIN VIN CIN CIN GND BOOT 2 EN 3 FB 4 REN R2 GND 9 8 SW 7 GND 6 CSP 5 CSN L RSENSE D1 COUT COUT R1 VOUT GND The feedback and must be connected as lose to the device as possible. Keep sensitive component away. Figure 3. PCB Layout Guide Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS6268-00 September 2015 RT6268 Outline Dimension H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millim eters Symbol Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS6268-00 September 2015 www.richtek.com 13