REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 12-10-12 4 Phu H. Nguyen APPROVED BY Thomas M. Hess SIZE A REV AMSC N/A CODE IDENT. NO. 5 6 7 8 9 10 11 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil/ TITLE MICROCIRCUIT, LINEAR, LOW VOLTAGE, 1.15 V TO 5.5 V, 4-CHANNEL, BIDIRECTIONAL LOGIC LEVEL TRANSLATOR, MONOLITHIC SILICON DWG NO. V62/12631 16236 PAGE 1 OF 11 5962-V009-13 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance low voltage, 1.15 V to 5.5 V, 4-channel bidirectional logic level translator microcircuit, with an operating temperature range of -55°C to +125°C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/12631 - Drawing number 01 X B Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Device type Generic 01 ADG3304-EP Circuit function Low voltage, 1.15 V to 5.5 V, 4-channel bidirectional logic level translator 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins X 14 JEDEC PUB 95 Package style JEDEC MO-153-AB-1 Thin Shrink Small Outline Package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator A B C D E Z DLA LAND AND MARITIME COLUMBUS, OHIO Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 2 1.3 Absolute maximum ratings. 1/ VCCA to GND ............................................................................................ VCCY to GND ............................................................................................ Digital inputs (A) ...................................................................................... Digital inputs (Y) ...................................................................................... EN to GND .............................................................................................. Operating temperature range .................................................................. Storage temperature range ..................................................................... Junction temperature .............................................................................. θJA Thermal impedance (4 layer board) , Case outline X ....................... Lead temperature, soldering: Vapor phase (60 sec) ...................................................................... Infrared (15 sec) ............................................................................... -0.3 V to +7.0 V VCCA to +7.0 V -0.3 V to (VCCA + 0.3 V) -0.3 V to (VCCY + 0.3 V) -0.3 V to +7.0 V -55°C to +125°C -65°C to 150°C 150°C 112.6°C/W 215°C 220°C 2. APPLICABLE DOCUMENTS JEDEC – SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 – Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association, 3103 North 10th Street, Suite 240–S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3 and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 3 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Terminal function. The terminal function shall be as shown in figure 3. 3.5.4 Truth table. The truth table shall be as shown in figure 4. 3.5.5 Functional block diagram. The functional block diagram shall be as shown in figure 5. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Limits Test conditions 2/ Min Typ 3/ Unit Max LOGIC INPUTS/OUTPUTS A side Input high voltage 4/ VIHA Input low voltage 4/ VILA Output high voltage Output low voltage Capacitance 4/ Leakage current Y side VOHA VOLA CA ILA, HI-Z Input high voltage 4/ VIHY Input low voltage 4/ VILY Output high voltage Output low voltage Capacitance 3/ Leakage current Enable (EN) VOHY VOLY CY Input high voltage 4/ ILY, HI-Z VIHA Input low voltage 4/ VILA Leakage current Capacitance 3/ Enable time 4/ ILEN CEN tEN VCCA = 1.2 V + 0.1 V/-0.05 V VCCA = 1.8 V ±0.15 V VCCA = 2.5 V ±0.2 V VCCA = 3.3 V ±0.3 V VCCA = 5 V ±0.5 V VCCA = 1.2 V + 0.1 V/-0.05 V VCCA = 1.8 V ±0.15 V VCCA = 2.5 V ±0.2 V VCCA = 3.3 V ±0.3 V VCCA = 5 V ±0.5 V VY = VCCY, IOH = 20 µA VY = 0 V, IOL = 20 µA f = 1 MHz, EN = 0 VA = 0 V/VCCA, EN = 0 VCCA x 0.88 VCCA x 0.72 1.7 2.2 VCCA x 0.7 VCCY = 1.8 V ±0.15 V VCCY = 2.5 V ±0.2 V VCCY = 3.3 V ±0.3 V VCCY = 5 V ±0.5 V VCCY = 1.8 V ±0.15 V VCCY = 2.5 V ±0.2 V VCCY = 3.3 V ±0.3 V VCCY = 5 V ±0.5 V VA = VCCA, IOH = 20 µA VA = 0 V, IOL = 20 µA f = 1 MHz, EN = 0 VY = 0 V/VCCY, EN = 0 VCCY x 0.67 1.7 2 VCCY x 0.7 VCCA = 1.2 V + 0.1 V/-0.05 V VCCA = 1.8 V ±0.15 V VCCA = 2.5 V ±0.2 V VCCA = 3.3 V ±0.3 V VCCA = 5 V ±0.5 V VCCA = 1.2 V + 0.1 V/-0.05 V VCCA = 1.8 V ±0.15 V VCCA = 2.5 V ±0.2 V VCCA = 3.3 V ±0.3 V VCCA = 5 V ±0.5 V VCCA x 0.88 VCCA x 0.72 1.7 2.2 VCCA x 0.7 V VCCA x 0.35 VCCA x 0.35 0.7 0.8 VCCA x 0.30 VCCA – 0.4 0.4 9 ±1 pF µA V VCCY x 0.35 0.7 0.8 VCCY x 0.25 VCCY - 0.4 0.4 6 ±1 VCCA x 0.35 VCCA x 0.35 0.7 0.8 VCCA x 0.30 ±1 3 1 RS = RT = 50 Ω, VA = 0 V/VCCA (A→Y), VY = 0 V/VCCY (Y→A) 1.8 pF µA µA pF µs See footnote at end of table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 5 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Limits Test conditions 2/ Min SWITCHING CHARACTERISTICS 4/ 3.3 V ± 0.3 V ≤ VCCA ≤ VCCY, VCCY = 5 V ± 0.5 V A → Y level translation RS = RT = 50 Ω, CL = 50 pF Propagation delay tP, A→Y Rise time tR, A→Y tF, A→Y Fall time DMAX, A→Y Maximum data rate tSKEW, A→Y Channel to channel skew Part to part skew tPSKEW, A→Y Y → A level translation RS = RT = 50 Ω, CL = 15 pF Propagation delay tP, Y→A tR, Y→A Rise time tF, Y→A Fall time DMAX, Y→A Maximum data rate tSKEW, Y→A Channel to channel skew Part to part skew tPSKEW, Y→A 1.8 V ± 0.15 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V A → Y translation RS = RT = 50 Ω, CL = 50 pF Propagation delay tP, A→Y tR, A→Y Rise time Fall time tF, A→Y DMAX, A→Y Maximum data rate Channel to channel skew tSKEW, A→Y Part to part skew tPSKEW, A→Y Y → A translation RS = RT = 50 Ω, CL = 15 pF Propagation delay tP, Y→A tR, Y→A Rise time Fall time tF, Y→A DMAX, Y→A Maximum data rate tSKEW, Y→A Channel to channel skew Part to part skew tPSKEW, Y→A 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V A → Y translation RS = RT = 50 Ω, CL = 50 pF Propagation delay tP, A→Y tR, A→Y Rise time Fall time tF, A→Y DMAX, A→Y Maximum data rate Channel to channel skew tSKEW, A→Y Part to part skew tPSKEW, A→Y Y → A translation RS = RT = 50 Ω, CL = 15 pF Propagation delay tP, Y→A tR, Y→A Rise time tF, Y→A Fall time DMAX, Y→A Maximum data rate tSKEW, Y→A Channel to channel skew Part to part skew tPSKEW, Y→A Unit Typ 3/ Max 6 2 2 50 2 3 15 5 5 ns ns ns Mbps ns ns 4 1 3 50 2 2 10 5 10 ns ns ns Mbps ns ns 8 2 2 50 2 4 15 8 8 ns ns ns Mbps ns ns 5 2 2 50 2 3 12 5 5 ns ns ns Mbps ns ns 9 3 2 40 2 10 27 8 8 ns ns ns Mbps ns ns 5 2 2 40 2 4 13 6 6 ns ns ns Mbps ns ns See footnote at end of table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Limits Test conditions 2/ Min SWITCHING CHARACTERISTICS – Continued. 1.15 V to 1.3 V ≤ VCCA ≤ VCCY, VCCY = 1.8 V ± 0.3 V A → Y translation RS = RT = 50 Ω, CL = 50 pF Propagation delay tP, A→Y Rise time tR, A→Y tF, A→Y Fall time DMAX, A→Y Maximum data rate tSKEW, A→Y Channel to channel skew Part to part skew tPSKEW, A→Y Y → A translation RS = RT = 50 Ω, CL = 15 pF Propagation delay tP, Y→A tR, Y→A Rise time tF, Y→A Fall time DMAX, Y→A Maximum data rate tSKEW, Y→A Channel to channel skew Part to part skew tPSKEW, Y→A 2.5 V ± 0.2 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V A → Y translation RS = RT = 50 Ω, CL = 50 pF Propagation delay tP, A→Y Rise time tR, A→Y Fall time tF, A→Y DMAX, A→Y Maximum data rate tSKEW, A→Y Channel to channel skew Part to part skew tPSKEW, A→Y Y → A translation RS = RT = 50 Ω, CL = 15 pF Propagation delay tP, Y→A Rise time tR, Y→A Fall time tF, Y→A Maximum data rate DMAX, Y→A Channel to channel skew tSKEW, Y→A Part to part skew tPSKEW, Y→A POWER REQUIREMENTS Power supply voltages VCCA VCCA < VCCY VCCY ICCA VA = 0 V/VCCA, VY = 0 V/VCCY, Quiescent power supply current VCCA = VCCY = 5.5 V, EN = 1 ICCY VA = 0 V/VCCA, VY = 0 V/VCCY, VCCA = VCCY = 5.5 V, EN = 1 Three state mode power supply IHI-Z, A VCCA = VCCY = 5.5 V, EN = 1 current IHI-Z, Y VCCA = VCCY = 5.5 V, EN = 1 1/ 2/ 3/ 4/ Unit Typ 3/ Max 12 7 3 25 2 15 35 18 8 ns ns ns Mbps ns ns 14 5 2.5 25 3 23.5 40 24 10 ns ns ns Mbps ns ns 7 2.5 2 60 1.5 4 15 6 8 ns ns ns Mbps ns ns 5 1 3 60 2 3 12 6 8 ns ns ns Mbps ns ns V 0.17 5.5 5.5 5 0.27 5 0.1 0.1 5 5 4/ 1.15 1.65 µA µA Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 1.65 V ≤ VCCY ≤ 5.5 V, 1.15 V ≤ VCCA ≤ VCCY, GND = 0 V, -55°C ≤ TA ≤ +125°C, unless otherwise specified. TA = 25°C for typical values. Guaranteed by design, not subject to production tested. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 7 Case X e b 14 8 0°-8° E E1 PIN 1 IDENTIFIER L 7 1 DETAIL A D SEE DETAIL A A2 A A1 Symbol A A1 A2 b c SEATING PLANE Dimensions Millimeters Symbol Min Max 0.05 0.80 0.19 0.09 1.20 0.15 1.05 0.30 0.20 D E E1 e L c Millimeters Min Max 4.90 5.10 4.30 4.50 6.40 BSC 0.65 BSC 0.45 0.75 NOTES: 1. All linear dimensions are in millimeters. 2. Falls within JEDEC MO-153-AB-1. FIGURE 1. Case outline. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 8 Case outline X Terminal Terminal symbol number VCCA 14 A1 13 A2 12 Terminal number 1 2 3 Terminal symbol VCCY Y1 Y2 4 5 A3 A4 11 10 Y4 6 7 NC GND 9 8 NC EN Y3 FIGURE 2. Terminal connections. Terminal Number Mnemonic 1 VCCA 2 A1 3 A2 4 A3 5 A4 6 NC 7 GND 8 EN 9 NC 10 Y4 11 12 Y2 Y3 13 14 Y1 VCCY Description Power supply voltage input for A1 to A4 I/O pins (1.15 V ≤ VCCA ≤ VCCY) Input/Output A1. Reference to VCCA Input/Output A2. Reference to VCCA Input/Output A3. Reference to VCCA Input/Output A4. Reference to VCCA No Connect Ground Active high enable input No Connect Input/Output Y4. Reference to VCCY Input/Output Y3. Reference to VCCY Input/Output Y2. Reference to VCCY Input/Output Y1. Reference to VCCY Power supply voltage input for Y1 to Y4 I/O pins (1.65 V ≤ VCC ≤ 5.5 V) FIGURE 3. Terminal function. EN 0 1 1. 2. Y I/O Pins Hi-Z 1/ Normal operation A I/O Pins 2/ Hi-Z 1/ Normal operation 2/ High impedance state. In normal operation, the device performs level translation. FIGURE 4. Truth table DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 9 V CCA V CCY A1 Y1 A2 Y2 A3 Y3 A4 Y4 EN GND FIGURE 5. Functional block diagram. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 10 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number V62/12631-01XB 24355 ADG3304SRU-EP-RL7 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code 24355 DLA LAND AND MARITIME COLUMBUS, OHIO Source of supply Analog Devices 1 Technology Way P.O. Box 9106 Norwood, MA 02062-9106 SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12631 PAGE 11