AD ADG3308

PRELIMINARY TECHNICAL DATA
Low Voltage 1.2 V to 5.5 V,
Bidirectional, Logic Level Translators
Preliminary Technical Data
ADG3308
a
FEATURES
Bidirectional Level Translation
Operates from 1.2 V to 5.5 V
µA
Low Quiescent Current <5µ
FUNCTIONAL BLOCK DIAGRAM
VCCA
APPLICATIONS
SPITM, MicrowireTM and I2CTM Translation
Low Voltage ASIC level Translation
Smart Card Readers
Cell Phones & Cell-Phone Cradles
Portable Communication Devices
Telecommunicatons Equipment
Network Switches and Routers
Storage Systems (SAN/NAS)
Computing/Server Applications
GPS
Portable POS Systems
Low Cost Serial Interfaces
VCCY
A1
Y1
A2
Y2
A3
Y3
A4
Y4
A5
Y5
A6
Y6
A7
Y7
A8
Y8
EN
GND
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG3308 is an 8-Channel bidirectional level translator. Its function is to provide level shifting in a multivoltage system. The voltage applied to VCCA sets up the
logic levels on the A side of the device, while VCCY sets
the levels on the Y side. In this way, signals applied to the
VCCA side of the device appear as VCCY compatible logic
on the other side of the device and vice versa as the device
is designed to handle bidirectional signals. The device is
guaranteed for operation over the supply range 1.2 V to
5.5 V.
1.
2.
Bidirectional Level Translation.
The ADG3308 is fully guaranteed from 1.2 V to
5.5 V supply range.
3.
20 lead TSSOP and LFCSP (4mm x4mm) packages.
These devices are suited to applications like data transfer
between a low voltage DSP/Controller and a higher
voltage device. Other applications include high end
consumer products where constant changes to the chipset
desgins result in multiple supply levels in the application.
VCCY operates from +1.65 to 5.5 V while VCCA from +1.2
to VCCY. VCCA must always operate from a supply that is
lower than VCCY. When the device Enable pin (EN) is
pulled low, the Ax and Yx inputs/outputs are tri-stated.
The EN pin is driven high for normal operation. EN pin
is referred to VCCY voltage.
REV. PrE Feb 2004
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2004
PRELIMINARY TECHNICAL DATA
1
ADG3308–SPECIFICATIONS
(V = +1.65 to 5.5 V, V = +1.1 to V , GND = 0 V, All specifications T
CCY
CCA
CCY
Parameter
Symbol
LOGIC INPUTS/OUTPUTS
Input High Voltage
VIH
Input Low Voltage
VIL
Output High Voltage
VOH
Output Low Voltage
VOL
Input Leakage Current
Output Leakage Current
Input Capacitance3
Output Capacitance3
II
IO
CIN
CO
SWITCHING CHARACTERISTICS3
3.3V ± 0.3V ⱕ VCCA ⱕ VCCY ⱕ 5V ± 0.5V
Propagation Delay, tPD
Y-A
A-Y
Rise Time
tR_Y
Fall Time
tF_Y
Rise Time
tR_A
Fall Time
tF_A
Maximum Data Rate
Channel To Channel Skew
tSKEW
Part To Part Skew
tPPSKEW
1.8V ± 0.15V ⱕ VCCA ⱕ VCCY ⱕ 3.3V ±0.3V
Y-A
Propagation Delay, tPD
A-Y
Rise Time
tR_Y
Fall Time
tF_Y
Rise Time
tR_A
Fall Time
tF_A
Maximum Data Rate
Channel To Channel Skew
tSKEW
1.2V ± 0.1 V ⱕ VCCA ⱕ VCCY ⱕ 3.3 ± 0.3 V
Propagation Delay, tPD
Y-A
A-Y
Rise Time
tR_Y
Fall Time
tF_Y
Rise Time
tR_A
Fall Time
tF_A
Maximum Data Rate
Channel To Channel Skew
tSKEW
2.5V ± 0.2V ⱕ VCCA ⱕ VCCY ⱕ 3.3V ± 0.3V
Propagation Delay, tPD
Y-A
A-Y
Rise Time
tR_Y
Fall Time
tF_Y
Rise Time
tR_A
Fall Time
tF_A
Maximum Data Rate
Channel To Channel Skew
tSKEW
POWER REQUIREMENTS
Power Supply Voltages
Quiescent Power Supply Current
VCCY
VCCA
ICCY
ICCA
MIN
to TMAX unless otherwise noted)
Conditions
Min
Typ2
Max
VCCY -0.4
VCCA -0.4
IOH = 20 µA,
IOH = 20 µA,
IOL = 20 µA,
IOL = 20 µA,
0 ⱕ VIN ⱕ 3.6 V
0 ⱕ VIN ⱕ 3.6 V
f = 1 MHz, VA/Y = VCCA/Y or GND
f = 1 MHz, VA/Y = VCCY/A or GND
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
CA = 15 pF
CY = 50 pF
CY = 50 pF
CY = 50 pF
CA = 15 pF
CA = 15 pF
CY = 50 pF, CA = 15 pF
CY = 50 pF, CA = 15 pF
CY = 50 pF, CA = 15 pF
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
CA = 15 pF
CY = 50 pF
CY = 50 pF
CY = 50 pF
CA = 15 pF
CA = 15 pF
CY = 50 pF, CA = 15 pF
CY = 50 pF, CA = 15 pF
0.4
0.4
VCCY -0.4
VCCA -0.4
0.4
0.4
±1
±1
5
5
5
5
5
5
5
5
40
tbd
tbd
10
15
10
10
10
10
Units
V
V
V
V
V
V
V
V
µA
µA
pF
pF
ns
ns
ns
ns
ns
ns
Mbps
ns
ns
5
ns
ns
ns
ns
ns
ns
Mbps
ns
RS = 50Ω, CA = 15 pF
RS = 50Ω, CY = 50 pF
20
20
ns
ns
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
CY = 50 pF
CY = 50 pF
CA = 15 pF
CA = 15 pF
CY = 50 pF, CA = 15 pF
CY = 50 pF, CA = 15 pF
15
15
15
15
ns
ns
ns
ns
Mbps
ns
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
RS = 50Ω,
CA = 15 pF
CY = 50 pF
CY = 50 pF
CY = 50 pF
CA = 15 pF
CA = 15 pF
CY = 50 pF, CA = 15 pF
CY = 50 pF, CA = 15 pF
35
20
5
8.5
8.5
8.5
8.5
8.5
8.5
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
All typical vlaues are at T A = +25°C unless otherwise stated.
3
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
5.5
5.5
5
5
V
V
µA
µA
40
1.65
1.1
Digital Inputs = 0 V or VCCY
Digital Inputs = 0 V or VCCA
10
ns
ns
ns
ns
ns
ns
Mbps
ns
REV. PrE
PRELIMINARY TECHNICAL DATA
ADG3308
ABSOLUTE MAXIMUM RATINGS1
Pin Configuration
20 Lead TSSOP (RU-20)
(T A = 25°C unless otherwise noted)
VCCY to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V
VCCA to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V
Digtal Inputs (A) . . . . . . . . . . . . . . -0.3 V to (VCCA +0.3V)
Digtal Inputs (Y) . . . . . . . . . . . . . . -0.3 V to (VCCY +0.3V)
EN to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150°C
20 Lead TSSOP
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 143°C/W
20 Lead LFCSP - 4 layer board
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 32°C/W
Lead Temperature, Soldering (10seconds) . . . . . . . 300°C
IR Reflow, Peak Temperature (<20 seconds) . . . +235°C
VA 1
20 VY
A1 2
19 Y1
A2 3
18 Y2
A3 4
ADG3308
17 Y3
A4 5
(Not to Scale)
16 Y4
15 Y5
A5 6
A6 7
14 Y6
A7 8
13 Y7
A8 9
12 Y8
EN 10
11 GND
20 Lead 4mmx4mm LFCSP
(CP-20)
20 A1
19 VCCA
18 VCCY
17 Y1
16 Y2
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed
in the operational sections of this specifcation is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be applied at
any one time.
1
2
3
4
5
PIN 1
INDICATOR
ADG3308
TOP VIEW
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
A7 6
A8 7
EN 8
GND 9
Y8 10
A2
A3
A4
A5
A6
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADG3308BRU
ADG3308BCP
–40°C to +85°C
–40°C to +85°C
TSSOP
LFCSP
RU-20
CP-20
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG3308 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of
functionality.
REV. PrE
–3–
WARNING!
ESD SENSITIVE DEVICE
PRELIMINARY TECHNICAL DATA
ADG3308
GENERAL DESCRIPTION
large mos devices in the output stage to help speed up the
rate of switching. The output stage is inactive and three
state except when transistions are present on either side of
the translator. When this happens the one shot fires turning on the output stage and driving the load capacitance
faster than if it were driven through the resistor. As the
device is bi-directional, both input stages will be active
during this period. While this design gives maximum
speed from the device, it can result in some current driving back into the source driving the input of the translator.
The ADG3308 level translator allows the required level
shifting necessary for data transfer in a system where multiple voltages are used. The device requires two supplies,
VCCA and VCCY. These supplies set the logic levels on
each side of the device. The device translates data present
on the VA side of the device to the higher voltage level at
the VY side of the device. Similarly, as the device is capable of bidirectional translation, data applied to the VY
side will be translated to the voltage referenced to VA.
Power Supplies
To ensure correct operation, the input driver should meet
the following requirements - 50 Ω maximum output impedance with minimum of 20mA output current when
driving 20Mbps.
The voltage applied to VCCA must always be less than or
equal to VCCY.
While EN is low, the VCCA supply may be removed, and
both A and Y I/O’s will remain tri-stated.
Enable Operation
Level Translator Architecture
When pulled low, the EN input allows the user to tri-state
both sides (A and Y) of the level translator. EN pin is
referred to VCCY voltage.
The forward channel consists of a string of inverters and a
level translator, while the reverse channel consists simply
of inverters. A level translator is not required in the reverse path (Y-A) as the supply voltage VCCY must always
be greater than or equal to VCCA. A current limiting resistor is used in series with each channel to prevent any contention issues, see figure 1.
VCCY
VCCA
One Shot
Generator
6k
A
Y
One Shot
Generator
6k
Figure 1. Simplified Functional Diagram of one channel.
As the driven side has to drive a load capacitance through
this 6k resistance, one shot generators are used to drive
–4–
REV. PrE
PRELIMINARY TECHNICAL DATA
ADG3308
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20-Lead TSSOP
(RU-20)
20
PR04865-0-4/04(PrE)
0.260 (6.60)
0.252 (6.40)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
11
1
0.006 (0.15)
0.002 (0.05)
10
PIN 1
0.0256 (0.65)
BSC
SEATING
PLANE
0.0118 (0.30)
0.0075 (0.19)
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
8o
0o
0.028 (0.70)
0.020 (0.50)
20-Lead LFCSP
(CP-20)
0.024 (0.60)
0.017 (0.42)
0.009 (0.24)
0.024 (0.60)
0.017 (0.42)
16
0.009 (0.24)
15
0.157 (4.0)
BSC SQ
PIN 1
INDICATOR
TOP
VIEW
0.148 (3.75)
BSC SQ
0.028 (0.70) MAX
0.026 (0.65) NOM
12 o MAX
0.035 (0.90) MAX
0.033 (0.85) NOM
SEATING
PLANE
0.020 (0.50)
BSC
0.008 (0.20)
REF
0.012 (0.30)
0.009 (0.23)
0.007 (0.18)
0.030 (0.75)
0.024 (0.60)
0.020 (0.50)
11
10
6
0.080 (2.00)
REF
0.002 (0.05)
0.0004 (0.01)
0.0 (0.0)
–5–
BOTTOM
VIEW
20
1
0.080 (2.25)
0.083 (2.10) SQ
0.077 (1.95)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS
REV. PrE
0.010 (0.25)
MIN
5