PD - 94492 IRLR7811W SMPS MOSFET HEXFET® Power MOSFET Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use VDSS RDS(on) max Qg 30V 10.5mΩ 19nC Benefits l Very Low RDS(on) at 4.5V VGS l Ultra-Low Gate Impedance l Fully Characterized Avalanche Voltage and Current D-Pak Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C PD @TA = 100°C VGS TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation* Linear Derating Factor Gate-to-Source Voltage Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds 64 45 260 71 1.5 0.48 ± 12 -55 to + 175 Units A W W/°C V °C 300 (1.6mm from case ) Thermal Resistance Parameter RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB mount)* Junction-to-Ambient Typ. Max. Units ––– ––– ––– 2.1 50 110 °C/W Notes through are on page 9 www.irf.com 1 06/10/02 IRLR7811W Static @ TJ = 25°C (unless otherwise specified) BVDSS ∆ΒVDSS/∆TJ RDS(on) Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage ∆VGS(th) /∆TJ Gate Threshold Voltage Coefficient IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Q sw Qg Qoss Rg td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Control Fet Pre-Vth Gate-Source Charge Post-Vth Gate-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Total Gate Charge Sync Fet Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 30 ––– ––– ––– ––– ––– ––– ––– ––– ––– 58 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 27 6.5 7.5 1.5 -5.0 ––– ––– ––– ––– ––– 21 5.0 1.7 6.6 5.5 8.3 17 10 1.6 18 4.8 11 23 2260 420 180 Max. ––– ––– 10 12 2.5 ––– 30 150 100 -100 ––– 31 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Units Conditions V VGS = 0V, ID = 250µA mV/°C Reference to 25°C, ID = 1mA VGS = 10V, ID = 15A mΩ VGS = 4.5V, ID = 12A V VDS = VGS, ID = 250µA mV/°C VDS = 24V, VGS = 0V µA VDS = 24V, VGS = 0V, TJ = 125°C VGS = 12V nA VGS = -12V S VDS = 15V, ID = 12A nC VDS = 20V VGS = 4.5V nC ID = 12A VDS = 16V, VGS = 0V ns VDD = 16V, VGS = 4.5V ID = 12A Clamped Inductive Load pF VGS = 0V VDS = 15V ƒ = 1.0MHz Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 140 12 7.1 mJ A mJ Diode Characteristics IS ISM VSD t rr Q rr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 64 showing the A G integral reverse ––– ––– 260 S p-n junction diode. ––– ––– 1.2 V TJ = 25°C, IS = 12A, VGS = 0V ––– 30 45 ns TJ = 25°C, IF =12A ––– 27 41 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRLR7811W 10000 1000 VGS 10V 4.5V 3.7V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V VGS 10V 4.5V 3.7V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V TOP 1000 100 ID , Drain-to-Source Current (A) ID , Drain-to-Source Current (A) TOP 10 2.5V 1 0.1 100 2.5V 10 20µs PULSE WIDTH Tj = 25°C 20µs PULSE WIDTH Tj = 175°C 1 0.01 0.1 1 10 0.1 100 1 Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 2.0 10.00 T J = 25°C VDS = 15V 20µs PULSE WIDTH 2.0 3.0 4.0 5.0 6.0 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com I D = 64A 7.0 (Normalized) 1.5 T J = 175°C R DS(on) , Drain-to-Source On Resistance ID , Drain-to-Source Current (Α ) 1000.00 1.00 100 VDS , Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) 100.00 10 1.0 0.5 V GS = 10V 0.0 -60 -40 -20 0 20 40 60 80 TJ , Junction Temperature 100 120 140 160 180 ( ° C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRLR7811W 10000 6 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd VDS = 24V VDS = 15V 5 Coss = Cds + Cgd VGS, Gate-to-Source Voltage (V) C iss C, Capacitance(pF) ID = 12A 1000 C oss C rss 4 2 1 100 0 1 10 0 100 5 10 15 20 25 QG , Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000 ID , Drain-to-Source Current (A) OPERATION IN THIS AREA LIMITED BY R DS (on) 100 I SD, Reverse Drain Current (A) 100 TJ = 175 ° C 10 T J = 25 ° C 1 V GS = 0 V 0.1 0.0 0.5 1.0 1.5 2.0 V SD,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 2.5 100µsec 10 1msec 1 10msec Tc = 25°C Tj = 175°C Single Pulse 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRLR7811W 70 RD VDS LIMITED BY PACKAGE VGS 60 D.U.T. RG + -VDD I D , Drain Current (A) 50 VGS 40 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 30 Fig 10a. Switching Time Test Circuit 20 VDS 10 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms (Z thJC ) 10 1 D = 0.50 Thermal Response 0.20 0.10 0.05 0.1 0.02 0.01 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01 t1/ t 2 J = P DM x Z thJC +T C 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRLR7811W 400 1 5V ID 4.9A TOP 8.5A D .U .T RG + - VD D IA S 2V0GS V A 0 .0 1 Ω tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp EAS , Single Pulse Avalanche Energy (mJ) D R IV E R L VD S 320 BOTTOM 12A 240 160 80 0 25 50 75 100 Starting Tj, Junction Temperature 125 150 175 ( ° C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. VGS(th) Gate threshold Voltage (V) 2.5 50KΩ 2.0 12V .2µF .3µF D.U.T. 1.5 ID = 250µA + V - DS VGS 1.0 3mA IG 0.5 ID Current Sampling Resistors Fig 14. Gate Charge Test Circuit 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) Fig 13. Threshold Voltage Vs. Temperature 6 www.irf.com IRLR7811W Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • • • • RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 15. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRLR7811W TO-252AA (D-Pak) Package Outline Dimensions are shown in millimeters (inches) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) 6 .7 3 ( .2 6 5 ) 6 .3 5 ( .2 5 0 ) 1 .1 4 ( .0 4 5 ) 0 .8 9 ( .0 3 5 ) -A 1 .2 7 (.0 5 0 ) 0 .8 8 (.0 3 5 ) 5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 4 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 6 .2 2 (.2 4 5 ) 5 .9 7 (.2 3 5 ) 1.0 2 (.0 4 0 ) 1.6 4 (.0 2 5 ) 1 0 .42 (.4 1 0 ) 9 .4 0 (.3 7 0 ) 1 2 L E A D A S S IG N M E N T S 3 1 - GATE 0 .5 1 (.0 2 0 ) M IN . -B 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 3X 2X 1 .1 4 (.0 4 5 ) 0 .7 6 (.0 3 0 ) 0 .8 9 (.0 3 5 ) 0 .6 4 (.0 2 5 ) 0 .2 5 (.0 1 0 ) 2 - D R A IN 3 - S OU R CE 4 - D R A IN 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) M A M B NOTE S: 2 .2 8 ( .0 9 0 ) 1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 14 .5 M , 1 9 8 2 . 4 .5 7 (.1 8 0 ) 2 C O N TR O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ). TO-252AA (D-Pak) Part Marking Information EXAMPLE: T HIS IS AN IRFR120 WITH AS S EMBLY LOT CODE 1234 AS S EMBLED ON WW 16, 1999 IN THE AS S EMBLY LINE "A" PART NUMBER INT ERNAT IONAL RECT IFIER LOGO 12 AS S EMBLY LOT CODE 8 IRFU120 916A 34 DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A www.irf.com IRLR7811W D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .47 6 ) 11.9 ( .46 9 ) F E E D D IR E C T IO N TRL 16 .3 ( .641 ) 15 .7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FE E D D IR E C T IO N N O T ES : 1 . C O N T R O LLIN G D IME N S IO N : M ILL IM ET E R . 2 . A LL D IM EN S IO N S A R E SH O W N IN M ILLIM ET E R S ( IN C H E S ). 3 . O U TL IN E C O N FO R MS T O E IA -481 & E IA -54 1. 1 3 IN C H 16 m m N O TE S : 1. O U TL IN E C O N F O R M S T O E IA -481 . Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 1.9mH Pulse width ≤ 400µs; duty cycle ≤ 2%. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 30A. R G = 25Ω, IAS = 12A. * When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/02 www.irf.com 9