IRF IRF7E3704

PD - 94678
HEXFET® POWER MOSFET
SURFACE MOUNT (LCC-18)
IRF7E3704
20V, N-CHANNEL
Product Summary
Part Number
BVDSS
IRF7E3704
20V
RDS(on)
0.05Ω
ID
12A*
LCC-18
®
Seventh Generation HEXFET power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve the lowest possible on-resistance
per silicon unit area. This benefit, combined with the
fast switching speed and ruggedized device design
that HEXFET power MOSFETs are well known for,
provides the designer with an extremely efficient device
for use in a wide variety of applications.
These devices are well-suited for applications such
as switching power supplies, motor controls, inverters, choppers, audio amplifiers and high-energy pulse
circuits.
Features:
n
n
n
n
n
n
n
n
Low RDS(on)
Avalanche Energy Ratings
Dynamic dv/dt Rating
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Light Weight
Surface Mount
Absolute Maximum Ratings
Pre-Irradiation
Parameter
ID @ VGS = 10V, TC = 25°C
ID @ VGS = 10V, TC = 100°C
IDM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current ➀
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ➁
Avalanche Current ➀
Repetitive Avalanche Energy ➀
Peak Diode Recovery dv/dt ➂
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
Units
12*
10
48
20
0.16
±20
120
12
2.0
1.0
-55 to 150
A
W
W/°C
V
mJ
A
mJ
V/ns
o
C
300 (for 5s)
0.42 (Typical)
g
* Current is limited by package
For footnotes refer to the last page
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1
07/02/03
IRF7E3704
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Min
Drain-to-Source Breakdown Voltage
∆BV DSS/∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
g fs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Typ Max Units
20
—
—
V
—
0.023
—
V/°C
—
—
1.0
14
—
—
—
—
—
—
—
—
0.05
0.055
3.0
—
20
100
Ω
V
S( )
µA
IGSS
IGSS
Qg
Q gs
Q gd
td(on)
tr
td(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6.1
100
-100
22
10
6.0
16
100
26
12
—
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
1850
1005
63
—
—
—
pF
RG
Gate Resistance
—
2.6
—
Ω
nA
nC
ns
nH
Test Conditions
V GS = 0V, ID = 250µA
Ω
Parameter
BVDSS
Reference to 25°C, ID = 1.0mA
VGS = 10V, ID = 10A
➃
VGS = 4.5V, ID = 10A
VDS = VGS, ID = 250µA
VDS = 10V, IDS = 10A ➃
VDS = 20V ,VGS=0V
VDS = 16V,
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS = 4.5V, ID = 12A
VDS = 10V
VDD = 10V, ID = 12A,
VGS = 4.5V, RG = 1.8Ω
Measured from the center of
drain pad to center of source pad
VGS = 0V, VDS = 10V
f = 1.0MHz
f = 1.6MHz, open drain
Source-Drain Diode Ratings and Characteristics
Parameter
IS
ISM
VSD
trr
QRR
ton
Min Typ Max Units
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) ➀
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
—
—
—
—
—
—
—
—
—
—
12*
48
1.4
50
60
Test Conditions
A
V
ns
nC
Tj = 25°C, IS = 12A, VGS = 0V ➃
Tj = 25°C, IF = 12A, di/dt ≤ 100A/µs
VDD ≤ 16V ➃
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
* Current is limited by package
Thermal Resistance
Parameter
RthJC
Junction-to-Case
Min Typ Max Units
—
—
6.25
Test Conditions
°C/W
Note: Corresponding Spice and Saber models are available on International Rectifier Web site.
For footnotes refer to the last page
2
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IRF7E3704
100
VGS
TOP
10V
9.0V
8.0V
7.0V
6.0V
5.0V
4.5V
BOTTOM 3.5V
3.5V
10
40µs PULSE WIDTH
Tj = 25°C
VGS
10V
9.0V
8.0V
7.0V
6.0V
5.0V
4.5V
BOTTOM 3.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
3.5V
10
40µs PULSE WIDTH
Tj = 150°C
1
1
0.1
1
10
0.1
100
100
T J = 25°C
T J = 150°C
VDS = 15V
15
40µs PULSE
WIDTH
4
4.5
5
5.5
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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R DS(on) , Drain-to-Source On Resistance
(Normalized)
ID , Drain-to-Source Current ( Α)
2.0
3.5
10
100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
10
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
ID = 12A
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF7E3704
VGS =
Ciss =
Crss =
Coss =
C, Capacitance (pF)
2400
0V,
f = 1MHz
Cgs + Cgd , Cds SHORTED
Cgd
Cds + Cgd
Ciss
2000
C
oss
1600
1200
800
400
12
VGS , Gate-to-Source Voltage (V)
2800
ID = 12A
10
1
10
6
4
2
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
10
VDS , Drain-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current ( Α)
100
T J = 150°C
T J = 25°C
1
VGS = 0V
0.2
0.6
1.0
1.4
1.8
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
30
40
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
0.1
20
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
10
VDS = 16V
VDS = 10V
8
C
rss
0
100µs
10
1
2.2
OPERATION IN THIS AREA
LIMITED BY RDS(on)
1ms
10ms
Tc = 25°C
Tj = 150°C
Single Pulse
1
10
100
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF7E3704
16
RD
VDS
LIMITED BY PACKAGE
I D , Drain Current (A)
VGS
D.U.T.
RG
12
+
-VDD
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
8
Fig 10a. Switching Time Test Circuit
4
VDS
90%
0
25
50
75
100
125
150
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC)
10
D = 0.50
0.20
1
0.10
0.05
0.02
0.01
0.1
SINGLE PULSE
(THERMAL RESPONSE)
P DM
t1
t2
0.01
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF7E3704
1 5V
L
VDS
D .U .T.
RG
IA S
2V
0 GS
V
D R IV E R
+
- VD D
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
A
EAS , Single Pulse Avalanche Energy (mJ)
300
TOP
240
BOTTOM
180
120
60
0
25
V (B R )D SS
ID
5.4A
7.6A
12A
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF
.3µF
4.5V
QGS
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
D.U.T.
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRF7E3704
Footnotes:
➀ Repetitive Rating; Pulse width limited by
➂ ISD ≤ 12A, di/dt ≤ 100A/µs,
maximum junction temperature.
➁ VDD = 15V, starting TJ = 25°C, L = 1.7mH
Peak IAS = 12A, VGS =10V, RG = 25Ω
➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
VDD ≤ 20V, TJ ≤ 150°C
Case Outline and Dimensions — LCC-18
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 07/03
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