PD - 96995A IRF6646 DirectFET™ Power MOSFET Typical values (unless otherwise specified) RoHS compliant containing no lead or bromide Low Profile (<0.7 mm) Dual Sided Cooling Compatible Ultra Low Package Inductance Optimized for High Frequency Switching Ideal for High Performance Isolated Converter Primary Switch Socket Optimized for Synchronous Rectification Low Conduction Losses Compatible with existing Surface Mount Techniques VDSS VGS RDS(on) 80V max ±20V max Qg tot 36nC 7.6mΩ@ 10V Qgd Vgs(th) 12nC 3.8V DirectFET™ ISOMETRIC MN Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SQ SX ST MQ MX MN MT Description The IRF6646 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6646 is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom applications (36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high performance isolated DC-DC converters. Absolute Maximum Ratings Parameter VDS Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V VGS ID @ TA = 25°C ID @ TA = 70°C ID @ TC = 25°C IDM EAS IAR Typical RDS(on) (Ω) 0.05 ID = 6.2A 0.04 0.03 0.02 T J = 125°C 0.01 T J = 25°C 0 4 6 8 10 12 14 16 VGS, Gate -to -Source Voltage (V) Fig 1. Typical On-Resistance vs. Gate Voltage Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state. www.irf.com VGS, Gate-to-Source Voltage (V) Pulsed Drain Current Single Pulse Avalanche Energy Avalanche Current Max. Units 80 ±20 12 9.6 68 96 230 7.2 V A mJ A 12.0 ID= 7.2A 10.0 VDS= 40V VDS= 16V 8.0 6.0 4.0 2.0 0.0 0 Fig 2. 10 20 30 40 QG Total Gate Charge (nC) Typical Total Gate Charge vs. Gate-to-Source Voltage TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 8.8mH, RG = 25Ω, IAS = 7.2A. 1 06/08/05 IRF6646 Static @ TJ = 25°C (unless otherwise specified) Parameter Min. VGS = 0V, ID = 250µA V V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 12A BVDSS Drain-to-Source Breakdown Voltage 80 ––– ––– ∆ΒVDSS/∆TJ RDS(on) Breakdown Voltage Temp. Coefficient ––– 0.10 ––– Static Drain-to-Source On-Resistance ––– 7.6 9.5 VGS(th) Gate Threshold Voltage 2.8 ––– 4.8 V ∆VGS(th)/∆TJ IDSS Gate Threshold Voltage Coefficient ––– -11 ––– mV/°C IGSS gfs Qg Drain-to-Source Leakage Current Conditions Typ. Max. Units VDS = VGS, ID = 150µA ––– ––– 20 µA VDS = 80V, VGS = 0V ––– ––– 250 VDS = 64V, VGS = 0V, TJ = 125°C nA VGS = 20V Gate-to-Source Forward Leakage ––– ––– 100 Gate-to-Source Reverse Leakage ––– ––– -100 Forward Transconductance 17 ––– ––– VGS = -20V S VDS = 10V, ID = 7.2A Total Gate Charge ––– 36 50 Qgs1 Pre-Vth Gate-to-Source Charge ––– 7.6 ––– Qgs2 Post-Vth Gate-to-Source Charge ––– 2.0 ––– Qgd Gate-to-Drain Charge ––– 12 Qgodr ––– 14 ––– Qsw Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) ––– 14 ––– Qoss Output Charge ––– 18 ––– nC RG Gate Resistance ––– 1.0 ––– Ω td(on) Turn-On Delay Time ––– 17 ––– VDD = 40V, VGS = 10V tr Rise Time ––– 20 ––– ID = 7.2A td(off) Turn-Off Delay Time ––– 31 ––– tf Fall Time ––– 12 ––– Ciss Input Capacitance ––– 2060 ––– Coss Output Capacitance ––– 480 ––– Crss Reverse Transfer Capacitance ––– 120 ––– Coss Output Capacitance ––– 2180 ––– ƒ = 1.0MHz VGS = 0V, VDS = 1.0V, f=1.0MHz Coss Output Capacitance ––– 310 ––– VGS = 0V, VDS = 64V, f=1.0MHz Min. Typ. Max. Units ––– ––– VDS = 40V nC VGS = 10V ID = 7.2A See Fig. 17 ns VDS = 16V, VGS = 0V RG=6.2Ω VGS = 0V pF VDS = 25V Diode Characteristics Parameter IS Continuous Source Current (Body Diode) ISM Pulsed Source Current A ––– ––– Conditions MOSFET symbol 2.5 showing the 96 integral reverse p-n junction diode. TJ = 25°C, IS = 7.2A, VGS = 0V (Body Diode) VSD Diode Forward Voltage ––– ––– 1.3 V trr Reverse Recovery Time ––– 36 54 ns TJ = 25°C, IF = 7.2A, VDD = 40V Qrr Reverse Recovery Charge ––– 48 72 nC di/dt = 100A/µs Notes: Pulse width ≤ 400µs; duty cycle ≤ 2%. Repetitive rating; pulse width limited by max. junction temperature. Thermally limited and used Rθja to calculate. 2 www.irf.com IRF6646 Absolute Maximum Ratings Max. Units 2.8 1.8 89 270 -40 to + 150 W Parameter Power Dissipation Power Dissipation Power Dissipation Peak Soldering Temperature Operating Junction and Storage Temperature Range PD @TA = 25°C PD @TA = 70°C PD @TC = 25°C TP TJ TSTG °C Thermal Resistance Parameter RθJA RθJA RθJA RθJC RθJ-PCB Typ. Max. Units ––– 12.5 20 ––– 1.0 45 ––– ––– 1.4 ––– °C/W Junction-to-Ambient Junction-to-Ambient Junction-to-Ambient Junction-to-Case Junction-to-PCB Mounted 100 Thermal Response ( Z thJA ) D = 0.50 10 0.20 0.10 0.05 1 0.02 0.01 τJ 0.1 0.01 SINGLE PULSE ( THERMAL RESPONSE ) R1 R1 τJ τ1 R2 R2 τ2 τ1 R3 R3 τC τ τ3 τ2 τ3 Ci= τi/Ri Ci i/Ri 1E-005 0.0001 0.001 0.01 τ4 τ4 τi (sec) 0.678449 0.00086 17.29903 0.57756 17.56647 8.94 9.470128 106 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc 0.001 1E-006 Ri (°C/W) R4 R4 0.1 1 10 100 t1 , Rectangular Pulse Duration (sec) Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient Notes: Surface mounted on 1 in. square Cu board, steady state. Used double sided cooling , mounting pad. Mounted on minimum footprint full size board with metalized back and with small clip heatsink. Surface mounted on 1 in. square Cu board (still air). www.irf.com TC measured with thermocouple incontact with top (Drain) of part. Rθ is measured at TJ of approximately 90°C. Mounted to a PCB with small clip heatsink (still air) Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air) 3 IRF6646 100 100 BOTTOM 10 TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 7.0V 6.0V 6.0V 10 ≤60µs PULSE WIDTH ≤60µs PULSE WIDTH Tj = 150°C Tj = 25°C 1 0.1 1 BOTTOM 6.0V VGS 15V 10V 8.0V 7.0V 6.0V 1 10 0.1 100 1 10 100 V DS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 4. Typical Output Characteristics Fig 5. Typical Output Characteristics 2.0 ID = 12A VGS = 10V VDS = 10V ≤60µs PULSE WIDTH Typical RDS(on) (Normalized) ID, Drain-to-Source Current (Α) 1000 100 T J = 150°C T J = 25°C 10 T J = -40°C 1 1.5 1.0 0.5 0.1 -60 -40 -20 0 3 4 5 6 7 8 VGS, Gate-to-Source Voltage (V) Fig 6. Typical Transfer Characteristics 10000 Fig 7. Normalized On-Resistance vs. Temperature 45 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd 35 Typical RDS(on) ( Ω) C, Capacitance(pF) T J = 25°C 40 C oss = C ds + C gd Ciss 1000 20 40 60 80 100 120 140 160 T J , Junction Temperature (°C) Coss Vgs = 7.0V Vgs = 8.0V Vgs = 10V Vgs = 15V 30 25 20 15 10 Crss 5 0 100 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 8. Typical Capacitance vs.Drain-to-Source Voltage 4 10 30 50 70 90 110 ID, Drain Current (A) Fig 9. Typical On-Resistance vs. Drain Current www.irf.com IRF6646 1000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100 100 10 T J = 150°C T J = 25°C T J = -40°C 1 100µsec 10 1msec 10msec 1 T A = 25°C 0.1 T J = 150°C VGS = 0V Single Pulse 0.01 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.01 1.6 0.10 Fig 10. Typical Source-Drain Diode Forward Voltage 10.00 100.00 Fig11. Maximum Safe Operating Area 14 Typical VGS(th) Gate threshold Voltage (V) 6.0 12 ID, Drain Current (A) 1.00 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) 10 8 6 4 2 0 25 50 75 100 125 ID ID ID ID 5.0 4.0 3.0 2.0 -75 150 = 150µA = 250µA = 1.0mA = 1.0A -50 -25 0 25 50 75 100 125 150 T J , Temperature ( °C ) T A , Ambient Temperature (°C) Fig 13. Typical Threshold Voltage vs. Junction Temperature Fig 12. Maximum Drain Current vs. Ambient Temperature EAS , Single Pulse Avalanche Energy (mJ) 1000 ID 900 TOP 3.3A 4.0A BOTTOM 7.2A 800 700 600 500 400 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 14. Maximum Avalanche Energy vs. Drain Current www.irf.com 5 IRF6646 Current Regulator Same Type as D.U.T. Id Vds 50KΩ Vgs .2µF 12V .3µF D.U.T. + V - DS Vgs(th) VGS 3mA IG ID Qgs1 Qgs2 Current Sampling Resistors Fig 15a. Gate Charge Test Circuit Qgd Qgodr Fig 15b. Gate Charge Waveform V(BR)DSS 15V DRIVER L VDS tp D.U.T RG + V - DD IAS VGS 20V A I AS 0.01Ω tp Fig 16c. Unclamped Inductive Waveforms Fig 16b. Unclamped Inductive Test Circuit RD VDS VDS 90% VGS D.U.T. RG + - VDD 10V Pulse Width ≤ 1 µs 10% VGS td(on) tr td(off) tf Duty Factor ≤ 0.1 % Fig 17a. Switching Time Test Circuit 6 Fig 17b. Switching Time Waveforms www.irf.com IRF6646 D.U.T Driver Gate Drive + - - - RG • • • • * D.U.T. ISD Waveform Reverse Recovery Current + di/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D= Period P.W. + - Re-Applied Voltage Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Body Diode VDD Forward Drop Inductor Current Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 18. Diode Reverse Recovery Test Circuit for N-Channel HEXFET® Power MOSFETs DirectFET™ Substrate and PCB Layout, MN Outline (Medium Size Can, N-Designation). Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. www.irf.com 7 IRF6646 DirectFET™ Outline Dimension, MN Outline (Medium Size Can, N-Designation). Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. DIMENSIONS NOTE: CONTROLLING DIMENSIONS ARE IN MM METRIC MAX CODE MIN 6.35 A 6.25 5.05 B 4.80 3.95 C 3.85 0.45 D 0.35 0.92 E 0.88 0.82 F 0.78 1.42 G 1.38 0.92 H 0.88 0.52 J 0.48 1.29 K 1.16 2.91 2.74 L 0.70 M 0.59 0.08 N 0.03 0.07 P 0.17 IMPERIAL MIN 0.246 0.189 0.152 0.014 0.034 0.031 0.054 0.034 0.002 0.046 0.109 0.023 0.001 0.007 MAX 0.250 0.201 0.156 0.018 0.036 0.032 0.056 0.036 0.020 0.051 0.115 0.028 0.003 0.003 DirectFET™ Part Marking 8 www.irf.com IRF6646 DirectFET™ Tape & Reel Dimension (Showing component orientation). NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6646). For 1000 parts on 7" reel, order IRF6646TR1 REEL DIMENSIONS STANDARD OPTION (QTY 4800) TR1 OPTION (QTY 1000) IMPERIAL IMPERIAL METRIC METRIC MAX MIN MIN CODE MAX MIN MIN MAX MAX N.C 6.9 A 12.992 N.C 330.0 177.77 N.C N.C 0.75 B 0.795 N.C 20.2 19.06 N.C N.C N.C 0.53 C 0.504 0.50 12.8 13.5 0.520 13.2 12.8 0.059 D 0.059 N.C 1.5 1.5 N.C N.C N.C 2.31 E 3.937 N.C 100.0 58.72 N.C N.C N.C F N.C N.C 0.53 N.C N.C 0.724 18.4 13.50 G 0.47 0.488 N.C 12.4 11.9 0.567 14.4 12.01 H 0.47 0.469 N.C 11.9 11.9 0.606 15.4 12.01 Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/05 www.irf.com 9