IRF IRF6626

PD - 96976D
IRF6626
DirectFET™ Power MOSFET ‚
RoHS compliant containing no lead or bromide 
l Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible 
l Ultra Low Package Inductance
l Optimized for High Frequency Switching 
l Ideal for CPU Core DC-DC Converters
l Optimized for both Sync. FET and some Control FET
applications 
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques 
l
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
30V max ±20V max 4.0mΩ@ 10V 5.2mΩ@ 4.5V
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
6.7nC
1.6nC
5.4nC
13nC
1.8V
tot
19nC
DirectFET™ ISOMETRIC
ST
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
Description
The IRF6626 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the
lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6626 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching
losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors
operating at higher frequencies. The IRF6626 has been optimized for parameters that are critical in synchronous buck operating from 12 volt
buss converters including Rds(on) and gate charge to minimize losses in the control FET socket.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
e
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
e
h
h
k
f
Typical RDS(on) (mΩ)
15
ID = 16A
10
T J = 125°C
5
T J = 25°C
0
3
4
5
6
7
8
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET MOSFETs
ƒ Repetitive rating; pulse width limited by max. junction temperature.
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VGS, Gate-to-Source Voltage (V)
VDS
Max.
Units
30
±20
16
13
72
130
24
13
V
A
mJ
A
6.0
ID= 13A
5.0
4.0
VDS= 24V
VDS= 15V
3.0
2.0
1.0
0.0
0
10
20
30
QG Total Gate Charge (nC)
Fig 2. Typical On-Resistance vs. Gate Voltage
„ Starting TJ = 25°C, L = 0.29mH, RG = 25Ω, IAS = 13A.
† Surface mounted on 1 in. square Cu board, steady state.
‰ TC measured with thermocouple mounted to top (Drain) of part.
1
11/17/05
IRF6626
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
BVDSS
Drain-to-Source Breakdown Voltage
30
–––
–––
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
–––
23
–––
Static Drain-to-Source On-Resistance
–––
4.0
5.4
–––
5.2
7.1
VGS = 0V, ID = 250µA
V
mV/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 16A g
VGS = 4.5V, ID = 13A g
VGS(th)
Gate Threshold Voltage
1.35
–––
2.35
V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
–––
-6.0
–––
mV/°C
Drain-to-Source Leakage Current
–––
–––
1.0
µA
IGSS
gfs
Qg
Conditions
Typ. Max. Units
–––
–––
150
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
Forward Transconductance
64
–––
–––
VDS = VGS, ID = 250µA
VDS = 24V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
S
VDS = 15V, ID = 13A
Total Gate Charge
–––
19
29
Qgs1
Pre-Vth Gate-to-Source Charge
–––
5.2
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
1.6
–––
Qgd
Gate-to-Drain Charge
–––
6.7
Qgodr
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
5.5
–––
Qsw
–––
8.3
–––
Qoss
Output Charge
–––
13
–––
nC
RG
Gate Resistance
–––
–––
1.5
Ω
td(on)
Turn-On Delay Time
–––
13
–––
VDD = 16V, VGS = 4.5Vg
–––
ID = 13A
VDS = 15V
nC
VGS = 4.5V
ID = 13A
See Fig. 17
VDS = 16V, VGS = 0V
tr
Rise Time
–––
15
td(off)
Turn-Off Delay Time
–––
17
–––
tf
Fall Time
–––
4.5
–––
Ciss
Input Capacitance
–––
2380
–––
Coss
Output Capacitance
–––
530
–––
Crss
Reverse Transfer Capacitance
–––
260
–––
Min.
Typ. Max. Units
–––
–––
52
–––
–––
130
integral reverse
ns
Clamped Inductive Load
VGS = 0V
pF
VDS = 15V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
Conditions
MOSFET symbol
A
showing the
VSD
Diode Forward Voltage
–––
–––
1.0
V
p-n junction diode.
TJ = 25°C, IS = 13A, VGS = 0V g
trr
Reverse Recovery Time
–––
15
23
ns
TJ = 25°C, IF = 13A
Qrr
Reverse Recovery Charge
–––
5.4
8.1
nC
di/dt = 100A/µs g
(Body Diode)e
Notes:
ƒ Repetitive rating; pulse width limited by max. junction temperature.
… Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6626
Absolute Maximum Ratings
Max.
Units
2.2
1.4
42
270
-40 to + 150
W
Parameter
h
h
k
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
°C
Thermal Resistance
Parameter
hl
il
jl
kl
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Typ.
Max.
Units
–––
12.5
20
–––
1.0
58
–––
–––
3.0
–––
°C/W
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
g
0.017
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
0.20
0.10
0.05
0.02
0.01
10
1
τJ
0.1
R1
R1
τJ
τ1
R2
R2
R3
R3
R4
R4
τA
τ1
τ2
τ2
τ3
τ3
τ4
τ4
Ci= τi/Ri
SINGLE PULSE
Ci τi/Ri
( THERMAL RESPONSE )
0.01
τ5
τi (sec)
Ri (°C/W)
R5
R5
τ5
τ
0.6677
0.000066
1.0463
0.000896
1.5612
0.004386
29.2822
0.686180
25.4550
32
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
† Surface mounted on 1 in. square Cu board, steady state.
‡ Used double sided cooling , mounting pad.
ˆ Mounted on minimum footprint full size board with metalized
‰ TC measured with thermocouple incontact with top (Drain) of part.
Š Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
† Surface mounted on 1 in. square Cu
board (still air).
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‡ Mounted to a PCB with a
thin gap filler and heat sink.
(still air)
ˆ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6626
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
100
10
2.5V
1
BOTTOM
10
2.5V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 150°C
Tj = 25°C
0.1
0.1
1
10
1
100
1000
0.1
Fig 4. Typical Output Characteristics
100
1000
1.5
VDS = 15V
≤60µs PULSE WIDTH
ID = 16A
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (Α)
10
Fig 5. Typical Output Characteristics
1000
100
T J = 150°C
T J = 25°C
10
T J = -40°C
1
0.1
VGS = 4.5V
V GS = 10
1.0
0.5
1
2
3
4
25
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
T J = 25°C
Vgs = 3.0V
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
20
Typical RDS(on) ( mΩ)
C oss = C ds + C gd
10000
Ciss
1000
20 40 60 80 100 120 140 160
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
100000
-60 -40 -20 0
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
1
V DS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Coss
15
10
5
Crss
100
0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
0
20
40
60
80
100
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6626
1000
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100
T J = 150°C
10
T J = 25°C
T J = 40°C
1
100µsec
1msec
10
10msec
1
0.1
Ta = 25°C
Tj = 150°C
Single Pulse
VGS = 0V
0.01
0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0.01
1.4
VSD, Source-to-Drain Voltage (V)
1.00
10.00
100.00
Fig11. Maximum Safe Operating Area
Fig 10. Typical Source-Drain Diode Forward Voltage
80
2.2
70
2.0
VGS(th) Gate threshold Voltage (V)
ID, Drain Current (A)
0.10
VDS, Drain-to-Source Voltage (V)
60
50
40
30
20
10
1.8
1.6
ID = 50µA
1.4
1.2
1.0
0.8
0.6
0
25
50
75
100
125
-75
150
-50
-25
0
25
50
75
100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 13. Threshold Voltage vs. Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
EAS , Single Pulse Avalanche Energy (mJ)
100
ID
TOP
5.6A
8.4A
BOTTOM 13A
80
60
40
20
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6626
Current Regulator
Same Type as D.U.T.
Id
Vds
Vgs
50KΩ
.2µF
12V
.3µF
+
V
- DS
D.U.T.
Vgs(th)
VGS
3mA
IG
ID
Qgs1 Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
V
RGSG
+
V
- DD
IAS
20V
tp
A
I AS
0.01Ω
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
VDD D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 17a. Switching Time Test Circuit
6
10%
VGS
td(on)
tr
td(off)
tf
Fig 17b. Switching Time Waveforms
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IRF6626
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, ST Outline ƒ
(Small Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G = GATE
D = DRAIN
S = SOURCE
D
G
D
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S
S
D
D
7
IRF6626
DirectFET™ Outline Dimension, ST Outline
(Small Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
MAX
CODE MIN
4.85
A
4.75
3.95
B
3.70
2.85
C
2.75
0.45
D
0.35
0.62
E
0.58
0.62
F
0.58
0.79
G
0.75
0.57
H
0.53
0.30
J
0.26
0.98
K
0.88
2.28
L
2.18
0.70
M
0.59
0.08
N
0.03
0.17
P
0.08
IMPERIAL
MIN
MAX
0.187
0.191
0.146
0.156
0.108
0.112
0.014
0.018
0.023
0.024
0.023
0.024
0.030
0.031
0.021
0.022
0.010
0.012
0.035
0.039
0.086
0.090
0.023
0.028
0.001
0.003
0.003
0.007
DirectFET™ Part Marking
8
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IRF6626
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6626). For 1000 parts on 7" reel,
order IRF6626TR1
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
TR1 OPTION (QTY 1000)
IMPERIAL
IMPERIAL
METRIC
METRIC
MIN
MAX
MIN
CODE
MAX
MIN
MIN
MAX
MAX
12.992
6.9
N.C
A
N.C
177.77 N.C
330.0
N.C
0.795
0.75
B
N.C
19.06
20.2
N.C
N.C
N.C
0.504
0.53
C
0.50
0.520
13.5
12.8
13.2
12.8
0.059
0.059
D
N.C
1.5
1.5
N.C
N.C
N.C
3.937
2.31
E
N.C
58.72
100.0
N.C
N.C
N.C
F
N.C
N.C
0.53
N.C
N.C
0.724
18.4
13.50
G
0.488
0.47
11.9
12.4
N.C
0.567
14.4
12.01
H
0.469
0.47
11.9
N.C
11.9
0.606
15.4
12.01
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 11/05
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9