INFINEON PXB4221

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The "Interworking Element for 8 E1/T1 lines"
(IWE8), PXB 4220 and PXB 4221 are members of
Infineon" ATM Chipset. Together with framing and
line interface components (e.g. Infineon's
QuadFALC PEB 22554) the IWE8 serves as gateway between Asynchronous Transfer Mode (ATM)
networks and timeslot based PDH networks.
The IWE8 is a single chip multiservice device that
integrates ATM cell handling and TDM circuit to
ATM cell interworking in E1/T1 applications. Each
of the 8 E1 or T1 input and output ports can be
configured independently to operate in ATM Mode
or AAL Mode. It is a very flexible solution supporting multiple services with a minimum of devices.
Features
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Full duplex ATM Packetizer/
Depacketizer for 8 E1/T1
highways
Configurable to T1 or E1 mode
via external pin
8 T1/E1 ports configurable independently to ATM or AAL Mode
ATM Mode:
- ATM cell mapping into PDH
according to ITU-T G.804
- B-ISDN User-Network
Interface
- Physical Layer Operation at 1544 kbit/s and
2048 kbit/s according to
ITU-T I.432.3
AAL Mode (PXB 4220/4221):
- AAL1 according to
ITU-T I.363.1 or transparent
without any adaptation layer
overhead (AAL0)
- Structured T1/E1 N x 64 kbit/s
service
- Channel Associated Signalling
(CAS)
- Partially filled cells with programmable filling thresholds
- Reassembly buffer can compensate up to +/- 4 ms Cell
Delay Variation (CDV)
- Statistics counters per channel for lost/misinserted/errored
cells etc.
- Internal clock recovery circuit
using Synchronous Residual
Time Stamp (SRTS) or Adaptive Clock Method (ACM) for
unstructured CES ports.
Optionally, it's possible to
order the PXB 4221 device,
which comes without SRTS
clock recovery.
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IWE8
Inverse Multiplexing over ATM
(IMA) interface
8 generic framer interfaces with
integrated transmit clock selector supporting
- Synchronous Mode (SYM)
- Generic Interface Mode (GIM)
- FALC Mode (FAM): Glue-less
interface for Infineon's Framer
and Line Interface Components (FALC)
- Echo Canceller Mode (EC):
ATM cells are duplicated
internally and transmitted via
two framer ports
UTOPIA industry standard
interface:
- Level 2 in slave mode; 8 data,
5 address lines
- Level 1 in master/slave mode
- UTOPIA clock up to 38.88 MHz
I W E 8
P X B 4 2 2 0 / 4 2 2 1
N e v e r
s t o p
t h i n k i n g .
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16-Bit generic microprocessor
interface for control and configuration of the chip runs either in
Intel 386EX or Motorola compatible mode
External synchronous FlowThrough SSRAM 1 x 64 K x
33 Bit or 1 x 64 K x 32 Bit required
Build-in data path loops for test
ICRC
T1/E1
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Cell insertion/extraction via
microprocessor interface
3.3 V power supply with 5 V
tolerant inputs
Typical power dissipation 1 W
P-BGA 256 package
Temperature range from
-40° to +85°C
PXB 4220/PXB 4221
Networking Element for
8 T1/E1 Ports (IWE8)
RAM IF
AAL1 Mode
S/P
P/S
UTOPIA
Interface
ATM Mode
(G.804)
IMA
Interface
Processor
Interface
JTAG
PXB 4220/PXB 4221
Application Example:
Line Interface Card
SSRAM
T1/E1
QuadFALC
PEB 22554
IWE8
PXB 4220
PXB 4221
T1/E1
QuadFALC
PEB 22554
UTOPIA
ATM Layer
Device
(e.g. ABM,
IMA FPGA,...)
UTOPIA
Microcontroller
How to reach us:
http://www.infineon.com
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The information herein is given to describe certain components
and shall not be considered as warranted characteristics.
Published by
Infineon Technologies AG,
Bereich Kommunikation,
St.-Martin-Strasse 53,
D-81541 München
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© Infineon Technologies AG 2000. All Rights Reserved.
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We hereby disclaim any and all warranties, including but not
limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Information
For further information on technology, delivery terms and
conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon
Technologies Representatives worldwide.
Published by Infineon Technologies AG
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in lifesupport devices or systems with the express written approval
of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness
of that device or system. Life support devices or systems are
intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they
fail, it is reasonable to assume that the health of the user or
other persons may be endangered.
Ordering No. B119-H7648-X-X-7600
Printed in Germany
PS 04005.
NB