Product Brief QuadFALC® Four-channel E1/T1/J1 Framer and Line Interface Component PEF 22554 The QuadFALC® is an addition to Infineon's market leading FALC® family of advanced E1/T1/J1 Framer And Line Interface Unit (LIU) components. As a four port E1/T1/J1 framer and line interface unit (LIU),QuadFALC is optimized for a range of network equipment including Radio network Controllers, Node B line cards, PBX or SDH/SONET ADMs. The QuadFALC features a unique clock generation unit that accepts any reference clock between 1.02 andd 20 MHz as well as integrated analog switches for impedance matching or protection switching. Using industry leading QuadFALC Evaluation support tools, system developers can shorten design cycles while creating a wide range of highly flexible, low BOM E1/T1/J1 line cards. Applications ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Programmable frame formats – E1: Double- & CRC Multi-frame – T1: F4, F12 (D4), Ext. Super Frame (ESF), F72 (SLC96) Detects and generates LOS, AIS and RAI alarms CRC-4 performance monitoring PRBS generation and monitoring Detects & generates LOS, AIS & RAI alarms System bus data rate scalable from 1.544 Mbit/s up to 16 Mbit/s Synchronization Supply Message (SSM) generation and extreaction HDLC Controllers Wireless base stations Router Multi-service access platforms, Digital loop carriers Remote access servers/concentrators SONET/SDH Add/Drop multiplexers ■ ■ ■ ■ 12 HDLC controllers (three per channel) including 128-byte deep FIFO buffers each CAS controller with micro-processor or system interface serial access Supports signaling system #7 ANSI T1.403 Bit-Oriented Messages (BOM), generates periodical performance reports Analog Line Interfaces ■ ■ ■ ■ ■ ■ ■ ■ Four independent E1/T1/J1 long haul/short haul line interface units Software programmable T1/E1/J1 Integrated analog switch for impedance matching (E1-75/120, T1-100 , J1-110) and protection switching (only PG-LBGA-160 package) Crystal-less wander and jitter attenuation/compensation according to TR 62411 and ETS-TBR 12/13 Clock generation unit accepts any frequency reference clock from 1.02 MHz to 20 MHz Programmable transmit pulse shape for flexible pulse generation Receiver sensitivity exceeds -36 dB@772 kHz and -43 dB@1024 kHz Clock signal generation & extraction according to ITU-T G.703 Sec. 13 General Features ■ ■ ■ ■ ■ ■ ■ ■ Frame Aligners ■ ITU-T G.704 frame alignment/synthesis for 2.048/1.544 Mbit/s ■ Software and pin compatible to previous QuadFALC versions Intel® or Motorola® type 8/16-bit microprocessor interface Serial SPI bus and serial SCI bus slave interfaces Low power operation (150mW / channel typical) Dual voltage 1.8 V/3.3 V or single voltage 3.3 V power supply PG-LBGA-160, 15x15 mm with 1.0 mm ball pitch PG-TQFP-144, 20x20 mm, 0,5 mm pitch -40°C to +85°C operation Rohs compliant packages w w w. i n f i n e o n . c o m / f a l c C O M M U N I C AT I O N N e v e r s t o p t h i n k i n g . Product Brief Configuration Assistant To o l Receive Framer Alarm Detection PRBS Monitor Line Decoder CAS Signaling Controller Transmit Line Interface Switching Network Receive System Interface Payload Loop Long/Short Haul Receive Line Interface Remote Loop Local Loop Transmission Line QuadFALC PEF 22554 Block Diagram HDLC/BOM Controller Frame Generation Alarm Generation PRBS Generation Transmit System Interface 4 1 Clock Microcontroller Interface JTAG Boundary Scan System Application - VoIP Primary Access Board The FALC Configuration Assistant supports the user during design phase. All QuadFALC functional blocks can be configured by a GUI supporting the low level API driver. Documentation and Support Package ■ ■ ■ PCM Connector E1/ T1 E1/ T1 E1/ T1 ■ External Protection Circuitry QuadFALC PCM interface PEF22554 Line-card Controller and Switching µP interface E1/ T1 µP PEB20256 ■ ■ ■ HDLC MUNICH256 PCI bus DELIC PEB20570/71 EEPROM ■ Data Sheet Application Notes Hardware Evaluation System EASY 22554 with Schematics and Layout information WinEASY Software for MS Windows 98SE/NT/2000/XP CD-ROM Support Package Support Software (portable low level API driver) Configuration Assistant for rapid porting of device configuration to customer designs. Analog front end calculator Flexible master clocking calculator (X25020) HLDC Controller PCI (3.3V) Product Summary Type Description Package PEF 22554 HT QuadFALC PG-TQFP-144 PEF 22554 E QuadFALC PG-LBGA-160 How to reach us: http://www.infineon.com Published by Infineon Technologies AG St.-Martin-Strasse 53 81669 München © Infineon Technologies AG 2004. All Rights Reserved. Template: pb_tmplt.fm/4 Published by Infineon Technologies AG Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office. Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in lifesupport devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Ordering No. B000-H0000-X-X-7600 Printed in Germany PS 0505