PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Thermally-Enhanced High Power RF LDMOS FETs 100 W, 1930 – 1990 MHz Description The PTFA191001E and PTFA191001F are thermally-enhanced, 100-watt, internally-matched LDMOS FETs intended for WCDMA, IS-95 and CDMA2000 applications. They are characterized for singleand two-carrier WCDMA operation from 1930 to 1990 MHz. Thermally-enhanced packaging provides the coolest operation available. PTFA191001E Package H-36248-2 PTFA191001F Package H-37248-2 Features Two-carrier WCDMA Drive-up VDD = 30 V, IDQ = 900 mA, ƒ = 1960 MHz, 3GPP WCDMA signal, P/A R = 8 dB, 10 MHz carrier spacing -23 35 • Thermally-enhanced packages, Pb-free and RoHS-compliant • Broadband internal matching • Typical two-carrier WCDMA performance at 1960 MHz, 30 V - Average output power = 25 W - Linear Gain = 17.0 dB - Efficiency = 27.5% - Intermodulation distortion = –37 dBc - Adjacent channel power = –41.0 dBc • Typical two-carrier IS-95 performance at 1930 MHz, 30 V - Average output power = 25 W - Efficiency = 28% - Intermodulation distortion = –35 dBc @ 1.2288 - Adjacent channel power = –51 dBm • Typical CW performance, 1960 MHz, 30 V - Output power at P–1dB = 130 W - Efficiency = 56% • Integrated ESD protection: Human Body Model, Class 2 (minimum) • Excellent thermal stability, low HCI drift • Capable of handling 10:1 VSWR @ 30 V, 100 W (CW) output power -28 30 -33 25 IM3 -38 20 -43 15 -48 Drain Efficiency (%) IM3 (dBc), ACPR (dBc) Efficiency 10 ACPR -53 5 34 36 38 40 42 44 46 Average Output Power (dBm) All published data at TCASE = 25°C unless otherwise indicated *See Infineon distributor for future availability. ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet 1 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution RF Characteristics WCDMA Measurements (tested in Infineon test fixture) VDD = 30 V, IDQ = 900 mA, POUT = 44 dBm average ƒ1 = 1955 MHz, ƒ2 = 1965 MHz, 3GPP signal, channel bandwidth = 3.84 MHz , peak/average = 8 dB @ 0.01% CCDF Characteristic Symbol Min Typ Max Unit Gain Gps 16 17.0 — dB Drain Efficiency ηD 26 28 — % Intermodulation Distortion IMD — –37 –35 dBc DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA VDS = 63 V, V GS = 0 V IDSS — — 10.0 µA RDS(on) — 0.08 — Ω On-State Resistance VGS = 10 V, V DS = 0.1 V Operating Gate Voltage VDS = 28 V, IDQ = 900 mA VGS 2.0 2.5 3.0 V Gate Leakage Current VGS = 10 V, V DS = 0 V IGSS — — 1.0 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 417 W 2.38 W/°C Above 25°C derate by Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 100 W CW) RθJC 0.42 °C/W *See Infineon distributor for future availability. Data Sheet 2 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Ordering Information Type and Version Package Type Package Description Marking PTFA191001E V4 H-36248-2 Thermally-enhanced slotted flange, single-ended PTFA191001E PTFA191001F V4 H-37248-2 Thermally-enhanced earless flange, single-ended PTFA191001F Typical Performance (data taken in a production test fixture) Broadband Performance Two-carrier WCDMA at Selected Biases VDD = 30 V, IDQ = 900 mA, POUT = 44.0 dBm VDD = 30 V, ƒ = 1960 MHz, 3GPP WCDMA signal, P/AR = 8 dB, 10 MHz carrier spacing, series show IDQ 35 -30 -5 -15 25 Efficiency -20 20 -25 15 Gain -30 3rd Order IMD (dBc) -10 30 Input Return Loss (dB) Gain (dB), Efficiency (%) Return Loss -35 1.0 A -40 1.1 A -45 900 mA -50 800 mA 10 1900 1920 1940 1960 1980 2000 -35 2020 -55 34 Frequency (MHz) Data Sheet 36 38 40 42 44 46 Output Power, PEP (dBm) 3 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Typical Performance (cont.) Power Sweep, CW Conditions Single-carrier WCDMA Drive-up VDD = 30 V, IDQ = 900 mA, ƒ = 1960 MHz VDD = 30 V, IDQ = 900 m A, ƒ = 1960 MHz, 3GPP WCDMA s ignal, TM1 w/16 DPCH, 67% clipping, PAR = 8.5 dB, 3.84 MHz BW Gain (dB) Gain 40 16 30 Efficiency 15 TCASE = 25°C 20 Drain Efficiency (%) 50 17 Adjacent Channel Power Ratio (dB) 60 TCASE = 90°C 14 10 0 20 40 60 80 100 -35 40 -40 -45 20 -50 10 -55 0 33 120 35 55 43 45 Efficiency IM3 Up 45 40 -25 35 -30 30 25 -35 20 -40 Gain -45 15 -25 10 30 31 32 33 Intermodulation Distortion (dBc) 50 -15 -30 3rd Order -35 -40 5th -45 -50 7th -55 -60 0 10 20 30 40 Tone Spacing (MHz) Supply Voltage (V) Data Sheet 41 VDD = 30 V IDQ = 900 mA, ƒ = 1960 MHz, POUT = 49.5 dBm PEP Gain (dB), Drain Efficiency (%) 3rd Order Intermodulation Distortion (dBc) -10 27 28 29 39 Intermodulation Distortion Products vs. Tone Spacing Voltage Sweep 25 26 37 Average Output Power (dBm ) IDQ = 900 mA, ƒ = 1960 MHz, tone spacing = 1 MHz, POUT (PEP) = 50 dBm 23 24 ACPR Up ACPR Low ACPR Output Power (W) -20 30 Efficiency Drain Efficiency (%) 18 4 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Typical Performance (cont.) IS-95 Two-carrier NCDMA Drive-up Bias Voltage vs. Temperature VDD = 30 V, IDQ = 900 mA, ƒ1 = 1962.5 MHz, ƒ2 = 1960 MHz Voltage normalized to typical gate voltage, series show current Normalized Bias Voltage (V) Efficiency 25 -30 -35 20 -40 15 -45 10 IMD Low -55 36.0 Drain Efficiency (%) Intermodulation Distortion (dBc) 30 -25 -50 1.03 35 -20 5 38.0 40.0 42.0 1.01 1.5 A 3.0 A 1.00 0.99 4.5 A 6.0 A 7.5 A 9.0 A 0.98 0.97 0.96 0.95 -20 0 44.0 0.2 A 0.6 A 1.0 A 1.02 0 20 40 60 80 100 Case Temperature (°C) Average Output Power (dBm) R --> Broadband Circuit Impedance GEN E RA TO Z Load Ω MHz R jX R jX 1900 5.41 –4.79 2.88 2.91 1930 5.23 –4.54 2.81 3.18 5.05 –4.32 2.77 3.39 1990 4.92 –4.06 2.80 3.63 2020 4.79 –3.81 2.73 3.89 0 .2 0 .1 0.0 Z Source 2020 MHz 1900 MHz 0 .1 -- 1960 1900 MHz S N GTH ELE W AV Z Source Ω Z Load 2020 MHz L OA D T O W AR D - W A VEL E N G TH S T O W ARD S 0 .1 Z Load G Frequency 0. 2 D Z Source Z0 = 50 Ω Data Sheet 5 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Reference Circuit C1 0.001µF R2 1.3KV R1 1.2K V QQ1 LM7805 VDD Q1 BCP56 C2 0.001µF R3 2K V C3 0.001µF R4 2K V R5 10 V C4 10 µF 35V R6 5.1KV C5 0.1µF R8 2KV R7 5.1KV C6 1µF C7 0.01µF C10 10 pF C8 l5 10 pF C11 1 µF V DD C13 10 µF 50V C12 0.02 µF R9 10 V l7 l4 C18 1.0 pF DUT RF_IN l1 l2 l3 l6 l10 l9 C9 10 pF l11 C21 10 pF l12 l13 C19 1.0 pF l8 C14 10 pF C15 1 µF l14 l15 RF_OUT C20 1.5 pF A 1 9 1 0 0 1 e f _ sc h C16 0.02 µF C17 10 µF 50V Reference circuit schematic for ƒ = 1960 MHz Circuit Assembly Information DUT PTFA191001E or PTFA191001F PCB 0.76 mm [.030”] thick, εr = 4.5 Microstrip l1 l2 l3 l4 l5 l6 l7 l8 l9 l10 (taper) l11 (taper) l12 l13 l14 l15 Electrical Characteristics at 1960 MHz 1 0.352 0.183 0.016 0.026 0.213 0.069 0.289 0.289 0.040 0.050 0.027 0.009 0.034 0.086 0.364 LDMOS Transistor Rogers TMM4 2 oz. copper Dimensions: L x W (mm) Dimensions: L x W (in.) λ, 50.4 Ω λ, 38.0 Ω λ, 11.4 Ω λ, 60.0 Ω λ, 60.0 Ω λ, 6.9 Ω λ, 54.5 Ω λ, 54.5 Ω λ, 5.0 Ω λ, 5.0 Ω / 11.8 Ω λ, 11.8 Ω / 31.0 Ω λ, 31.0 Ω λ, 41.0 Ω λ, 41.0 Ω λ, 50.4 Ω 29.31 x 1.42 14.86 x 2.16 1.22 x 10.19 2.16 x 0.99 18.03 x 0.99 5.11 x 17.86 24.16 x 1.24 24.16 x 1.24 2.95 x 25.40 3.81 x 25.40 / 9.80 2.18 x 9.80 / 2.84 0.76 x 2.87 2.82 x 1.91 7.06 x 1.91 30.33 x 1.42 1.154 0.585 0.048 0.085 0.710 0.201 0.951 0.951 0.116 0.150 0.086 0.030 0.111 0.278 1.194 x 0.056 x 0.085 x 0.401 x 0.039 x 0.039 x 0.703 x 0.049 x 0.049 x 1.000 x 1.000 / 0.386 x 0.386 / 0.112 x 0.113 x 0.075 x 0.075 x 0.056 1Electrical characteristics are rounded. Data Sheet 6 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Reference Circuit (cont.) Component Description Suggested Manufacturer P/N or Comment C1, C2, C3 C4 C5 C6, C11, C15 C7 C8, C9, C10, C14, C21 C12, C16 C13, C17 C18, C19 C20 Q1 QQ1 R1 R2 R3, R8 R4 R5, R9 R6, R7 Capacitor, 0.001 µF Tantalum capacitor, 10 µF, 35 V Capacitor, 0.1 µF Capacitor, 1.0 µF Capacitor, 0.01 µF Capacitor (ceramic), 10 pF Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key ATC PCC1772CT-ND PCS6106TR-ND PCC104BCT-ND 920C 105 200B 103 100B 100 Capacitor, 0.02 µF Tantalum capacitor, 10 µF, 50 V Capacitor (ceramic), 1.0 pF Capacitor (ceramic), 1.5 pF Transistor Voltage regulator Chip resistor, 1.2 k-ohms Chip resistor, 1.3 k-ohms Chip resistor, 2 k-ohms Potentiometer, 2 k-ohms Chip resistor, 10 ohms Chip resistor, 5.1 k-ohms Digi-Key Garrett Electronics ATC ATC Infineon National Semiconductor Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key 200B 203 TPS106K050R0400 100B 1R0 100B 1R5 BCP56 LM7805 P1.2KGCT-ND P1.3KGCT-ND P2KECT-ND 3224W-202ETR-ND P10ECT-ND P5.1KECT-ND See next page for reference circuit assembly diagram Data Sheet 7 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Reference Circuit (cont.) R4 R5 C4 C3 + C5 R6 R7 10 35V R3 C2 LM QQ1 R2 V DD Q1 R1 C6 C10 C8 C7 R8 RF_IN V DD C1 C11 C12 C18 R9 C9 C13 RF_OUT C20 C19 C21 C15 C16 C17 C14 V DD A 1 9 1 0 0 1 e f _ a ssy R4 R5 C4 C3 R3 C2 R2 + C5 R6 R7 VDD C1 LM QQ1 Q1 R1 C6 C8 C7 R8 A191001ef_dtl Reference circuit assembly diagram* (not to scale) *Gerber Files for this circuit available on request Data Sheet 8 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Package Outline Specifications Package H-36248-2 (45° X 2.72 [.107]) CL 2X 4.83±0.51 [.190±.020] D FLANGE 9.78 [.385] LID 9.40 +0.10 –0.15 19.43 ±0.51 [.370 +.004 –.006 ] [.765±.020] S C L 2X R1.63 [.064] G 2X 12.70 [.500] 4X R1.52 [.060] 27.94 [1.100] 19.81±0.20 [.780±.008] 1.02 [.040] C L SPH 1.57 [.062] 3.61±0.38 [.142±.015] 0.0381 [.0015] -A34.04 [1.340] 248-cases: h-30248-2_po Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness, Package H-36248-2: S, D, G - flange & leads: 1.14 micron ± 0.38 micron [45 microinch ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 9 of 11 Rev. 04, 2007-10-31 PTFA191001E PTFA191001F Confidential, Limited Internal Distribution Package Outline Specifications (cont.) Package H-37248-2 ( 45° X 2.72 [.107]) C L 2X 4.83±0.51 [.190±.020] D +0.10 LID 9.40 –0.15 [.370+.004 – .006 ] FLANGE 9.78 [.385] CL 19.43±0.51 [.765±.020] G 4X R0.508 +0.381 –0.127 [R.020+.015 – .005] 2X 12.70 [.500] 19.81±0.20 [.780±.008] C L SPH 1.57 [.062] 1.02 [.040] 0.0381 [.0015] -A- S 3.61±0.38 [.142±.015] 20.57 [.810] 248-cases:h-31248-2_po Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6 Gold plating thickness: S, D, G - flange & leads: 1.14 micron ± 0.38 micron [45 microinch ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 10 of 11 Rev. 04, 2007-10-31 PTFA191001E/F Confidential, Limited Internal Distribution Revision History: 2007-10-31 Previous Version: Rev. 02, 2005-08-11, Data Sheet; Rev. 03, 2007-06-25 Data Sheet Page 1, 10 Subjects (major changes since last revision) Update company information. 1, 3, 9, 10 Update to product V4, with new package technologies. Update package outline diagrams. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International GOLDMOS® is a registered trademark of Infineon Technologies AG. Edition 2007-10-31 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2004. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 11 of 11 Rev. 04, 2007-10-31