PTFA091201E PTFA091201F Confidential, Limited Internal Distribution Thermally-Enhanced High Power RF LDMOS FETs 120 W, 920 – 960 MHz Description The PTFA091201E and PTFA091201F are 120-watt LDMOS FETs designed for ultra-linear GSM/EDGE power amplifier applications in the 920 to 960 MHz band. Features include input and output matching, and thermally-enhanced packages with slotted or earless flanges. Manufactured with Infineon's advanced LDMOS process, these devices provide excellent thermal performance and superior reliability. • Thermally-enhanced packages • Broadband internal matching • Typical EDGE performance - Average output power = 50 W - Gain = 19.0 dB - Efficiency = 44% • Typical CW performance - Output power at P–1dB = 135 W - Gain = 18.0 dB - Efficiency = 64% • Integrated ESD protection: Human Body Model, Class 2 (minimum) 15 • Pb-free and RoHS compliant 10 • Excellent thermal stability, low HCI drift • Capable of handling 10:1 VSWR @ 28 V, 120 W (CW) output power VDD = 28 V, IDQ = 750 mA, ƒ = 959.8 MHz 50 Efficiency -20 45 -30 40 -40 35 -50 30 400 kHz -60 25 -70 20 -80 600 kHz -90 36 38 40 42 44 46 48 Drain Efficiency (%) Modulation Spectrum (dBc) 55 -10 PTFA091201F Package H-37248-2 Features EDGE Modulation Spectrum Performance 0 PTFA091201E Package H-36248-2 50 Output Power, Avg. (dBm) RF Characteristics EDGE Measurements (not subject to production test—verified by design/characterization in Infineon test fixture) VDD = 28 V, IDQ = 750 mA, POUT = 50 W, ƒ = 959.8 MHz Characteristic Symbol Min Typ Max Unit EVM (RMS) — 2.5 — % Modulation Spectrum @ 400 kHz ACPR — –62 — dBc Modulation Spectrum @ 600 kHz ACPR — –74 — dBc Gain Gps — 19 — dB Drain Efficiency ηD — 44 — % Error Vector Magnitude All published data at TCASE = 25°C unless otherwise indicated *See Infineon distributor for future availability. ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet 1 of 10 Rev. 03, 2007-11-19 PTFA091201E PTFA091201F Confidential, Limited Internal Distribution RF Characteristics (cont.) Two–tone Measurements (tested in Infineon test fixture) VDD = 28 V, IDQ = 750 mA, POUT = 110 W PEP, ƒ = 960 MHz, tone spacing = 1 MHz Characteristic Symbol Min Typ Max Unit Gain Gps 18 19 — dB Drain Efficiency ηD 45 48 — % Intermodulation Distortion IMD — –31 –28 dBc DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA VDS = 63 V, V GS = 0 V IDSS — — 10.0 µA RDS(on) — 0.07 — Ω On-State Resistance VGS = 10 V, V DS = 0.1 V Operating Gate Voltage VDS = 28 V, IDQ = 750 mA VGS 2.0 2.5 3.0 V Gate Leakage Current VGS = 10 V, V DS = 0 V IGSS — — 1.0 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 427 W 2.44 W/°C Above 25°C derate by Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 120 W CW) RθJC 0.41 °C/W Ordering Information (see pages 9 and 10 for further information) Type and Version Package Type Package Description Marking PTFA091201E V4 H-36248-2 Thermally-enhanced slotted flange, single-ended PTFA091201E PTFA091201F V4 H-37248-2 Thermally-enhanced earless flange, single-ended PTFA091201F Data Sheet 2 of 10 Rev. 03, 2007-11-19 PTFA091201E PTFA091201F Confidential, Limited Internal Distribution Typical Performance (data taken in a production test fixture) CW Sweep in a Broadband Test Fixture Intermodulation Distortion vs. Output Power VDD = 28 V, IDQ = 750 mA, POUT = 50.79 dBm (as measured in a broadband circuit) VDD = 28 V, IDQ = 750 mA, ƒ1 = 959 MHz, ƒ2 = 960 MHz Gain (dB) 60 Gain 19 50 18 -15 40 -25 30 17 Return Loss 16 900 910 920 930 940 950 960 970 -35 20 980 -20 -30 IMD (dBc) Efficiency 20 -10 Efficiency (%) 70 Return Loss (dB) 21 3rd Order -40 -50 5th -60 7th -70 37 39 41 45 47 49 Output Power, Avg. (dBm) Frequency (MHz) Power Sweep IM3 vs. Output Power at Selected Biases VDD = 28 V, ƒ = 960 MHz VDD = 28 V, ƒ1 = 959, ƒ 2 = 960 MHz, series show IDQ 20.5 -20 IDQ = 1125 mA 20.0 Power Gain (dB) -25 -30 IMD (dBc) 43 525 mA -35 750 mA -40 -45 -50 19.0 18.5 IDQ = 750 mA IDQ = 375 mA 18.0 940 mA -55 19.5 17.5 -60 37 39 41 43 45 47 40 49 42 44 46 48 50 52 Output Power (dBm) Output Power, Avg. (dBm) *See Infineon distributor for future availability. Data Sheet 3 of 10 Rev. 03, 2007-11-19 PTFA091201E PTFA091201F Confidential, Limited Internal Distribution EDGE EVM Performance Gain & Efficiency vs. Output Power VDD = 28 V, IDQ = 750 mA, ƒ = 959.8 MHz VDD = 28 V, IDQ = 750 mA, ƒ = 960 MHz 80 7 70 6 60 5 50 Efficiency 4 40 30 3 EVM 2 20 70 20 60 19 Gain 18 50 17 40 16 30 20 15 10 1 Efficiency 36 38 40 42 44 46 48 10 14 0 0 40 50 Output Power, Avg. (dBm) 52 Output Power (P–1 dB) vs. Supply Voltage IDQ = 750 mA, ƒ = 960 MHz 52.5 18 60 Gain Output Power 16 55 50 910 920 930 940 950 52.0 Output Power (dBm) 65 Efficiency (%), POUT (dBm) 70 Efficiency Gain (dB) 49 VDD = 28 V, IDQ = 750 mA 19 51.5 51.0 50.5 50.0 49.5 45 960 24 26 28 30 32 Supply Voltage (V) Frequency (MHz) Data Sheet 46 Output Power (dBm) 20 15 900 43 Frequency Sweep at P–1dB 17 Drain Efficiency (%) 90 8 Gain (dB) 9 Drain Efficiency (%) EVM RMS (average %) . Typical Performance (cont.) 4 of 10 Rev. 03, 2007-11-19 PTFA091201E PTFA091201F Confidential, Limited Internal Distribution Typical Performance (cont.) IS-95 CDMA Performance Bias Voltage vs. Temperature VDD = 28 V, IDQ = 750 mA, ƒ = 960 MHz Voltage normalized to typical gate voltage, series show current TCASE = 25°C TCASE = 90°C Efficiency Drain Efficiency (%) 35 -20 30 -30 25 -40 20 -50 Adj 750 kHz -60 15 10 -70 Alt1 1.98 MHz Normalized Bias Voltage (V) -10 Adjacent Channel Power Ratio (dBc) 40 -80 5 32 34 36 38 40 42 44 1.03 0.4 A 1.02 1.2 A 1.01 3.0 A 6.0 A 1.00 9.0 A 0.99 0.98 0.97 0.96 -20 46 0 Output Power, Avg. (dBm) 20 40 60 80 100 Case Temperature (°C) Broadband Circuit Impedance Z Source Ω Frequency D Z Source Z Load G MHz R jX R jX 920 5.86 –0.32 2.20 0.69 930 5.84 –0.27 2.17 0.69 940 5.85 –0.02 2.16 0.85 950 5.82 0.10 2.15 0.92 960 5.79 0.27 2.13 1.02 Z0 = 50 Ω 0 .1 Z Load Data Sheet 0.5 0.4 960 MHz 0.3 0.1 0 .0 920 MHz 0.2 Z Source 960 MHz ARD LOA D HS T OW - W AV E LE NGT H S T OW A RD G S Z Load Ω 920 MHz 5 of 10 Rev. 03, 2007-11-19 PTFA091201E PTFA091201F Confidential, Limited Internal Distribution Reference Circuit C1 0.001µF R2 1.3K V R1 1.2K V QQ1 LM7805 VDD Q1 BCP56 C2 0.001µF R3 2KV C3 0.001µF R4 2KV R5 5.1K V C4 10µF 35V R6 10 V C5 0.1µF L1 V DD R7 5.1K V C6 33pF C7 0.1µF C8 0.01µF C9 33pF C14 33pF C15 1µF C16 10µF 50V l5 C17 0.1µF C18 10µF 50V l6 C10 33pF RF_IN l1 C24 1.0pF R8 10 V C27 33pF DUT l2 l3 l4 C11 1.2pF C12 7.5pF C13 0.7pF l8 l7 l9 l 10 C25 1.0pF C26 2.4pF l11 l 12 l13 RF_OUT C28 0.5pF C19 33pF C20 1µF C21 10µF 50V a09 1201ef_sch L2 C22 0.1µF C23 10µF 50V Reference circuit schematic for ƒ = 960 MHz Circuit Assembly Information DUT PTFA091201E or PTFA091201F PCB 0.76 mm [.030"] thick, εr = 4.5 Microstrip l1 l2 l3 l4 l5 l6, l7 l8 l9 l10 l11 l12 l13 Electrical Characteristics at 960 MHz1 0.072 0.115 0.029 0.062 0.149 0.122 0.027 0.103 0.072 0.155 0.013 0.015 LDMOS Transistor Rogers TMM4 2 oz. copper Dimensions: L x W ( mm) Dimensions: L x W (in.) λ, 50.0 Ω λ, 50.0 Ω λ, 50.0 Ω λ, 7.5 Ω λ, 70.0 Ω λ, 55.0 Ω λ, 7.9 Ω λ, 7.9 Ω λ, 7.9 Ω λ, 38.0 Ω λ, 50.0 Ω λ, 50.0 Ω 12.27 x 1.40 19.53 x 1.40 5.08 x 1.40 9.53 x 16.15 26.31 x 0.71 20.96 x 1.17 4.06 x 15.24 15.75 x 15.24 11.02 x 15.24 25.78 x 2.13 2.24 x 1.40 2.59 x 1.40 0.483 0.769 0.200 0.375 1.036 0.825 0.160 0.620 0.434 1.015 0.088 0.102 x x x x x x x x x x x x 0.055 0.055 0.055 0.636 0.028 0.046 0.600 0.600 0.600 0.084 0.055 0.055 1Electrical characteristics are rounded. Data Sheet 6 of 10 Rev. 03, 2007-11-19 PTFA091201E PTFA091201F Confidential, Limited Internal Distribution Reference Circuit (cont.) R5 C4 C5 C9 C8 R4 C3 R3 C6 R1 R6 R7 C7 C1 LM R2 C18 VDD QQ1 C2 C14 C15 Q1 C16 C17 R8 C24 RF_IN C10 C11 VDD L1 C28 RF_OUT C12 C25 C27 C26 C13 C22 C21 C19 C20 VDD L2 C23 A091201in_01 A091201out_01 a 0 9 1 2 0 1 e f_ a s s y Reference circuit assembly diagram (not to scale)* Component Description Suggested Manufacturer P/N or Comment C1, C2, C3 C4 C5, C7 C17, C22 C6, C9, C10, C14, C19, C27 C8 C11 C12 C13 C15, C20 C16, C18, C21, C23 C24, C25 C26 C28 L1, L2 Q1 QQ1 R1 R2 R3 R4 R5, R7 R6, R8 Capacitor, 0.001 µF Tantalum capacitor, 10 µF, 35 V Capacitor, 0.1 µF Ceramic capacitor, 33 pF Digi-Key Digi-Key Digi-Key ATC PCC1772CT-ND 399-1655-2-ND PCC104BCT-ND 100B 330 Capacitor, 0.01 µF Ceramic capacitor, 1.2 pF Ceramic capacitor, 7.5 pF Ceramic capacitor, 0.7 pF Capacitor, 1.0 µF Tantalum capacitor, 10 µF, 50 V Ceramic capacitor, 1.0 pF Ceramic capacitor, 2.4 pF Ceramic capacitor, 0.5 pF Ferrite, 8.9 mm Transistor Voltage regulator Chip Resistor 1.2 k-ohms Chip Resistor 1.3 k-ohms Chip Resistor 2 k-ohms Potentiometer 2 k-ohms Chip Resistor 5.1 k-ohms Chip Resistor 10 ohms ATC ATC ATC ATC ATC Garrett Electronics ATC ATC ATC Elna Magnetics Infineon Technologies National Semiconductor Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key 200B 103 100B 1R2 100B 7R5 100B 0R7 920C105 TPSE106K050R0400 100B 1R0 100B 2R4 100B 0R5 BDS 4.6/3/8.9-4S2 BCP56 LM7805 P1.2KGCT-ND P1.3KGCT-ND P2KECT-ND 3224W-202ETR-ND P5.1KECT-ND P10ECT-ND *Gerber Files for this circuit available on request Data Sheet 7 of 10 Rev. 03, 2007-11-19 PTFA091201E PTFA091201F Confidential, Limited Internal Distribution Package Outline Specifications Package H-36248-2 (45° X 2.72 [.107]) CL 4.83±0.51 [.190±.020] D FLANGE 9.78 [.385] LID 9.40 +0.10 19.43 ±0.51 [.765±.020] –0.15 [.370 +.004 –.006 ] S C L 2X R1.63 [R.064] G 4X R1.52 [R.060] 2X 12.70 [.500] 27.94 [1.100] 19.81±0.20 [.780±.008] 1.02 [.040] C L SPH 1.57 [.062] 3.61±0.38 [.142±.015] 0.0381 [.0015] -A34.04 [1.340] 0 7 1 1 1 7 _ h -3 6 2 4 8 -2 _ p o Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 8 of 10 Rev. 03, 2007-11-19 PTFA091201E PTFA091201F Confidential, Limited Internal Distribution Package Outline Specifications (cont.) Package H-37248-2 ( 45° X 2.72 [.107]) CL 4.83±0.51 [.190±.020] D +0.10 LID 9.40 –0.15 [.370 +.004 –.006] FLANGE 9.78 [.385] C L 19.43±0.51 [.765±.020] G 4X R0.508+0.381 –0.127 [R.020+.015 –.005] 2X 12.70 [.500] 19.81±0.20 [.780±.008] C L SPH 1.57 [.062] 1.02 [.040] 0.0381 [.0015] -A- S 0 7 1 1 1 7 _ h -3 7 2 4 8 -2 _ p o 3.61±0.38 [.142±.015] 20.57 [.810] Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 9 of 10 Rev. 03, 2007-11-19 PTFA091201E/F Confidential, Limited Internal Distribution Revision History: 2007-11-19 Previous Version: 2005-12-12, Data Sheet Data Sheet Page 1, 10 Subjects (major changes since last revision) Update company information. 1, 3, 9, 10 Update to product V4, with new package technologies. Update package outline diagrams. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International GOLDMOS® is a registered trademark of Infineon Technologies AG. Edition 2007-11-19 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2005. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 10 of 10 Rev. 03, 2007-11-19