IRF IRFE310

PD - 91782
IRFE310
REPETITIVE AVALANCHE AND dv/dt RATED
JANTX2N6786U
®
HEXFET TRANSISTOR
JANTXV2N6786U
[REF:MIL-PRF-19500/556]
N-CHANNEL
Ω , HEXFET
400Volt, 3.6Ω
Product Summary
The leadless chip carrier (LCC) package represents
the logical next step in the continual evolution of
surface mount technology. The LCC provides
designers the extra flexibility they need to increase
circuit board density. International Rectifier has
engineered the LCC package to meet the specific
needs of the power market by increasing the size of
the bottom source pad, thereby enhancing the thermal
and electrical performance. The lid of the package
is grounded to the source to reduce RF interference.
HEXFET transistors also feature all of the well-established advantages of MOSFETs, such as voltage control, very fast switching, ease of paralleling
and electrical parameter temperature stability. They
are well-suited for applications such as switching
power supplies, motor controls, inverters, choppers,
audio amplifiers and high-energy pulse circuits,
and virtually any application where high reliability
is required.
Part Number
IRFE310
BVDSS
400V
RDS(on)
3.6Ω
ID
1.25A
Features:
n
n
n
n
n
n
Hermetically Sealed
Simple Drive Requirements
Ease of Paralleling
Small footprint
Surface Mount
Lightweight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25°C
ID @ VGS = 10V, TC = 100°C
IDM
PD @ TC = 25°C
VGS
EAS
dv/dt
TJ
T STG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current 
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ‚
Peak Diode Recovery dv/dt ƒ
Operating Junction
Storage Temperature Range
Surface Temperature
Weight
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IRFE310, JANTX-, JANTXV-, 2N6786U Units
1.25
A
0.80
5.5
15
W
0.12
W/°C
±20
V
34
mJ
2.8
V/ns
-55 to 150
o
C
300 ( for 5 seconds)
0.42 (typical)
g
1
10/9/98
IRFE310, JANTX-, JANTXV-, 2N6786U Devices
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Min
Typ Max Units
Test Conditions
400
—
—
V
VGS = 0V, ID = 1.0mA
—
0.37
—
V/°C
Reference to 25°C, ID = 1.0mA
—
—
2.0
0.87
—
—
—
—
—
—
—
—
3.6
3.7
4.0
—
25
250
V
S( )
Ω
Parameter
BVDSS
Drain-to-Source Breakdown Voltage
∆BV DSS/∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
µA
IGSS
IGSS
Qg
Q gs
Q gd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
5.0
100
-100
8.4
1.6
5.0
15
20
35
30
—
LS
Internal Source Inductance
—
15
—
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
190
65
24
—
—
—
nA
nC
ns
nH
VGS = 10V, ID = 0.8A „
VGS = 10V, ID = 1.25A
VDS = VGS, ID = 250µA
VDS > 15V, IDS = 0.8A „
VDS= 0.8 x Max Rating,VGS=0V
VDS = 0.8 x Max Rating
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS = 10V, ID = 1.25A
VDS = Max Rating x 0.5
VDD = 15V, ID = 1.25A,
RG = 7.5Ω
Measured from drain
Modified MOSFET symlead, 6mm (0.25 in)
bol showing the internal
from package to center inductances.
of die.
Measured from source
lead, 6mm (0.25 in)
from package to
source bonding pad.
pF
VGS = 0V, VDS = 25V
f = 1.0MHz
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
IS
ISM
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) 
—
—
—
—
1.25
5.5
A
VSD
t rr
Q RR
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
1.4
540
4.5
V
ns
µC
ton
Forward Turn-On Time
Test Conditions
Modified MOSFET symbol
showing the integral reverse
p-n junction rectifier.
Tj = 25°C, IS = 1.25A, VGS = 0V „
Tj = 25°C, IF = 1.25A, di/dt ≤ 100A/µs
VDD ≤ 50V „
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC
RthJ-PCB
2
Junction-to-Case
Junction-to-PC board
Min Typ Max Units
—
—
—
—
8.3
27
°C/W
Test Conditions
soldered to a copper-clad PC board
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IRFE310, JANTX-, JANTXV-, 2N6786U Devices
10
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
4.5V
0.1
20µs PULSE WIDTH
TJ = 25 °C
0.01
0.1
1
10
100
1
4.5V
0.1
0.01
0.1
VDS , Drain-to-Source Voltage (V)
3.0
TJ = 25 ° C
V DS = 50V
20µs PULSE WIDTH
6.0
7.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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8.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 150 ° C
5.0
10
100
Fig 2. Typical Output Characteristics
10
0.1
4.0
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1
20µs PULSE WIDTH
TJ = 150 °C
ID = 1.2A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature( ° C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFE310, JANTX-, JANTXV-, 2N6786U Devices
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
400
Ciss
300
Coss
200
Crss
100
20
VGS , Gate-to-Source Voltage (V)
500
0
1
10
ID = 1.25 A
VDS = 320V
VDS = 200V
VDS = 80V
15
10
5
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
2
VDS , Drain-to-Source Voltage (V)
4
6
8
10
12
QG , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
10
100
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
TJ = 150 ° C
1
4
V GS = 0 V
0.6
0.8
1.0
10us
100us
1
1ms
10ms
0.1
TJ = 25 ° C
0.1
0.4
10
1.2
0.01
1.4
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
100
1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRFE310, JANTX-, JANTXV-, 2N6786U Devices
1.25
RD
V DS
VGS
1.00
D.U.T.
I D , Drain Current (A)
RG
+
-V DD
0.75
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
0.50
Fig 10a. Switching Time Test Circuit
0.25
VDS
90%
0.00
25
50
75
100
125
150
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
0.20
1
0.10
P DM
0.05
t1
0.02
0.01
0.1
0.00001
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFE310, JANTX-, JANTXV-, 2N6786U Devices
15V
L
VDS
D .U .T
RG
IA S
10V
20V
D R IV E R
+
V
- DD
0 .01 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
A
EAS , Single Pulse Avalanche Energy (mJ)
75
ID
0.56A
0.79A
BOTTOM 1.25A
TOP
60
45
30
15
0
25
50
75
100
125
150
Starting TJ , Junction Temperature( ° C)
V (B R )D S S
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
10V
12V
.2µF
.3µF
10 V
QGS
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
D.U.T.
QGD
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFE310, JANTX-, JANTXV-, 2N6786U Devices
Notes:
 Repetitive Rating; Pulse width limited by
maximum junction temperature.
Refer to current HEXFET reliability report.
‚ @ VDD = 50 V, Starting TJ = 25°C,
EAS = [0.5 * L * (IL2) ]
Peak IL =1.25A, VGS =10 V, 25 ≤ RG ≤ 200Ω
ƒ ISD ≤ 1.25A, di/dt ≤ 180 A/µs,
VDD ≤ BVDSS, TJ ≤ 150°C, Suggested RG = 50Ω
„ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Case Outline and Dimensions — Leadless Chip Carrier (LCC) Package
IR Case Style Leadless Chip Carrier (LCC)
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
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http://www.irf.com/
Data and specifications subject to change without notice.
10/98
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7