HV5308 / HV5408
32-Channel, Serial-to-Parallel Converter
with High-Voltage Push-Pull Outputs
Features
Description
•
•
•
•
•
•
•
•
HV5308 and HV5408 are low-voltage serial to highvoltage parallel converters with push-pull outputs.
These devices have been designed for use as a driver
for AC-electroluminescent displays. HV5308 / HV5408
can also be used in any application requiring multiple
output high-voltage, current sourcing, and sinking
capabilities such as driving plasma panels, vacuum fluorescent, or large matrix LCD displays.
Processed with High-Voltage CMOS technology
Low power-level shifting
Source/sink current minimum 20mA
Shift register speed 8.0 MHz
Latched data outputs
CMOS compatible inputs
Forward and reverse shifting options
Diode to VPP allows efficient power recovery
These devices consist of a 32-bit shift register,
32 latches, and control logic to enable outputs. Data is
shifted through the shift register on the low-to-high transition of the clock. HV5308 shifts in the clockwise
direction, when viewed from the top of the package,
and HV5408 shifts in the counter-clockwise direction.
A data output buffer is provided for cascading devices.
This output reflects the current status of the last bit of
the shift register (32). Operation of the shift register is
not affected by the LE (latch enable) or the OE (output
enable) inputs. Transfer of data from the shift register
to the latch occurs when the LE input is high. The data
in the latch is retained when LE is low.
2015 Microchip Technology Inc.
DS20005425A-page 1
HV5308 / HV5408
Package Type
6
40
1 44
44
1
44-Lead PQFP
44-Lead PLCC
See Table 2-1 for pin information
Functional Block Diagram
VPP
OE
LE
DATA
INPUT
HVOUT1
CLK
HVOUT2
•
32 bit
Shift
Register
•
32 bit
Latches
•
28 Additional
Outputs
•
•
•
HVOUT31
DATA
OUT
DS20005425A-page 2
HVOUT32
2015 Microchip Technology Inc.
HV5308 / HV5408
Typical Application Circuit
VPP
VDD
DATA
INPUT
CLK
Micro
Processor
HVOUT1
Low Voltage
High Voltage
Shift Register
Latches
Output Contr.
Level
Translators
&
Push-Pull
Output
Buffers
LE
OE
DATA
OUT
Columns
Row
Driver
HVOUT32
Display
Panel
Data Input for cascading
2015 Microchip Technology Inc.
DS20005425A-page 3
HV5308 / HV5408
1.0
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS†
Supply voltage, VDD .................................................................................................................................. -0.5V to +16V
Supply voltage, VPP................................................................................................................................... -0.5V to +90V
Logic input levels................................................................................................................................ -0.5V to VDD+0.5V
Ground current1 ....................................................................................................................................................... 1.5A
Continuous total power dissipation2 .................................................................................................................. 1200mW
Operating temperature range .................................................................................................................. -40°C to +85°C
Storage temperature range ................................................................................................................... -65°C to +150°C
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
1:
2:
Duty cycle is limited by the total power dissipated in the package.
For operation above 25°C ambient derate linearly to maximum operating temperature at 20mW/°C.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: VPP = 60V, VDD = 12V, TA = 25°C
Parameter
DC Characteristics
VPP supply current
IDD supply current (quiescent)
IDD supply current (operating)
High level logic input current
Low level logic input current
High level output voltage
HVOUT
Symbol
Min
Max
IPP
IDDQ
IDD
IIH
IIL
-
0.5
100
15
1.0
-1.0
mA
µA
mA
µA
µA
52
-
V
10.5
-
V
-
8.0
V
VOC
-
1.0
-1.5
V
V
fCLK
tWL or tWH
tSU
tH
tDLH (Data)
tDHL (Data)
tDLE
tWLE
62
25
10
50
50
8.0
110
110
-
MHz
ns
ns
ns
ns
ns
ns
ns
tSLE
tON
tOFF
50
-
500
500
ns
ns
ns
VOH
Data out
Low level output voltage
HVOUT
Data out
HV output clamp diode voltage
AC Characteristics
Clock frequency
Clock width, High or Low
Setup time before CLK rises
Hold time after CLK rises
Data output delay after L to H CLK
Data output delay after H to L CLK
LE delay after L to H CLK
Width of LE pulse
LE setup time before L to H CLK
Delay from LE to HVOUT, L to H
Delay from LE to HVOUT, H to L
VOL
Units Conditions
HVOUTPUTS high to low
All inputs = VDD or GND
VDD= VDD max, fCLK= 8.0MHz
VIN= VDD
VIN= 0
IOH= -20mA, -40 to 85°C
IOH= -15mA, -55 to 125°C
IO= -100µA
IOL= 20mA, -40 to 85°C
IOL= 15mA, -55 to 125°C
IO= 100µA
IOL= -100mA
--------CL= 15pF, (Note 1)
CL= 15pF, (Note 1)
(Note 1)
--(Note 1)
(Note 1)
(Note 1)
Note 1: L to H = Low to High; H to L = High to Low.
DS20005425A-page 4
2015 Microchip Technology Inc.
HV5308 / HV5408
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, for all specifications TA =TJ = +25°C
Parameter
Symbol
Min
Typ
Max
Units Conditions
Operating Temperature
-40
–
85
°C
Storage Temperature
-65
–
150
°C
Temperature Ranges
Package Thermal Resistances
Thermal Resistance, 44-Lead PQFP
θja
–
51
–
°C/W
Thermal Resistance, 44-Lead PLCC
θja
–
37
–
°C/W
2015 Microchip Technology Inc.
DS20005425A-page 5
HV5308 / HV5408
2.0
PIN DESCRIPTION
The locations of the pins are listed in Package Type.
TABLE 2-1:
Pin #
PIN DESCRIPTION PQFP
HV5308
HV5408
1
HVOUT22
HVOUT11
2
HVOUT21
HVOUT12
3
HVOUT20
HVOUT13
4
HVOUT19
HVOUT14
5
HVOUT18
HVOUT15
6
HVOUT17
HVOUT16
7
HVOUT16
HVOUT17
8
HVOUT15
HVOUT18
Description
9
HVOUT14
HVOUT19
10
HVOUT13
HVOUT20
11
HVOUT12
HVOUT21
12
HVOUT11
HVOUT22
13
HVOUT10
HVOUT23
14
HVOUT9
HVOUT24
15
HVOUT8
HVOUT25
16
HVOUT7
HVOUT26
17
HVOUT6
HVOUT27
18
HVOUT5
HVOUT28
19
HVOUT4
HVOUT29
20
HVOUT3
HVOUT30
21
HVOUT2
HVOUT31
22
HVOUT1
HVOUT32
23
DATA OUT
DATA OUT
N/C
N/C
No connect.
27
CLK
CLK
Data shift register clock
Input are shifted into the shift register on the positive edge of the
clock.
28
GND
GND
Logic and high voltage ground
29
VPP
VPP
High voltage power rail.
30
VDD
VDD
Low voltage logic power rail.
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling
low voltage data, can drive loads either to GND, or to VPP rail levels.
Serial data output.
Data output for cascading to the data input of the next device.
24
25
26
31
LE
LE
32
DATA IN
DATA IN
Latch enable input.
When LE is High, shift register data is transferred into a data
latch. When LE is Low, data is latched, and new data can be
clocked into the shift register.
Serial data input.
Data needs to be present before each rising edge of the clock.
33
OE
OE
Output enable input.
When OE is Low, all HV outputs are forced into a Low state,
regardless of data in each channel. When OE is High, all HV outputs reflect data latched.
34
N/C
N/C
No connect.
DS20005425A-page 6
2015 Microchip Technology Inc.
HV5308 / HV5408
TABLE 2-1:
PIN DESCRIPTION PQFP (CONTINUED)
Pin #
HV5308
HV5408
35
HVOUT32
HVOUT1
36
HVOUT31
HVOUT2
37
HVOUT30
HVOUT3
38
HVOUT29
HVOUT4
39
HVOUT28
HVOUT5
40
HVOUT27
HVOUT6
41
HVOUT26
HVOUT7
42
HVOUT25
HVOUT8
43
HVOUT24
HVOUT9
44
HVOUT23
HVOUT10
TABLE 2-2:
Pin #
Description
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling
low voltage data, can drive loads either to GND, or to VPP rail levels.
PIN DESCRIPTION PLCC
HV5308
HV5408
1
HVOUT17
HVOUT16
2
HVOUT16
HVOUT17
3
HVOUT15
HVOUT18
4
HVOUT14
HVOUT19
5
HVOUT13
HVOUT20
6
HVOUT12
HVOUT21
7
HVOUT11
HVOUT22
8
HVOUT10
HVOUT23
Description
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling
low voltage data, can drive loads either to GND, or to VPP rail levels.
9
HVOUT9
HVOUT24
10
HVOUT8
HVOUT25
11
HVOUT7
HVOUT26
12
HVOUT6
HVOUT27
13
HVOUT5
HVOUT28
14
HVOUT4
HVOUT29
15
HVOUT3
HVOUT30
16
HVOUT2
HVOUT31
17
HVOUT1
HVOUT32
18
DATA OUT
DATA OUT
N/C
N/C
No connect.
22
CLK
CLK
Data shift register clock
Input are shifted into the shift register on the positive edge of the
clock.
23
GND
GND
Logic and high voltage ground
Serial data output.
Data output for cascading to the data input of the next device.
19
20
21
24
VPP
VPP
High voltage power rail.
25
VDD
VDD
Low voltage logic power rail.
26
LE
2015 Microchip Technology Inc.
LE
Latch enable input.
When LE is High, shift register data is transferred into a data
latch. When LE is Low, data is latched, and new data can be
clocked into the shift register.
DS20005425A-page 7
HV5308 / HV5408
TABLE 2-2:
PIN DESCRIPTION PLCC (CONTINUED)
Pin #
HV5308
HV5408
27
DATA IN
DATA IN
Description
Serial data input.
Data needs to be present before each rising edge of the clock.
28
OE
OE
Output enable input.
When OE is Low, all HV outputs are forced into a LOW state,
regardless of data in each channel. When OE is High, all HV outputs reflect data latched.
29
N/C
N/C
No connect.
30
HVOUT32
HVOUT1
31
HVOUT31
HVOUT2
32
HVOUT30
HVOUT3
33
HVOUT29
HVOUT4
34
HVOUT28
HVOUT5
35
HVOUT27
HVOUT6
36
HVOUT26
HVOUT7
37
HVOUT25
HVOUT8
38
HVOUT24
HVOUT9
39
HVOUT23
HVOUT10
40
HVOUT22
HVOUT11
41
HVOUT21
HVOUT12
42
HVOUT20
HVOUT13
43
HVOUT19
HVOUT14
44
HVOUT18
HVOUT15
DS20005425A-page 8
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling
low voltage data, can drive loads either to GND, or to VPP rail levels.
2015 Microchip Technology Inc.
HV5308 / HV5408
3.0
FUNCTIONAL DESCRIPTION
Table 3-1 provides
HV5308 / HV5408.
TABLE 3-1:
functional
information
To power-up HV5308 / HV5408, perform the following
power-up sequence:
FUNCTIONAL TABLE CLK
CLK
DATA OUT
H
↑
H
↑
L
L
Note:
1.
2.
3.
No ↑
No change
H = High level, L = Low level, ↑ = Low-toHigh transition
TABLE 3-2:
FUNCTIONAL TABLE LE, OE
DATA IN
LE
X
X
L
All HVOUT= Low
X
L
H
Previous latched data
H
H
H
H
L
Note:
Power-Up and Recommended
Operating Conditions
about
DATA IN
X
3.1
OE
4.
5.
Connect ground
Apply VDD
Set all inputs (Data, CLK, LE, etc.) to a known
state
Apply VPP
The VPP should not fall below VDD or float during
operation.
To power-down the device, reverse the steps above.
HVOUT
H
H
L
H = High level, L = Low level, X= Don’t Care
TABLE 3-3:
RECOMMENDED OPERATING CONDITIONS (-40°C to 85°C)
Symbol
Min
Max
Units
VDD
Logic voltage supply
Parameter
10.8
13.2
V
VPP
High voltage supply
8.0
80
V
VIH
Input high voltage
VDD- 2.0
VDD
V
VIL
Input low voltage
0
2.0
V
fCLK
Clock frequency
0
8.0
MHz
VDD
VPP
VDD
DATA
INPUT
DATA OUT
GND
GND
Logic Inputs
FIGURE 3-1:
HVOUT
GND
Logic Data Output
High Voltage Outputs
Input and Output Equivalent Circuits
2015 Microchip Technology Inc.
DS20005425A-page 9
HV5308 / HV5408
VIH
DATA
IN
50%
50%
Data Valid
VIL
tSU
tH
VIH
CLK
50%
50%
50%
50%
VIL
tWL
tWH
VOH
50%
VOL
tDLH
DATA
OUT
VOH
50%
VOL
tDHL
VIH
50%
50%
VIL
LE
tWLE
tDLE
tSLE
90%
10%
HVOUT
w/ S/R LOW
VOH
VOL
tOFF
HVOUT
w/ S/R HIGH
10%
tON
FIGURE 3-2:
DS20005425A-page 10
90%
VOH
VOL
Switching Waveforms
2015 Microchip Technology Inc.
HV5308 / HV5408
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
44-lead PQFP
XXXXXXXXXX
XXXXXXXXXX
XXXXXXXX e3
YYWWNNN
44-lead PLCC
XXXXXXXXXXX
XXXXXXXXXXX
XXXXXXXXX e3
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example
HV5308PG-B
e3 1530343
Example
HV5308PJ-B
e3 1530343
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2015 Microchip Technology Inc.
DS20005425A-page 11
HV5308 / HV5408
44-Lead PQFP Package Outline (PG)
10.00x10.00mm body, 2.35mm height (max), 0.80mm pitch
D
D1
E
E1
Note 1
(Index Area
D1/4 x E1/4)
44
1
b
e
Top View
View B
A
L2
A2
Gauge
Plane
Seating
Plane
L
A1
θ
L1
Side View
Seating
Plane
View B
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURU
a printed indicator.
Symbol
MIN
Dimension
NOM
(mm)
MAX
A
A1
A2
b
D
D1
E
E1
1.95*
0.00
1.95
0.30
13.65*
9.80*
13.65*
9.80*
-
-
2.00
-
13.90
10.00
13.90
10.00
2.35
0.25
2.10
0.45
14.15*
10.20* 14.15* 10.20*
e
L
L1
L2
0.80
BSC
0.88
1.03
ș
0O
0.73
1.95
REF
0.25
BSC
3.5O
7O
JEDEC Registration MO-112, Variation AA-2, Issue B, Sep.1995.
7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ
Drawings not to scale.
S
D
# DSPD 44PQFPPG V i C041309
DS20005425A-page 12
2015 Microchip Technology Inc.
HV5308 / HV5408
44-Lead PLCC Package Outline (PJ)
.653x.653in body, .180in height (max), .050in pitch
D
D1
1 44
.048/.042 x 45O
6
.150 MAX
.056/.042 x 45O
40
Note 1
(Index Area)
.075 MAX
E1
E
Note 2
.020max
(3 Places)
Top View
Vertical Side View
View B
b1
A
Base
Plane
A2
.020 MIN
Seating
Plane
e
A1
b
Horizontal Side View
R
View B
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Notes:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURU
a printed indicator.
2. $FWXDOVKDSHRIWKLVIHDWXUHPD\YDU\
Symbol
MIN
Dimension
(inches)
A
A1
A2
b
b1
D
D1
E
E1
.165
.090
.062
.013
.026
.685
.650
.685
.650
NOM
.172
.105
-
-
-
.690
.653
.690
.653
MAX
.180
.120
.083
.021
.036†
.695
.656
.695
.656
e
R
.025
.050
BSC
.035
.045
JEDEC Registration MS-018, Variation AC, Issue A, June, 1993.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
2015 Microchip Technology Inc.
DS20005425A-page 13
HV5308 / HV5408
APPENDIX A:
REVISION HISTORY
Revision A (December 2015)
• Updated file to Microchip format
DS20005425A-page 14
2015 Microchip Technology Inc.
HV5308 / HV5408
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
-
PART NO.
XX
Device
Package
Options
Device:
X
Version
-
X
-
Environmental
X
Media
Type
HV5308 = 32-Channel Serial to Parallel Converter, with
High-voltage Push-pull Outputs
data shifts in clockwise direction
HV5408 = 32-Channel Serial to Parallel Converter, with
High-voltage Push-pull Outputs
data shifts in counter-clockwise direction
Package:
PG
PJ
= 44-Lead PQFP
= 44-Lead PLCC
Version
B
= Revision B
Environmental
G
= Lead (Pb)-free/ROHS-compliant package
Media Type:
(blank)
=
=
=
=
M903
M919
2015 Microchip Technology Inc.
Examples:
a)
HV5308PG-B-G
b)
HV5308PG-B-G-M919
c)
HV5308PJ-B-G
d)
HV5308PJ-B-G-M903
e)
HV5408PG-B-G
f)
HV5408PJ-B-G
Clockwise data shift,
44-Lead PQFP package, 96/Tray
Clockwise data shift,
44-Lead PQFP package, 500/Reel
Clockwise data shift,
44-Lead PLCC package, 27/Tube
Clockwise data shift,
44-Lead PLCC package,
500/Reel
Counter-clockwise
data shift, 44-Lead
PQFP package,
96/Tray
Counter-clockwise
data shift, 44-Lead
PLCC package,
27/Tube
96/Tray for PG package
27/Tube for PJ package
500/Reel for PG package
500/Reel for PJ package
DS20005425A-page 15
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,
LANCheck, MediaLB, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC,
SST, SST Logo, SuperFlash and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo,
MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0073-8
QUALITYMANAGEMENTSYSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
DS20005425A-page 16
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
2015 Microchip Technology Inc.
Worldwide Sales and Service
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EUROPE
Corporate Office
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Tel: 480-792-7200
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Technical Support:
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Fax: 66-2-694-1350
07/14/15
DS20005425A-page 17
2015 Microchip Technology Inc.