INTEGRATED CIRCUITS DATA SHEET TDA8350Q DC-coupled vertical deflection and East-West output circuit Preliminary specification Supersedes data of September 1991 File under Integrated Circuits, IC02 Philips Semiconductors January 1995 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q FEATURES GENERAL DESCRIPTION • Few external components The TDA8350Q is a power circuit for use in 90° and 110° colour deflection systems for field frequencies of 50 to 120 Hz. The circuit provides a DC driven vertical deflection output circuit, operating as a highly efficient class G system and an East-West driver for sinking the diode modulator current. • Highly efficient fully DC-coupled vertical output bridge circuit • Vertical flyback switch • Guard circuit • Protection against: – short-circuit of the output pins – short-circuit of the output pins to VP • High EMC immunity due to common mode inputs • Temperature (thermal) protection • East-West output stage with one single conversion resistor. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT DC supply VP supply voltage 9 − 25 V IP quiescent current − 30 − mA IO(p-p) output current (peak-to-peak value) − − 3 A Idiff(p-p) differential input current (peak-to-peak value) − 600 − µA Vdiff(p-p) differential input voltage (peak-to-peak value) − 1.5 1.8 V Vertical circuit Flyback switch IM peak output current − − ±1.5 A VFB flyback supply voltage − − 50 V − − 60 V − − 500 mA − − 40 V − − 1 µA note 1 East-West amplifier IO(sink) output current (sink only) VO(sink) peak output voltage Ibias input bias current IO(sink) = 10 µA Thermal data (in accordance with IEC 747-1) Tstg storage temperature −65 − 150 °C Tamb operating ambient temperature −25 − +75 °C Tvj virtual junction temperature − − 150 °C Note 1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor (dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of 33 Ω (see application circuit Fig.5). January 1995 2 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q ORDERING INFORMATION PACKAGE TYPE NUMBER TDA8350Q NAME DESCRIPTION VERSION DBS13P plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) SOT141-6 BLOCK DIAGRAM VP handbook, full pagewidth VO(guard) 4 VFB 10 8 VP CURRENT SOURCE TDA8350 VP 9 VO(A) I drive(pos) I drive(neg) IS 1 IT 3 2 VP IS 5 VO(B) I I(corr) VO(B) I I(set) 13 11 12 7 MBC229-1 GND Fig.1 Block diagram. January 1995 V I(fb) IT V I I(set) VO(A) 3 VO(sink) Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q PINNING FUNCTIONAL DESCRIPTION SYMBOL PIN Idrive(pos) 1 input power-stage (positive); includes II(sb) signal bias Idrive(neg) 2 input power-stage (negative); includes II(sb) signal bias VI(fb) 3 feedback voltage input VP 4 supply voltage VO(B) 5 output voltage B n.c. 6 not connected GND 7 ground VFB 8 flyback supply voltage VO(A) 9 output voltage A VO(guard) 10 guard output voltage VO(sink) 11 East-West amplifier driver (sink) output voltage II(corr) 12 East-West amplifier input correction current (negative) II(set) 13 East-West amplifier set input current (positive) dbook, halfpage The vertical driver circuit is a bridge configuration. The deflection coil is connected between the output amplifiers, which are driven in phase opposition. An external resistor (RM) connected in series with the deflection coil provides internal feed back information. The differential input circuit is voltage driven. The input circuit has been adapted to enable it to be used with the TDA9150, TDA9151B, TDA9160A, TDA9162, TDA8366 and TDA8367 which deliver symmetrical current signals. An external resistor (RCON) connected between the differential input determines the output current through the deflection coil. The relationship between the differential input current and the output current is defined by: Idiff × RCON = I(coil) × RM. The output current is adjustable from 0.5 A (p-p) to 3 A (p-p) by varying RM. The maximum input differential voltage is 1.8 V. In the application it is recommended that Vdiff = 1.5 V (typ). This is recommended because of the spread of input current and the spread in the value of RCON. DESCRIPTION The flyback voltage is determined by an additional supply voltage VFB. The principle of operating with two supply voltages (class G) makes it possible to fix the supply voltage VP optimum for the scan voltage and the second supply voltage VFB optimum for the flyback voltage. Using this method, very high efficiency is achieved. The supply voltage VFB is almost totally available as flyback voltage across the coil, this being possible due to the absence of a decoupling capacitor (not necessary, due to the bridge configuration). The output circuit is fully protected against the following: I drive(pos) 1 I drive(neg) 2 V I(fb) 3 VP 4 V O(B) 5 n.c. 6 GND 7 V FB 8 A guard circuit VO(guard) is provided. The guard circuit is activated at the following conditions: VO(A) 9 • during flyback • thermal protection • short-circuit protection of the output pins (pins 5 and 9) • short-circuit of the output pins to VP. TDA8350 • during various short-circuit possibilities at the output pins VO(guard) 10 V O(sink) 11 I I(corr) 12 I I(set) 13 • during open loop • when the thermal protection is activated. This signal can be used for blanking the picture tube screen. MBC226-1 An East-West amplifier is also provided. This amplifier is an inverting amplifier which is current driven with sink current only capabilities. Fig.2 Pin configuration. January 1995 4 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT DC supply VP VFB supply voltage non-operating flyback supply voltage − 40 V − 25 V − 50 V 60 V − 3 A − 52 V 62 V − ±1.5 A note 1 Vertical circuit IO output current (peak-to-peak value) VO(A) output voltage (pin 9) note 2 note 1 Flyback switch IM peak output current East-West amplifier VO(sink) output voltage IO(sink) = 10 µA; note 3 − 40 V IO(sink) output current VO(sink) = 2 V; note 3 − 500 mA Thermal data (in accordance with IEC 747-1) Tstg storage temperature −65 150 °C Tamb operating ambient temperature −25 +75 °C Tvj virtual junction temperature − 150 °C Rth vj-c resistance vj-case − 4 K/W Rth vj-a resistance vj-ambient in free air − 40 K/W tsc short-circuiting time − 1 hr note 4 Notes 1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor (dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of 33 Ω (see application circuit Fig.5). 2. IO maximum determined by current protection. 3. The operating area is limited by a straight line between the points VO(sink) = 40 V; IO(sink) = 10 µA and VO(sink) = 2 V; IO(sink) = 500 mA. 4. Up to Vp = 18 V. January 1995 5 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q CHARACTERISTICS VP = 17.5 V; VFB = 45 V; VO(sink) = 20 V; fi = 50 Hz; II(sb) = 400 µA; Tamb = 25°C; measured in test circuit of Fig.3; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT DC supply VP operating supply voltage VFB flyback supply voltage IP supply current 9 − 25 V Vp − 50 V note 1 − − 60 V no signal; no load − 30 55 mA Vertical circuit VO output voltage swing (scan) Idiff = 0.6 mA (p-p); Vdiff = 1.8 V (p-p); IO = 3 A (p-p) 19.8 − − V LE linearity error IO = 3 A (p-p); − 1 2 % IO = 50 mA (p-p); note 2 − 1 2 % VO output voltage swing (flyback) VO(A) - VO(B) Idiff = 0.3 mA; IO = 1.5 A (M) − 39 − V VDF forward voltage of the internal efficiency diode (VO(A) - VFB) IO = −1.5 A (M); Idiff = 0.3 mA − − 1.5 V |Ios| output offset current Idiff = 0; II(sb) = 50 to 500 µA − − 30 mA |Vos| offset voltage at the input of the feedback amplifier VI(fb) - VO(B) Idiff = 0; II(sb) = 50 to 500 µA − − 18 mV ∆VosT output offset voltage as a function Idiff = 0; of temperature − − 72 µV/K VO(A) DC output voltage Idiff = 0; note 3 − 8 − V Gv open loop voltage gain (V9-5/V1-2) notes 4 and 5 − 80 − dB open loop voltage gain (V9-5/V3-5; V1-2 = 0) − 80 − dB − 0 − dB − 40 − Hz note 4 VR voltage ratio V1-2/V3-5 fres frequency response (−3 dB) GI current gain (IO/Idiff) − 5000 − ∆GIT current gain drift as a function of temperature − − 10−4 /K II(sb) signal bias current 50 400 500 µA IFB flyback supply current during scan − − 100 µA PSRR power supply ripple rejection note 7 − 80 − dB VI(DC) DC voltage at the input − 2.7 − V VI(CM) common mode input voltage II(sb) = 0 0 − 1.6 V Ibias input bias current II(sb) = 0 − 0.1 0.5 µA IO(CM) common mode output current ∆II(sb) = 300 µA (p-p); fi = 50 Hz; Idiff = 0 − 0.2 − mA January 1995 note 6 6 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit SYMBOL PARAMETER TDA8350Q CONDITIONS MIN. TYP. MAX. UNIT East-West amplifier − 2.0 2.5 V open loop voltage gain (V11/V12) − 47 − dB fres frequency response (−3 dB) − 4000 − Hz LE linearity error VO(sink) = 3 V − − 1 % VO(sink) = 10 V; note 2 − − 0.5 % VO(sink) saturation voltage Gv IO(sink) = 500 mA; II(corr) = 0 µA; note 8 Ibias input bias current (pin 12) − − 2 µA VI(DC) DC input voltage − 1 − V Iset offset voltage set current − 1 − mA V13-7 maximum allowed voltage at pin 13 − − 0.3 V Guard circuit IO VO(guard) output current not active; VO(guard) = 0 V − − 50 µA output current active; VO(guard) = 4.5 V 1 − 2.5 mA output voltage IO = 100 µA − − 5.5 V allowable voltage on pin 10 maximum leakage current = 10 µA − − 40 V Notes 1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor (dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of 33 Ω (see application circuit Fig.5). 2. The linearity error is measured without S-correction and based on the same measurement principle as performed on the screen. The measuring method is as follows: Divide the output signal I5 - I9 (VRM) into 22 equal parts ranging from 1 to 22 inclusive. Measure the value of two succeeding parts called one block starting with part 2 and 3 (block 1) and ending with part 20 and 21 (block 10). Thus part 1 and 22 are unused. The equations for linearity error for adjacent blocks (LEAB) and not adjacent blocks (NAB) are given below; a max – a min ak – a ( k + 1) LEAB = ----------------------------- ; NAB = -----------------------------a avg a avg 3. Referenced to VP. 4. V values within formulae, relate to voltages at or between relative pin numbers, i.e. V9-5/V1-2 = voltage value across pins 9 and 5 divided by voltage value across pins 1 and 2. 5. V3-5 AC short-circuited. 6. Frequency response V9-5/V3-5 is equal to frequency response V9-5/V1-2. 7. At V(ripple) = 500 mV eff; measured across RM; fi = 50 Hz. 8. The output pin 11 requires a capacitor of minimum value 68 nF. January 1995 7 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit handbook, full pagewidth TDA8350Q VFB VO(guard) 10 8 4 VP I I(sb) TDA8350 signal bias 9 1 I drive(pos) R CON 3 kΩ R = 6.2 Ω FEEDBACK 3 PULSE I diff R M = 0.6 Ω 2 I drive(neg) 5 V signal bias I I(sb) EAST WEST-AMPLIFIER I I(corr) 36 Ω 12 VO(sink) I SET 68 nF 13 68 kΩ 7 GND MBC228 Fig.3 Test circuit. January 1995 8 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q APPLICATION INFORMATION handbook, full pagewidth VFB VO(guard) 10 8 4 I I(sb) TDA8350 signal bias VP 100 nF 9 VO(A) I (coil) 1 I drive(pos) R CON 3 kΩ FEEDBACK 3 PULSE I diff V I(fb) 2 I drive(neg) 5 VO(B) V signal bias deflection coil AT6005/31 L = 8.63 mH R = 5.0 Ω R M = 0.7 Ω I I(sb) EAST WEST-AMPLIFIER I I(corr) 12 I SET 13 68 kΩ to line output stage VO(sink) 68 nF 7 GND MBC227 VP = 14 V; IO(p-p) = 2.14 A; II(sb) = 400 µA; Idiff(p-p) = 500 µA; VFB = 42 V; tFB = 0.6 ms. Fig.4 Application diagram. January 1995 9 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit ook, full pagewidth TDA8350Q VFB VO(guard) 10 8 4 I I(sb) TDA8350 signal bias VP 100 nF 9 VO(A) 1 I drive(pos) R CON 3 kΩ FEEDBACK 3 PULSE I diff 2 I drive(neg) V signal bias V I(fb) I (coil) R M = 0.7 Ω 220 nF 20 Ω 5 VO(B) I I(sb) EAST WEST-AMPLIFIER I I(corr) 12 I SET 13 to line output stage VO(sink) 68 nF 7 GND 68 kΩ MGC054 VP = 14 V; IO(p-p) = 2.14 A; II(sb) = 400 µA; Idiff(p-p) = 500 µA; VFB = 60 V; tFB = 0.4 ms. Fig.5 Application circuit; 50 V ≤ VFB ≤ 60 V. January 1995 10 deflection coil AT6005/31 L = 8.63 mH R = 5.0 Ω Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q PACKAGE OUTLINE 24.4 23.6 handbook, full pagewidth 20.0 19.6 0.05 convex 4.7 4.1 10 mounting base A 12.4 11.6 3.4 3.1 6 13 12 11 10 9 8 7 6 5 4 3 2 1 seating plane 17.0 15.5 2.4 1.6 13 11 2.1 1.8 2.20 1.45 0.75 0.60 0.25 M (13x) 1.7 3.4 0.55 0.35 (12x) 5.08 0.8 M A (13x) 4.3 Dimensions in mm. Fig.6 Plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm); (DBS13P; SOT141-6). January 1995 11 MBC369 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. SOLDERING Plastic DIL-bent-SIL packages BY DIP OR WAVE The maximum permissible temperature of the solder is 260 °C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. REPAIRING SOLDERED JOINTS Apply the soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 °C, it must not be in contact for more than 10 s; if between 300 and 400 °C, for not more than 5 s. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. January 1995 12 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q NOTES January 1995 13 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q NOTES January 1995 14 Philips Semiconductors Preliminary specification DC-coupled vertical deflection and East-West output circuit TDA8350Q NOTES January 1995 15 Philips Semiconductors – a worldwide company Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40 783 749, Fax. (31)40 788 399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SÃO PAULO-SP, Brazil. P.O. Box 7383 (01064-970). Tel. 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Box 218, 5600 MD, EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD36 © Philips Electronics N.V. 1994 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 533061/1500/02/pp16 Document order number: Date of release: January 1995 9397 744 70011