INTEGRATED CIRCUITS DATA SHEET TDA4866 Full bridge current driven vertical deflection booster Product specification Supersedes data of 1996 Oct 10 File under Integrated Circuits, IC02 1999 Jun 14 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster TDA4866 FEATURES GENERAL DESCRIPTION • Fully integrated, few external components The TDA4866 is a power amplifier for use in 90 degree colour vertical deflection systems for frame frequencies of 50 to 160 Hz. The circuit provides a high CMRR current driven differential input. Due to the bridge configuration of the two output stages DC-coupling of the deflection coil is achieved. In conjunction with TDA485x, TDA4841PS the ICs offer an extremely advanced system solution. • No additional components in combination with the deflection controller TDA485x, TDA4841PS • Pre-amplifier with differential high CMRR current mode inputs • Low offsets • High linear sawtooth signal amplification • High efficient DC-coupled vertical output bridge circuit • Powerless vertical shift • High deflection frequency up to 160 Hz • Power supply and flyback supply voltage independent adjustable to optimize power consumption and flyback time • Excellent transition behaviour during flyback • Guard circuit for screen protection. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT DC supply; note 1 VP supply voltage (pin 3) VFB flyback supply voltage (pin 7) Iq quiescent current (pin 7) note 2 8.2 − 25 V − − 60 V − 7 10 mA 0.6 − 2 A − ±500 ±600 µA − − 2 A Vertical circuit Idefl deflection current (peak-to-peak value; pins 4 and 6) Iid differential input current (peak-to-peak value) note 3 Flyback generator IFB maximum current during flyback (peak-to-peak value; pin 7) Guard circuit; note 1 V8 guard voltage guard on 7.5 8.5 10 V I8 guard current guard on 5 − − mA Notes 1. Voltages refer to pin 5 (GND). 2. Up to 60 V ≥ VFB ≥ 40 V a decoupling capacitor CFB = 22 µF (between pin 7 and pin 5) and a resistor RFB = 100 Ω (between pin 7 and VFB) are required (see Fig.4). 3. Differential input current Iid = I1 − I2. 1999 Jun 14 2 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster TDA4866 ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA4866 SIL9P DESCRIPTION VERSION plastic single in-line power package; 9 leads SOT131-2 BLOCK DIAGRAM handbook, full pagewidth GUARD output 8 VP GND VFB 3 5 7 TDA4866 GUARD CIRCUIT FLYBACK GENERATOR 6 Idefl OUTA AMPLIFIER A INA CSP 1 RSP INPUT STAGE INB PROTECTION 9 FEEDB 4 OUTB Rref 2 AMPLIFIER B from e.g. TDA485x, TDA4841PS vertical deflection coil Rp Rm MED750 Fig.1 Block diagram. PINNING SYMBOL PIN handbook, halfpage DESCRIPTION INA 1 INB 2 VP 3 OUTB 4 GND 5 OUTA 6 VFB 7 INA 1 input A INB 2 input B VP 3 supply voltage OUTB 4 output B GND 5 ground OUTA 6 output A VFB 7 flyback supply voltage GUARD 8 guard output GUARD 8 FEEDB 9 feedback input FEEDB 9 TDA4866 MED751 Fig.2 Pin configuration. 1999 Jun 14 3 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster FUNCTIONAL DESCRIPTION 1 with Rbo ≈ 70 mΩ and 1 – ----------------- ≈ 0.98 V U loop The TDA4866 consists of a differential input stage, two output stages, a flyback generator, a protection circuit for the output stages and a guard circuit. for Idefl = 0.7 A. The deflection current can be adjusted up to ±1 A by varying Rref when Rm is fixed to 1 Ω. Differential input stage The differential input stage has a high CMRR differential current mode input (pins 1 and 2) that results in a high electro-magnetic immunity and is especially suitable for driver units with differential (e.g. TDA485x, TDA4841PS) and single ended current signals. Driver units with voltage outputs are simply applicable as well (e.g. two additional resistors are required). High bandwidth and excellent transition behaviour is achieved due to the transimpedance principle this circuit works with. Flyback generator During flyback the flyback generator supplies the output stage A with the flyback voltage. This makes it possible to optimize power consumption (supply voltage VP) and flyback time (flyback voltage VFB). Due to the absence of a decoupling capacitor the flyback voltage is fully available. The differential input stage delivers the driver signals for the output stages. Output stages In parallel with the deflection yoke and the damping resistor (Rp) an additional RC combination (RSP; CSP) is necessary to achieve an optimized flyback behaviour. The two output stages are current driven in opposite phase and operate in combination with the deflection coil in a full bridge configuration. Therefore the TDA4866 requires no external coupling capacitor (e.g. 2200 µF) and operates with one supply voltage VP and a separate adjustable flyback supply voltage VFB only. The deflection current through the coil (Idefl) is measured with the resistor Rm which produces a voltage drop (Urm) of: Urm ≈ Rm × Idefl. At the feedback input (pin 9) a part of Idefl is fed back to the input stage. The feedback input has a current input characteristic which holds the differential voltage between pin 9 and the output pin 4 on zero. Therefore the feedback current (I9) through Rref is: Protection The output stages are protected against: • Thermal overshoot • Short-circuit of the coil (pins 4 and 6). Guard circuit The internal guard circuit provides a blanking signal for the CRT. The guard signal is active HIGH: • At thermal overshoot Rm I 9 ≈ ---------- × I defl R ref • When feedback loop is out of range • During flyback. The input stage directly compares the driver currents into pins 1 and 2 with the feedback current I9. Any difference of this comparison leads to a more or less driver current for the output stages. The relation between the deflection current and the differential input current (Iid) is: I id The internal guard circuit will not be activated, if the input signals on pins 1 and 2 delivered from the driver circuit are out of range or at short-circuit of the coil (pins 4 and 6). For this reason an external guard circuit can be applied to detect failures of the deflection (see Fig.6). This circuit will be activated when flyback pulses are missing, which is the indication of any abnormal operation. Rm = I 9 ≈ ---------- × I defl R ref Due to the feedback loop gain (VU loop) and internal bondwire resistance (Rbo) correction factors are required to determine the accurate value of Idefl: R ref 1 I defl = I id × ------------------------ × 1 – ----------------- R m + R bo V U loop 1999 Jun 14 TDA4866 4 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster TDA4866 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages referenced to pin 5 (GND); unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VP supply voltage (pin 3) 0 30 V VFB flyback supply voltage (pin 7) 0 60 V IFB flyback supply current 0 ±1.8 A V1, V2 input voltage 0 VP V I1, I2 input current 0 ±5 mA V4, V6 output voltage 0 VP V I4, I6 output current 0 ±1.8 A V9 feedback voltage 0 VP V I9 feedback current 0 ±5 mA V8 guard voltage 0 VP + 0.4 V I8 guard current 0 ±5 mA Tstg storage temperature −20 +150 °C Tamb operating ambient temperature −20 +75 °C Tj junction temperature note 3 −20 +150 °C Ves electrostatic handling for all pins note 4 −500 +500 V note 1 note 2 Notes 1. Maximum output currents I4 and I6 are limited by current protection. 2. For VP > 13 V the guard voltage V8 is limited to 13 V. 3. Internally limited by thermal protection; switching point ≥150 °C. 4. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor. THERMAL CHARACTERISTICS SYMBOL Rth(j-mb) 1999 Jun 14 PARAMETER thermal resistance from junction to mounting base 5 VALUE UNIT 4 K/W Philips Semiconductors Product specification Full bridge current driven vertical deflection booster TDA4866 CHARACTERISTICS VP = 15 V; Tamb = 25 °C; VFB = 40 V; voltages referenced to pin 5 (GND); parameters are measured in test circuit (see Fig.3); unless otherwise specified. SYMBOL PARAMETER VP supply voltage (pin 3) VFB flyback supply voltage (pin 7) IFB quiescent feedback current (pin 7) CONDITIONS MIN. TYP. MAX. UNIT 8.2 − 25 V note 1 VP + 6 − 60 V no load; no signal − 7 10 mA − ±500 ±600 µA Input stage Iid(p-p) differential input current (Iid = I1 − I2) (peak-to-peak value) I1, 2(p-p) single ended input current (peak-to-peak value) note 2 0 ±300 ±600 µA CMRR common mode rejection ratio note 3 − −54 − dB V1 input clamp voltage I1 = 300 µA 2.7 3.0 3.3 V V2 input clamp voltage I2 = 300 µA 2.7 3.0 3.3 V TCi,1 input clamp signal TC on pin 1 0 − ±800 µV/K TCi,2 input clamp signal TC on pin 2 0 − ±800 µV/K V1 − V2 differential input voltage 0 − ±10 mV I9 feedback current − ±500 ±600 µA V9 feedback voltage 1 − VP − 1 V Iid(offset) differential input offset current (Iid(offset) = I1 − I2) 0 − ±20 µA Ci INA input capacity pin 1 referenced to GND − − 5 pF Ci INB input capacity pin 2 referenced to GND − − 5 pF Iid = 0 Idefl = 0; Rref = 1.5 kΩ; Rm = 1 Ω Output stages A and B I4 output current − − ±1 A I6 output current − − ±1 A V6 output A saturation voltage to GND I6 = 0.7 A − 1.3 1.5 V I6 = 1.0 A − 1.6 1.8 V V6,3 output A saturation voltage to VP I6 = 0.7 A − 2.3 2.9 V I6 = 1.0 A − 2.7 3.3 V V4 output B saturation voltage to GND I4 = 0.7 A − 1.3 1.5 V I4 = 1.0 A − 1.6 1.8 V I4 = 0.7 A − 1.0 1.6 V V4,3 output B saturation voltage to VP I4 = 1.0 A − 1.3 1.9 V LE linearity error Idefl = ±0.7 A; note 4 − − 2 % V4 DC output voltage Iid = 0 A; closed-loop 6.6 7.2 7.8 V V6 DC output voltage Iid = 0 A; closed-loop 6.6 7.2 7.8 V Goi open-loop current gain (I4, 6/Iid) I4, 6 < 100 mA; note 5 − 100 − dB Gofb open-loop current gain (I4, 6/I9) I4, 6 < 100 mA; note 5 − 100 − dB Gifb current ratio (Iid/I9) closed-loop − −0.2 − dB 1999 Jun 14 6 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster SYMBOL Idefl(ripple) PARAMETER TDA4866 CONDITIONS MIN. TYP. MAX. UNIT VP(ripple) = ±0.5 V; Iid = 0; closed-loop − ±1 − mA reverse Idefl = 0.7 A − −2.0 −3.0 V Idefl = 1.0 A − −2.3 −3.5 V forward Idefl = 0.7 A − +5.6 +6.1 V Idefl = 1.0 A − +5.9 +6.5 V − VP + 1.5 V output ripple current as a function of supply ripple Flyback generator V7, 6 voltage drop during flyback V6 switching on threshold voltage VP − 1 V6 switching off threshold voltage VP − 1.5 − VP + 1 V I7 flyback current during flyback − − ±1 A V Guard circuit V8 output voltage guard on 7.5 8.5 10 V8 output voltage guard on; VP = 8.2 V 6.9 − VP − 0.4 V I8 output current guard on 5 − − mA V8 output voltage guard off − − 0.4 V I8 output current guard off; V8 = 5 V 0.5 1 1.5 mA V8(ext.) allowable external voltage on pin 8 0 − 13 V 0 − VP + 0.3 V VP ≤ 13 V Notes 1. Up to 60 V ≥ VFB ≥ 40 V a decoupling capacitor CFB = 22 µF (between pins 7 and 5) and a resistor RFB = 100 Ω (between pin 7 and VFB) are required (see Fig.4). 2. Saturation voltages of output stages A and B can be increased in the event of negative input currents I1, 2 < −500 µA. 3. I deflc I id D i = ----------- × --------- with Ideflc = common mode deflection current and Iidc = common mode input current. I idc I defl 4. Deviation of the output slope at a constant input slope. 5. Frequency behaviour of Goi and Gofb: a) −3 dB open-loop bandwidth (−45°) at 15 kHz; second pole (−135°) at 1.3 MHz. b) Open-loop gain at second pole (−135°) 55 dB. 1999 Jun 14 7 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster TDA4866 TEST AND APPLICATION INFORMATION handbook, full pagewidth I1 (µA) TDA4866 1 550 2 3 4 50 5 6 7 Rm 1Ω t I 1 from driver circuit TDA485x, TDA4841PS I1 I2 (µA) 9 GUARD output 6Ω VP 550 8 Rref 50 t 2 kΩ MED752 VFB Fig.3 Test diagram. handbook, full pagewidth TDA4866 1 I1 from driver circuit TDA485x, TDA4841PS 2 3 Rm 1Ω 25 kΩ Vshift 4 5 I2 (2) Rp GUARD output (2) 1.6 kΩ MED753 (1) (1) CFB 100 µF (VFB < 40 V) (1) Up to 60 V ≥ VFB ≥ 40 V, RFB = 100 Ω and CFB = 22 µF are required. (2) CSP = 10 to 330 nF and RSP = 10 to 22 Ω are required. The value of CSP depends on minimum tflb/VFB. Fig.4 Application diagram with driver circuit TDA485x, TDA4841PS. 1999 Jun 14 9 180 Ω R ref RFB VFB 8 RSP VP 220 µF 7 Ldeflcoil = 5.2 mH Rdeflcoil = 4.2 Ω CSP 10 kΩ 6 8 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster Example SYMBOL VALUE UNIT Values given from application Idefl(max) 0.71 A Ldeflcoil 5.2 mH Rdeflcoil 5.4 [= 4.2 + 7% + ∆R(ϑ)] Ω Rm 1 (+1%) Ω Rp 180 Ω Rref 1.6 kΩ VFB 35 V Tamb +50 °C Tdeflcoil +75 °C Rth(j-mb) 4 K/W Rth(mb-amb)(1) 8 K/W Calculation formula for supply voltage and power consumption Vb1 = V6, 3 + Rdeflcoil × Idefl(max) − U’L + Rm × Idefl(max) + V4 Vb2 = V6 + Rdeflcoil × Idefl(max) + U’L + Rm × Idefl(max) + V4, 3 for Vb1 > Vb2 : VP = Vb1 for Vb2 > Vb1 : VP = Vb2 with: U’L = Ldeflcoil × 2Idefl(max) × fv fv = vertical deflection frequency. Calculated values VP 8.6 V tflb 270 µs Ptot 3.65 W Pdefl 0.9 W PIC 2.75 W Rth(tot) 12 K/W Tj(max)(2) +83 °C Notes 1. A layer of silicon grease between the mounting base and the heatsink optimizes thermal resistance. 2. Tj(max) = PIC × [Rth(j-mb) + Rth(mb-amb)] + Tamb 1999 Jun 14 TDA4866 I defl(max) P tot = V P × ------------------- + V P × 0.03 A + 0.1 W + V FB × I FB 2 2 1 P defl = --- ( R deflcoil + R m ) × I defl(max) 3 P IC = P tot – P defl PIC = power dissipation of the IC Pdefl = power dissipation of the deflection coil Ptot = total power dissipation. Calculation formula for flyback time (tflb) t flb ( R deflcoil + R m ) × I defl(max) - 1 + -----------------------------------------------------------------L deflcoil V FB + V 7r – V 6r = --------------------------------- × ln ----------------------------------------------------------------------------- + t flb(off) R deflcoil + R m ( R deflcoil + R m ) × I defl(max) 1 – ------------------------------------------------------------------ V FB – ( V 7f – V 6f ) with: tflb(off) = flyback switch off time = 50 µs for this application (tflb(off) depends on VFB, Idefl(max), Ldeflcoil and CSP). To achieve good noise suppression the following values for Rp are recommended: Recommended values Ldeflcoil (mH) Rp (Ω) 3 100 6 180 10 240 15 390 9 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster TDA4866 driver current from TDA485x, TDA4841PS on pin 1 handbook, full pagewidth I1 t driver current from TDA485x, TDA4841PS on pin 2 I2 t V6 output voltage on pin 6 VFB VP t V4 output voltage on pin 4 VP t deflection current through the coil Idefl t GUARD output voltage on pin 8 during normal operation V8 t tflb flyback time t flb depends on V FB MHA062 Fig.5 Timing diagram. 1999 Jun 14 10 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster handbook, full pagewidth TDA4866 VP VFB 7 TDA4866 1N4448 2.2 kΩ GUARD output HIGH = error BC556 2.2 Ω 6 3.3 kΩ BC548 22 µF vertical output signal 220 kΩ MED754 Fig.6 Application circuit for external guard signal generation. INTERNAL PIN CONFIGURATION book, full pagewidth 8 3 7 VP TDA4866 6 VP 5 2 1 9 VP 4 VP MED755 Fig.7 Internal circuits. 1999 Jun 14 11 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster TDA4866 PACKAGE OUTLINE SIL9P: plastic single in-line power package; 9 leads SOT131-2 non-concave Dh x D Eh view B: mounting base side d A2 seating plane B E j A1 b L c 1 9 e Z Q w M bp 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A1 max. A2 b max. bp c D (1) d Dh E (1) e Eh j L Q w x Z (1) mm 2.0 4.6 4.2 1.1 0.75 0.60 0.48 0.38 24.0 23.6 20.0 19.6 10 12.2 11.8 2.54 6 3.4 3.1 17.2 16.5 2.1 1.8 0.25 0.03 2.00 1.45 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-03-11 SOT131-2 1999 Jun 14 EUROPEAN PROJECTION 12 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster TDA4866 The total contact time of successive solder waves must not exceed 5 seconds. SOLDERING Introduction to soldering through-hole mount packages The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL WAVE suitable(1) suitable Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Jun 14 13 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster NOTES 1999 Jun 14 14 TDA4866 Philips Semiconductors Product specification Full bridge current driven vertical deflection booster NOTES 1999 Jun 14 15 TDA4866 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 02 67 52 2531, Fax. +39 02 67 52 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1999 SCA 66 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545004/04/pp16 Date of release: 1999 Jun 14 Document order number: 9397 750 05319