INTEGRATED CIRCUITS DATA SHEET TDA8924 2 × 120 W class-D power amplifier Objective specification 2003 Jul 28 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 CONTENTS 15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION) 16 APPLICATION INFORMATION 16.1 16.2 16.3 16.4 16.5 16.6 16.7 16.8 16.9 16.10 16.11 16.12 BTL application Pin MODE Output power estimation External clock Heatsink requirements Output current limiting Pumping effects Reference design PCB information for HSOP24 encapsulation Classification Reference design: bill of materials Curves measured in the reference design 17 PACKAGE OUTLINE 18 SOLDERING 18.1 Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 QUICK REFERENCE DATA 5 ORDERING INFORMATION 6 BLOCK DIAGRAM 7 PINNING 8 FUNCTIONAL DESCRIPTION 8.1 8.2 8.3 8.3.1 8.3.2 8.3.3 8.3.4 8.4 General Pulse width modulation frequency Protections Over-temperature Short-circuit across the loudspeaker terminals and to supply lines Start-up safety test Supply voltage alarm Differential audio inputs 9 LIMITING VALUES 10 THERMAL CHARACTERISTICS 11 QUALITY SPECIFICATION 12 STATIC CHARACTERISTICS 19 DATA SHEET STATUS 13 SWITCHING CHARACTERISTICS 20 DEFINITIONS 14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION) 21 DISCLAIMERS 2003 Jul 28 18.2 18.3 18.4 18.5 2 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier 1 TDA8924 FEATURES 2 APPLICATIONS • High efficiency (∼90 %) • Television sets • Operating voltage from ±12.5 V to ±30 V • Home-sound sets • Very low quiescent current • Multimedia systems • Low distortion • All mains fed audio systems • Usable as a stereo Single-Ended (SE) amplifier or as a mono amplifier in Bridge-Tied Load (BTL) • Car audio (boosters). • Fixed gain of 28 dB in SE and 34 dB in BTL 3 • High output power The TDA8924 is a high efficiency class-D audio power amplifier with very low dissipation. The typical output power is 2 × 120 W. • Good ripple rejection • Internal switching frequency can be overruled by an external clock The device comes in a HSOP24 power package with a small internal heatsink. Depending on supply voltage and load conditions a very small or even no external heatsink is required. The amplifier operates over a wide supply voltage range from ±12.5 V to ±30 V and consumes a very low quiescent current. • No switch-on or switch-off plop noise • Short-circuit proof across the load and to the supply lines • Electrostatic discharge protection • Thermally protected. 4 GENERAL DESCRIPTION QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT General; VP = ±24 V VP supply voltage ±12.5 ±24 ±30 V Iq(tot) total quiescent current no load connected; note 1 − 100 − mA η efficiency Po = 240 W BTL mode − 83 − % 120 − W Stereo single-ended configuration RL = 2 Ω; THD = 10 %; VP = ±24 V; note 2 − output power Po Mono bridge-tied load configuration RL = 4 Ω; THD = 10 %; note 2 output power Po VP = ±24 V − 240 − W VP = ±20 V − 175 − W Notes 1. Quiescent current in application; value strongly depends on circuitry connected to the output pin. This also means that quiescent dissipation of the chip is lower than the VP × Iq. 2. Output power is measured indirectly; based on RDSon measurement. 5 ORDERING INFORMATION TYPE NUMBER TDA8924TH 2003 Jul 28 PACKAGE NAME HSOP24 DESCRIPTION plastic thermal enhanced small outline package; 24 leads; low stand-off height; heatsink 3 VERSION SOT566-3 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier 6 TDA8924 BLOCK DIAGRAM handbook, full pagewidth V DDA2 VDDA1 3 IN1− IN1+ SGND1 OSC MODE VDDP2 STABI PROT 10 18 13 23 VDDP1 14 15 INPUT STAGE 8 PWM MODULATOR SWITCH1 CONTROL AND ENABLE1 HANDSHAKE mute 11 DRIVER HIGH 16 STABI VSSP1 7 6 OSCILLATOR MANAGER MODE TEMPERATURE SENSOR CURRENT PROTECTION TDA8924 VDDP2 IN2− ENABLE2 CONTROL SWITCH2 AND HANDSHAKE RELEASE2 5 4 INPUT STAGE 1 PWM MODULATOR 12 24 VSSA2 VSSA1 VSSD 19 HW Pin 19 should be connected to pin 24 in the application. Fig.1 Block diagram. 2003 Jul 28 BOOT2 2 mute IN2+ OUT1 DRIVER LOW 22 SGND2 BOOT1 RELEASE1 9 4 DRIVER HIGH 21 OUT2 DRIVER LOW 17 20 VSSP1 VSSP2 MDB569 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier 7 TDA8924 PINNING SYMBOL PIN DESCRIPTION VSSA2 1 negative analog supply voltage for channel 2 SGND2 2 signal ground channel 2 VDDA2 3 positive analog supply voltage for channel 2 IN2− 4 negative audio input for channel 2 IN2+ 5 positive audio input for channel 2 MODE 6 mode select input (standby/mute/operating) OSC 7 handbook, halfpage VSSD 24 1 oscillator frequency adjustment or tracking input VSSA2 VDDP2 23 2 SGND2 BOOT2 22 3 VDDA2 IN1+ 8 positive audio input for channel 1 IN1− 9 negative audio input for channel 1 OUT2 21 4 IN2− VDDA1 10 positive analog supply voltage for channel 1 VSSP2 20 5 IN2+ SGND1 11 signal ground for channel 1 6 MODE VSSA1 12 negative analog supply voltage for channel 1 STABI 18 7 OSC VSSP1 17 8 IN1+ OUT1 16 9 IN1− PROT 13 time constant capacitor for protection delay VDDP1 14 positive power supply for channel 1 BOOT1 15 bootstrap capacitor for channel 1 OUT1 16 PWM output from channel 1 VSSP1 17 negative power supply voltage for channel 1 STABI 18 decoupling internal stabilizer for logic supply HW 19 handle wafer; must be connected to pin 24 VSSP2 20 negative power supply voltage for channel 2 OUT2 21 PWM output from channel 2 BOOT2 22 bootstrap capacitor for channel 2 VDDP2 23 positive power supply voltage for channel 2 VSSD 24 negative digital supply voltage 2003 Jul 28 HW 19 TDA8924TH BOOT1 15 10 VDDA1 VDDP1 14 11 SGND1 PROT 13 12 VSSA1 MDB568 Pin 19 should be connected to pin 24 in the application. Fig.2 Pin configuration. 5 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier 8 8.1 TDA8924 The amplifier system can be switched in three operating modes with pin MODE: FUNCTIONAL DESCRIPTION General • Standby mode; with a very low supply current The TDA8924 is a two channel audio power amplifier using class-D technology. A typical application diagram is illustrated in Fig.38. A detailed application reference design is given in Section 16.8. • Mute mode; the amplifiers are operational, but the audio signal at the output is suppressed • Operating mode; the amplifiers are fully operational with output signal. The audio input signal is converted into a digital Pulse Width Modulated (PWM) signal via an analog input stage and PWM modulator. To enable the output power transistors to be driven, this digital PWM signal is applied to a control and handshake block and driver circuits for both the high side and low side. In this way a level shift is performed from the low power digital PWM signal (at logic levels) to a high power PWM signal which switches between the main supply lines. An example of a switching circuit for driving pin MODE is illustrated in Fig.3. For suppressing plop noise the amplifier will remain automatically in the mute mode for approximately 150 ms before switching to the operating mode (see Fig.4). During this time, the coupling capacitors at the input are fully charged. A 2nd-order low-pass filter converts the PWM signal to an analog audio signal across the loudspeaker. The TDA8924 one-chip class-D amplifier contains high power D-MOS switches, drivers, timing and handshaking between the power switches and some control logic. For protection a temperature sensor and a maximum current detector are built-in. handbook, halfpage mute/on R Each of the two audio channels of the TDA8924 contains a PWM, an analog feedback loop and a differential input stage. The TDA8924 also contains circuits common to both channels such as the oscillator, all reference sources, the mode functionality and a digital timing manager. MODE pin R SGND MBL463 The TDA8924 contains two independent amplifier channels with high output power, high efficiency (90 %), low distortion and a low quiescent current. The amplifier channels can be connected in the following configurations: • Mono Bridge-Tied Load (BTL) amplifier Fig.3 Example of mode select circuit. • Stereo Single-Ended (SE) amplifiers. 2003 Jul 28 +5 V standby/ mute 6 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 audio handbook, full pagewidth switching Vmode When switching from standby to mute, there is a delay of 100 ms before the output starts switching. The audio signal is available after Vmode has been set to operating, but not earlier than 150 ms after switching to mute. operating 4V mute 2V 0 V (SGND) standby 100 ms time >50 ms audio switching Vmode When switching from standby to operating, there is a first delay of 100 ms before the outputs starts switching. The audio signal is available after a second delay of 50 ms. operating 4V 0 V (SGND) standby 100 ms 50 ms time MBL465 Fig.4 Timing on mode select input. 8.2 If two or more class-D amplifiers are used in the same audio application, it is advisable to have all devices operating at the same switching frequency. Pulse width modulation frequency The output signal of the amplifier is a PWM signal with a carrier frequency of approximately 350 kHz. Using a 2nd-order LC demodulation filter in the application results in an analog audio signal across the loudspeaker. This switching frequency is fixed by an external resistor ROSC connected between pin OSC and VSSA. With the resistor value given in the schematic diagram of the reference design, the carrier frequency is typical 350 kHz. The carrier frequency can be calculated using the This can be realized by connecting all OSC pins together and feed them from an external central oscillator. Using an external oscillator it is necessary to force pin OSC to a DC-level above SGND for switching from internal to an external oscillator. In this case the internal oscillator is disabled and the PWM will be switched to the external frequency. The frequency range of the external oscillator must be in the range as specified in the switching characteristics; see Chapter 13. 9 9 × 10 following equation: f osc = ------------------- Hz R OSC 2003 Jul 28 7 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 Remark: This test is only operational prior to or during the start-up sequence, and not during normal operation. In an application circuit: • Internal oscillator: ROSC connected from pin OSC to VSS • External oscillator: connect oscillator signal between pin OSC and SGND; delete ROSC and COSC. 8.3 During normal operation the maximum current protection is used to detect short-circuits across the load and with respect to the supply lines. Protections 8.3.4 Temperature, supply voltage and short-circuit protection sensors are included on the chip. In the event that the maximum current or maximum temperature is exceeded the system will shut down. 8.3.1 If the supply voltage falls below ±12.5 V the undervoltage protection is activated and the system shuts down correctly. If the internal clock is used, this switch-off will be silent and without plop noise. When the supply voltage rises above the threshold level the system is restarted again after 100 ms. If the supply voltage exceeds ±32 V the overvoltage protection is activated and the power stages shut down. They are re-enabled as soon as the supply voltage drops below the threshold level. OVER-TEMPERATURE If the junction temperature (Tj) exceeds 150 °C, then the power stage will shut down immediately. The power stage will start switching again if the temperature drops to approximately 130 °C, thus there is a hysteresis of approximately 20 °C. 8.3.2 It has to be stressed that the overvoltage protection only protects against damage due to supply pumping effects; see Section 16.7. Apart from the power stages, the rest of the circuitry remains connected to the power supply. This means, that the supply itself should never exceed 30 V. SHORT-CIRCUIT ACROSS THE LOUDSPEAKER TERMINALS AND TO SUPPLY LINES When the loudspeaker terminals are short-circuited or if one of the demodulated outputs of the amplifier is short-circuited to one of the supply lines this will be detected by the current protection. If the output current exceeds the maximum output current of 12 A, then the power stage will shut down within less than 1 µs and the high-current will be switched off. In this state the dissipation is very low. Every 100 ms the system tries to restart again. If there is still a short-circuit across the loudspeaker load or to one of the supply lines, the system is switched off again as soon as the maximum current is exceeded. The average dissipation will be low because of this low duty cycle. 8.3.3 An additional balance protection circuit compares the positive (VDD) and the negative (VSS) supply voltages and is triggered if the voltage difference between them exceeds a certain level. This level depends on the sum of both supply voltages. An expression for the unbalanced threshold level is as follows: Vth(unb) ~ 0.15 × (VDD + VSS). Example: With a symmetrical supply of ±30 V the protection circuit will be triggered if the unbalance exceeds approximately 9 V; see also Section 16.7. 8.4 Differential audio inputs For a high common mode rejection ratio and a maximum of flexibility in the application, the audio inputs are fully differential. By connecting the inputs anti-parallel the phase of one of the channels can be inverted, so that a load can be connected between the two output filters. In this case the system operates as a mono BTL amplifier and with the same loudspeaker impedance an approximately four times higher output power can be obtained. START-UP SAFETY TEST During the start-up sequence, when the mode pin is switched from standby to mute, the condition at the output terminals of the power stage are checked. In the event of a short-circuit at one of the output terminals to VDD or VSS the start-up procedure is interrupted and the systems waits for open-circuit outputs. Because the test is done before enabling the power stages, no large currents will flow in the event of a short-circuit. This system protects for short-circuits at both sides of the output filter to both supply lines. When there is a short-circuit from the power PWM output of the power stage to one of the supply lines (before the demodulation filter) it will also be detected by the start-up safety test. Practical use of this test feature can be found in detection of short-circuits on the printed-circuit board. 2003 Jul 28 SUPPLY VOLTAGE ALARM The input configuration for mono BTL application is illustrated in Fig.5; for more information see Chapter 16. In the stereo single-ended configuration it is also recommended to connect the two differential inputs in anti-phase. This has advantages for the current handling of the power supply at low signal frequencies. 8 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 handbook, full pagewidth OUT1 IN1+ IN1− Vin SGND IN2+ IN2− OUT2 power stage MBL466 Fig.5 Input configuration for mono BTL application. 2003 Jul 28 9 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT − ±30 V − 5.5 V − ±30 V − 11.3 A VP supply voltage VMODE input voltage on pin MODE Vsc short-circuit voltage on output pins IORM repetitive peak current in output pin Tstg storage temperature −55 +150 °C Tamb ambient temperature −40 +85 °C Tvj virtual junction temperature − 150 °C with respect to SGND note 1 Note 1. See also Section 16.6. 10 THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth(j-a) thermal resistance from junction to ambient in free air; note 1 35 K/W Rth(j-c) thermal resistance from junction to case note 1 1.3 K/W Note 1. See also Section 16.5. 11 QUALITY SPECIFICATION In accordance with “SNW-FQ611-part D” if this type is used as an audio amplifier. 2003 Jul 28 10 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 12 STATIC CHARACTERISTICS VP = ±24 V; Tamb = 25 °C; measured in Fig.9; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage note 1 ±12.5 ±24 ±30 V Iq(tot) total quiescent current no load connected − 100 − mA Istb standby supply current − 100 500 µA Mode select input: pin MODE VMODE input voltage note 2 0 − 5.5 V IMODE input current VMODE = 5.5 V − − 1000 µA Vstb input voltage for standby mode notes 2 and 3 0 − 0.8 V Vmute input voltage for mute mode notes 2 and 3 2.2 − 3.0 V Von input voltage for operating mode notes 2 and 3 4.2 − 5.5 V note 2 − 0 − V Audio inputs: pins IN2−, IN2+, IN1+ and IN1− VI DC input voltage Amplifier outputs: pins OUT1 and OUT2 VOO(SE) SE output offset voltage operating and mute − − 150 mV ∆VOO(SE) SE variation of output offset voltage operating ↔ mute − − 80 mV VOO(BTL) BTL output offset voltage operating and mute − − 215 mV ∆VOO(BTL) BTL variation of output offset voltage operating ↔ mute − − 115 mV operating and mute; note 4 11 13 15 V Stabilizer: pin STABI Vo(stab) stabilizer output voltage Temperature protection Tprot temperature protection activation 150 − − °C Thys hysteresis on temperature protection − 20 − °C Notes 1. The circuit is DC adjusted at VP = ±12.5 V to ±30 V. 2. With respect to SGND (0 V). 3. The transition regions between standby, mute and operating mode contain hysteresis (see Fig.6). 4. With respect to VSSP1. 2003 Jul 28 11 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 MBL467 handbook, full pagewidth STBY 0 MUTE 0.8 2.2 ON 3.0 4.2 5.5 VMODE (V) Fig.6 Behaviour of mode selection pin MODE. 13 SWITCHING CHARACTERISTICS VDD = ±24 V; Tamb = 25 °C; measured in Fig.9; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Internal oscillator; note 1 fosc(typ) typical oscillator frequency fosc oscillator frequency ROSC = 30.0 kΩ 290 317 344 kHz 210 − 600 kHz External oscillator or frequency tracking VOSC voltage on pin OSC SGND + 4.5 SGND + 5 VOSC(trip) trip level for tracking at pin OSC − SGND + 2.5 − V ftrack frequency range for tracking 210 − 600 kHz VP(OSC)(ext) minimum symmetrical supply voltage for external oscillator application 15 − − V Note 1. Frequency set with ROSC, according to the formula in Section 8.2. 2003 Jul 28 12 SGND + 6 V Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION) VP = ±24 V; RL = 2 Ω; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 Ω (note 1); Tamb = 25 °C; measured in Fig.9; unless otherwise specified. SYMBOL Po THD PARAMETER output power total harmonic distortion CONDITIONS MIN. TYP. MAX. UNIT RL = 4 Ω; VP = ±27 V; THD = 0.5 %; note 2 − 70 − W RL = 4 Ω; VP = ±27 V; THD = 10 %; note 2 − 90 − W RL = 3 Ω; VP = ±27 V; THD = 0.5 %; note 2 − 93 − W RL = 3 Ω; VP = ±27 V; THD = 10 %; note 2 − 115 − W RL = 2 Ω; VP = ±24 V; THD = 0.5 %; note 2 − 95 − W RL = 2 Ω; VP = ±24 V; THD = 10 %; note 2 − 120 − W fi = 1 kHz − 0.05 − % fi = 10 kHz − 0.07 − % Po = 1 W; note 3 Gv(cl) closed loop voltage gain − 28 − dB η efficiency Po = 125 W; note 4 − 83 − % SVRR supply voltage ripple rejection operating; fi = 100 Hz; note 5 − 55 − dB operating; fi = 1 kHz; note 6 40 50 − dB Zi input impedance Vn(o) noise output voltage αcs channel separation ∆Gv channel unbalance Vo(mute) output signal in mute CMRR common mode rejection ratio mute; fi = 100 Hz; note 5 − 55 − dB standby; fi = 100 Hz; note 5 − 80 − dB 45 68 − kΩ operating; Rs = 0 Ω; note 7 − 200 400 µV operating; Rs = 10 kΩ; note 8 − 230 − µV mute; note 9 − 220 − µV − 70 − dB − − 1 dB note 11 − − 400 µV Vi(CM) = 1 V (RMS) − 75 − dB note 10 Notes 1. RsL = series resistance of inductor of low-pass LC filter in the application. 2. Output power is measured indirectly; based on RDSon measurement. 3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a lower order low-pass filter a significantly higher value is found, due to the switching frequency outside the audio band. Maximum limit is guaranteed but may not be 100 % tested. 4. Output power measured across the loudspeaker load. 5. Vripple = Vripple(max) = 2 V (p-p); fi = 100 Hz; Rs = 0 Ω. 6. Vripple = Vripple(max) = 2 V (p-p); fi = 1 kHz; Rs = 0 Ω. 7. B = 22 Hz to 22 kHz; Rs = 0 Ω; maximum limit is guaranteed but may not be 100 % tested. 8. B = 22 Hz to 22 kHz; Rs = 10 kΩ. 9. B = 22 Hz to 22 kHz; independent of Rs. 10. Po = 1 W; Rs = 0 Ω; fi = 1 kHz. 11. Vi = Vi(max) = 1 V (RMS); maximum limit is guaranteed but may not be 100 % tested. 2003 Jul 28 13 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION) VP = ±24 V; RL = 4 Ω; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 Ω (note 1); Tamb = 25 °C; measured in Fig.9; unless otherwise specified. SYMBOL Po THD PARAMETER output power total harmonic distortion CONDITIONS closed loop voltage gain η efficiency SVRR supply voltage ripple rejection Zi input impedance Vn(o) noise output voltage TYP. MAX. UNIT RL = 3 Ω; VP = ±20 V; THD = 0.5 %; note 2 − 160 − W RL = 3 Ω; VP = ±20 V; THD = 10 %; note 2 − 205 − W RL = 4 Ω; VP = ±20 V; THD = 0.5 %; note 2 − 135 − W RL = 4 Ω; VP = ±20 V; THD = 10 %; note 2 − 175 − W RL = 4 Ω; VP = ±24 V; THD = 0.5 %; note 2 − 200 − W RL = 4 Ω; VP = ±24 V; THD = 10 %; note 2 − 240 − W fi = 100 Hz − 0.015 − % fi = 1 kHz − 0.015 0.05 % Po = 1 W; note 3 − 0.015 − % − 34 − dB Po = 240 W; note 4 − 83 − % operating; fi = 100 Hz; note 5 − 49 − dB fi = 10 kHz Gv(cl) MIN. operating; fi = 1 kHz; note 6 36 44 − dB mute; fi = 100 Hz; note 5 − 49 − dB standby; fi = 100 Hz; note 5 − 80 − dB 22 34 − kΩ operating; Rs = 0 Ω; note 7 − 280 560 µV operating; Rs = 10 kΩ; note 8 − 300 − µV mute; note 9 − 280 − µV Vo(mute) output signal in mute note 10 − − 500 µV CMRR common mode rejection ratio Vi(CM) = 1 V (RMS) − 75 − dB Notes 1. RsL = series resistance of inductor of low-pass LC filter in the application. 2. Output power is measured indirectly; based on RDSon measurement. 3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a low order low-pass filter a significant higher value will be found, due to the switching frequency outside the audio band. Maximum limit is guaranteed but may not be 100 % tested. 4. Output power measured across the loudspeaker load. 5. Vripple = Vripple(max) = 2 V (p-p); fi = 100 Hz; Rs = 0 Ω. 6. Vripple = Vripple(max) = 2 V (p-p); fi = 1 kHz; Rs = 0 Ω. 7. B = 22 Hz to 22 kHz; Rs = 0 Ω; maximum limit is guaranteed but may not be 100 % tested. 8. B = 22 Hz to 22 kHz; Rs = 10 kΩ. 9. B = 22 Hz to 22 kHz; independent of Rs. 10. Vi = Vi(max) = 1 V (RMS); fi = 1 kHz; maximum limit is guaranteed but may not be 100 % tested. 2003 Jul 28 14 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 16 APPLICATION INFORMATION 16.1 BTL application BTL: P o(1%) When using the power amplifier in a mono BTL application (for more output power), the inputs of both channels must be connected in parallel; the phase of one of the inputs must be inverted; see Fig.5. In principle the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 2 RL --------------------- × 2V P × ( 1 – t min × f osc ) R L + 1.2 = --------------------------------------------------------------------------------------------2 × RL Maximum current: 2V P × ( 1 – t min × f osc ) I o(peak) = -------------------------------------------------------- should not exceed 12 A. R L + 1.2 Legend: 16.2 Pin MODE RL = load impedance For correct operation the switching voltage at pin MODE should be debounced. If pin MODE is driven by a mechanical switch an appropriate debouncing low-pass filter should be used. If pin MODE is driven by an electronic circuit or microcontroller then it should remain at the mute voltage level for at least 100 ms before switching back to the standby voltage level. 16.3 fosc = oscillator frequency tmin = minimum pulse width (typical 190 ns) VP = single-sided supply voltage (so if supply ±30 V symmetrical, then VP = 30 V) Po(1%) = output power just at clipping Po(10%) = output power at THD = 10 % Po(10%) = 1.25 × Po(1%). Output power estimation The output power in several applications (SE and BTL) can be estimated using the following expressions: SE: P o(1%) 16.4 External clock The minimum required symmetrical supply voltage for external clock application is ±15 V (equally, the minimum asymmetrical supply voltage for applications with an external clock is 30 V). 2 RL --------------------- × V P × ( 1 – t min × f osc ) R L + 0.6 = ----------------------------------------------------------------------------------------2 × RL Maximum current: When using an external clock the duty cycle of the external clock has to be between 47.5 % and 52.5 %. V P × ( 1 – t min × f osc ) I o(peak) = ---------------------------------------------------- should not exceed 12 A. R L + 0.6 A possible solution for an external clock oscillator circuit is illustrated in Fig.7. VDDA handbook, full pagewidth 2 kΩ 0− 0+ 11 10 CTC ASTAB− 4 −TRIGGER ASTAB+ 5 6 1 14 120 pF RTC HEF4047BT 2 9.1 kΩ 7 RCTC 3 360 kHz 320 kHz VDD VSS HOP 220 nF 5.6 V 4.3 V 13 8 +TRIGGER 9 12 MR RETRIGGER GND CLOCK MBL468 Fig.7 External oscillator circuit. 2003 Jul 28 15 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier 16.5 TDA8924 Heatsink requirements Although the TDA8924 is a class-D amplifier a heatsink is required. Reason is that though efficiency is high, the output power is high as well, resulting in heating up of the device. The relation between temperatures, dissipation and thermal behaviour is given below. MBL469 30 handbook, halfpage Pdiss (W) (1) 20 R th(j-a) T j(max) – T A = ---------------------------P diss (2) Pdiss is determined by the efficiency (η) of the TDA8924. The efficiency measured in the TDA8924 as a function of output power is given in Figs. 17 and 18. The power dissipation can be derived as function of output power; see Figs. 15 and 16. 10 (3) (4) (5) 0 The derating curves (given for several values of the Rth(j-a)) are illustrated in Fig.8. A maximum junction temperature Tj = 150 °C is taken into account. From Fig.8 the maximum allowable power dissipation for a given heatsink size can be derived or the required heatsink size can be determined at a required dissipation level. 0 (1) (2) (3) (4) (5) Example: Po = 2 × 100 W into 2 Ω Tamb = 60 °C 40 60 100 80 Tamb (°C) Rth(j-a) = 5 K/W. Rth(j-a) = 10 K/W. Rth(j-a) = 15 K/W. Rth(j-a) = 20 K/W. Rth(j-a) = 35 K/W. Fig.8 Tj(max) = 150 °C 20 Derating curves for power dissipation as a function of maximum ambient temperature. Pdiss(tot) = 37 W (see Fig.15). The required Rth(j-a) = 2.43 K/W can be calculated. 16.6 The Rth(j-a) of the TDA8924 in free air is 35 K/W; the Rth(j-c) of the TDA8924 is 1.3 K/W, thus a heatsink of 1.13 K/W is required for this example. Output current limiting To guarantee the robustness of the class-D amplifier the maximum output current which can be delivered by the output stage is limited. An overcurrent protection is included for each output power switch. When the current flowing through any of the power switches exceeds a defined internal threshold (e.g. in case of a short-circuit to the supply lines or a short-circuit across the load), the amplifier will shut down immediately and an internal timer will be started. After a fixed time (e.g. 100 ms) the amplifier is switched on again. If the requested output current is still too high the amplifier will switch-off again. Thus the amplifier will try to switch to the operating mode every 100 ms. The average dissipation will be low in this situation because of this low duty cycle. If the overcurrent condition is removed the amplifier will remain operating. This example demonstrates that one might end up with unrealistically low Rth(j-a) figure. It has to be kept in mind that in actual applications, other factors such as the average power dissipation with a music source (as opposed to a continuous sine wave) will determine the size of the heatsink required. Because the duty cycle is low the amplifier will be switched off for a relatively long period of time, which will be noticed as a so-called audio-hole; an audible interruption in the output signal. 2003 Jul 28 16 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 To trigger the maximum current protection in the TDA8924, the required output current must exceed 12 A. This situation occurs in case of: This signal could be used by a signal processor. In order to filter the protection signal a capacitor can be connected between pin PROT and VSS. However, this capacitor slows down the protective action as well as it filters the signal. Therefore, the value of the capacitor should be limited to a maximum value of 47 pF. • Short-circuits from any output terminal to the supply lines (VDD or VSS) • Short-circuit across the load or speaker impedances or a load impedance below the specified values of 2 Ω and 4 Ω. For a more detailed description of the implications of output current limiting see also the application notes (tbf). Even if load impedances are connected to the amplifier outputs which have an impedance rating of 4 Ω, this impedance can be lower due to the frequency characteristic of the loudspeaker; practical loudspeaker impedances can be modelled as an RLC network which will have a specific frequency characteristic: the impedance at the output of the amplifier will vary with the input frequency. A high supply voltage in combination with a low impedance will result in large current requirements. 16.7 Pumping effects The TDA8924 class-D amplifier is supplied by a symmetrical voltage (e.g VDD = +24 V, VSS = −24 V). When the amplifier is used in a SE configuration, a so-called ‘pumping effect’ can occur. During one switching interval energy is taken from one supply (e.g. VDD), while a part of that energy is delivered back to the other supply line (e.g. VSS) and visa versa. When the voltage supply source cannot sink energy the voltage across the output capacitors of that voltage supply source will increase: the supply voltage is pumped to higher levels. Another factor which must be taken into account is the ripple current which will also flow through the output power switches. This ripple current depends on the inductor values which are used, supply voltage, oscillator frequency, duty factor and minimum pulse width. The maximum available output current to drive the load impedance can be calculated by subtracting the ripple current from the maximum repetitive peak current in the output pin, which is 11.3 A for the TDA8924. The voltage increase caused by the pumping effect depends on: • Speaker impedance • Supply voltage • Audio signal frequency • Capacitor value present on supply lines As a rule of thumb the following expressions can be used to determine the minimum allowed load impedance without generating audio holes: • Source and sink currents of other channels. The pumping effect should not cause a malfunction of either the audio amplifier and/or the voltage supply source. For instance, this malfunction can be caused by triggering of the undervoltage or overvoltage protection or unbalance protection of the amplifier. The overvoltage protection is only meant to prevent the amplifier from supply pumping effects. V P ( 1 – t min f osc ) Z L ≥ --------------------------------------- – 0.6 for SE application. I ORM – I ripple 2V P ( 1 – t min f osc ) Z L ≥ ------------------------------------------- – 1.2 for BTL application. I ORM – I ripple Legend: ZL = load impedance For a more detailed description of this phenomenon see the application notes (tbf). fosc = oscillator frequency 16.8 tmin = minimum pulse width (typical 190 ns) The reference design for the single-chip class-D audio amplifier using the TDA8924 is illustrated in Fig.9. The Printed-Circuit Board (PCB) layout is shown in Fig.10. The Bill Of Materials (BOM) is given in Table 1. VP = single-sided supply voltage (if the supply = ±30 V symmetrical, then VP = 30 V) IORM = maximum repetitive peak current in output pin; see also Chapter 9 Iripple = ripple current. Output current limiting goes with a signal on the protection pin (pin PROT). This pin is HIGH under normal operation. It goes LOW when current protection takes place. 2003 Jul 28 Reference design 17 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... +25 V VDD L1 BEAD 100 nF VDDP C1 470 µF R1(3) 10 kΩ GND C3 47 µF GND R2(3) 9.1 kΩ −25 V VSS C7 BTL: remove IN2, R8, R9, C18, C19, C21 and close J3 and J4. BTL: connect loudspeaker between OUT1+ and OUT2−. BTL: R1 and R2 are only required when an asymmetrical supply is used (VSS = 0 V). In case of hum close J1 and J2. L2 BEAD C2 470 µF R3 39 kΩ VSSP L3 BEAD 100 nF VDDA R4 39 kΩ GND VDDA C4 47 µF mute C8 220 nF GND L4 BEAD on S1 C5 47 µF Z1 5.6 V off VSSA VSSA VDDA C10 100 nF GND VSSA C11 220 nF C12 100 nF VDDA1 VSSA1 GND C9 220 nF VDDP R5 30 kΩ C13 100 nF GND VSSP C14 220 nF C15 100 nF VDDP1 VSSP1 GND GND GND 18 R6 C16 5.6 kΩ 470 nF IN1+ in 1 C20 330 pF (4) R7 C17 5.6 kΩ 470 nF IN1− SGND J3(1) 7 6 14 GND C24 560 pF 17 BOOT1 C22 15 nF 9 16 R10 4.7 Ω C26 1 µF C28 220 nF SGND OUT1− R12 22 Ω OUT1 C30 15 nF L5 10 µH 11 J4(1) (4) R8 C18 5.6 kΩ 470 nF C21 330 pF in 2 L6 10 µH OUT2 C23 15 nF 5 22 R11 4.7 Ω BOOT2 IN2− 4 R9 C19 5.6 kΩ 470 nF 1 3 VSSA2 24 VDDA2 VSSD GND C34 100 nF C35 220 nF STABI C33 47 pF 23 VSSP 20 VDDP2 PROT HW C29 220 nF SE 2 Ω OUT2+ SGND VSSP2 GND GND GND MDB570 GND C37 100 nF C36 100 nF VDDA 19 C27 1 µF R13 22 Ω C38 220 nF VDDP C39 100 nF VSSP Fig.9 Single-chip class-D audio amplifier application diagram. TDA8924 VSSA C32 220 nF 13 C25 560 pF OUT2− C31 15 nF Objective specification GND 18 BTL 4 Ω (2) 2 21 IN2+ SE 2 Ω OUT1+ TDA8924 SGND2 J2 12 MODE 15 SGND1 J1 GND 10 8 OSC Philips Semiconductors GND C6 (1) (2) (3) (4) 2 × 120 W class-D power amplifier handbook, full pagewidth 2003 Jul 28 Every decoupling to ground (plane) must be made as close as possible to the pin. To handle 20 Hz under all conditions in stereo SE mode, the external power supply needs to have a capacitance of at least 4700 µF per supply line; VP = ±27 V (max). Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier 16.9 TDA8924 PCB information for HSOP24 encapsulation It is possible to use several different output filter inductors such as 16RHBP or EP13 types to evaluate the performance against the price or size. The size of the printed-circuit board is 74.3 × 59.10 mm, dual-sided 35 µm copper with 121 metallized through holes. 16.10 Classification The standard configuration is a symmetrical supply (typical ±24 V) with stereo SE outputs (typical 2 × 4 Ω). The application shows optimized signal and EMI performance. The printed-circuit board is also suitable for mono BTL configuration (1 × 8 Ω) also for symmetrical supply and for asymmetrical supply. 2003 Jul 28 19 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... C35 C21 U1 C8 C20 C14 L5 C27 C11 C33 J4 J3 Z1 C26 On − Out2 + − Out1+ S1 VDD GND VSS TDA8920/21/22/23/24TH state of D art In1 In2 Off Top silk screen Top copper Philips Semiconductors 2 × 120 W class-D power amplifier 1-2002 C38 L6 dbook, full pagewidth 2003 Jul 28 PCB version 4 20 C25 C34 C1 R11 C23 C37 C9 C36 C39 C32 C10 C15 R5 C13 C12 C5 L4 R3 C19 C16 R8 R9 J2 R7 R6 J1 L2 L1 C7 L3 C30 C6 R2 R1 PHILIPS SEMICONDUCTORS C28 C31 R13 C29 Bottom copper MDB567 Fig.10 Printed-circuit board layout for the TDA8924TH (some of the components showed on the top silk side have to be mounted on the bottom side for a proper heatsink fitting). TDA8924 Bottom silk screen R12 Objective specification R4 C2 C24 R10 C17 C4 C18 C3 C22 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 16.11 Reference design: bill of materials Table 1 Single-chip class-D audio amplifier printed-circuit board (version 4; 01-2002) for TDA8924TH (see Figs 9 and 10) BOM ITEM QUANTITY 1 1 U1 TDA8924TH Philips Semiconductors B.V. 2 2 in1 and in2 cinch inputs Farnell 152-396 3 2 out1 and out2 output connector Augat 5KEV-02 4 1 VDD, GND and VSS supply connector Augat 5KEV-03 5 2 L5 and L6 10 µH EP13 or 16RHBP (TOKO); note 1 6 4 L1, L2, L3 and L4 BEAD Murata BL01RN1-A62 7 1 S1 PCB switch Knitter ATE1E M-O-M 8 1 Z1 5V6 BZX 79C5V6 DO-35 9 2 C1 and C2 470 µF; 35 V Panasonic M series ECA1VM471 10 3 C3, C4 and C5 47 µF; 63 V Panasonic NHG series ECA1JHG470 11 6 C16, C17, C18 and C19 470 nF; 63 V MKT EPCOS B32529- 0474- K 12 9 C8, C9, C11, C14, C28, C29, C32, C35 and C38 220 nF; 63 V SMD 1206 13 10 C6, C7, C10, C12, C13, C15, C34, C36, C37 and C39 100 nF; 50 V SMD 0805 14 2 C20 and C21 330 pF; 50 V SMD 0805 15 4 C22, C23, C30 and C31 15 nF; 50 V SMD 0805 16 2 C24, C25 560 pF; 100 V SMD 0805 17 1 C33 47 pF; 25V SMD 0805 18 2 R3 and R4 39 kΩ; 0.1 W SMD 0805 19 1 R5 30 kΩ; 0.1 W SMD 1206 20 1 R1 10 kΩ; 0.1 W; optional SMD 0805 21 1 R2 9.1 kΩ; 0.1 W; optional SMD 0805 22 4 R6, R7, R8 and R9 5.6 kΩ; 0.1 W SMD 0805 23 2 R12 and R13 22 Ω; 1 W SMD 2512 24 2 R10 and R11 4.7 Ω; 0.25 W SMD 1206 25 2 C26 and C27 1 µF; 63V MKT 26 1 heatsink SK 174 50 mm (5 K/W) Fisher elektronik 27 1 printed-circuit board material 1.6 mm thick epoxy FR4 material, dual-sided 35 µm copper; clearances 300 µm; minimum copper track 400 µm REFERENCE PART DESCRIPTION Note 1. EP13 or 16RHBP inductors have been used in the first demo boards. In these boards, they functioned properly. However current rating basically is too low. A better choice is the new TOKO DASM 998AM-105 inductor. 2003 Jul 28 21 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 16.12 Curves measured in the reference design The curves illustrated in Figs 29 and 30 show the effects of supply pumping when only one single-ended channel is driven with a low frequency signal; see Section 16.7. The curves illustrated in Figs 19 and 20 are measured with a restive load impedance. Spread in RL (e.g. due to the frequency characteristics of the loudspeaker) can trigger the maximum current protection circuit; see Section 16.6. MDB541 102 handbook, halfpage MDB542 102 handbook, halfpage THD + N (%) THD + N (%) 10 10 1 1 10−1 10−1 (1) (1) (2) (2) 10−2 10−3 10−2 10−2 (3) 10−1 1 10 102 Po (W) 10−3 103 10 103 104 105 fi (Hz) 2 × 2 Ω SE; VP = ±24 V. (1) fi = 10 kHz. (2) fi = 1 kHz. 2 × 2 Ω SE; VP = ±24 V. (1) Po = 10 W. (2) Po = 1 W. (3) fi = 100 Hz. Fig.11 THD + N as a function of output power. 2003 Jul 28 102 Fig.12 THD + N as a function of input frequency. 22 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 MDB543 102 handbook, halfpage MDB544 102 handbook, halfpage THD + N (%) THD + N (%) 10 10 1 1 10−1 10−1 (1) (1) (2) (2) 10−2 10−2 (3) 10−3 10−2 10−1 1 10 102 Po (W) 10−3 103 10 102 103 104 105 fi (Hz) 1 × 4 Ω BTL; VP = ±24 V. (1) fi = 10 kHz. 1 × 4 Ω BTL; VP = ±24 V. (1) Po = 10 W. (2) Po = 1 W. (2) fi = 1 kHz. (3) fi = 100 Hz. Fig.13 THD + N as a function of output power. Fig.14 THD + N as a function of input frequency. MDB546 50 MDB548 60 handbook, halfpage handbook, halfpage Pdiss (1) (W) 40 Pdiss (2) (W) (1) (2) (3) 40 30 (4) (3) 20 20 10 0 10−2 10−1 1 10 0 10−2 102 103 Po (W) VP = ±25 V. VP = ±24 V. (3) (4) VP = ±22 V. VP = ±20 V. Fig.15 Total power dissipation as function of output power. 2003 Jul 28 1 10 102 103 Po (W) 1 × 4 Ω BTL. (1) VP = ±25 V. (2) VP = ±24 V. (3) VP = ±20 V. 1 × 2 Ω SE; dissipation per channel. (1) (2) 10−1 Fig.16 Total power dissipation as function of output power. 23 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 MDB547 100 handbook, halfpage η (%) 80 η (1) (2) (3) (%) 80 60 60 40 40 20 20 0 0 0 50 100 Po (W) 0 150 VP = ±20 V. VP = ±22 V. (3) (4) 100 200 Po (W) 300 1 × 4 Ω BTL; 2 × 10 µH; 2 × 1 µF. (1) VP = ±20 V. 2 × 2 Ω SE; 10 µH; 1 µF. (1) (2) MDB549 100 handbook, halfpage (1) (2) (3) (4) VP = ±24 V. VP = ±25 V. (2) (3) Fig.17 Efficiency as a function of output power. VP = ±24 V. VP = ±25 V. Fig.18 Efficiency as a function of output power. MDB553 300 handbook, halfpage MDB552 250 Po handbook, halfpage (W) Po (W) 200 (1) 250 (1) 200 150 150 (2) (2) 100 100 50 50 0 0 10 20 0 30 VDD (V) 0 10 20 VDD (V) 30 THD + N = 10 %; fi = 1 kHz. (1) 1 × 4 Ω BTL. (2) 2 × 2 Ω SE. THD + N = 0.5 %; fi = 1 kHz. (1) 1 × 4 Ω BTL. (2) 2 × 2 Ω SE. Fig.19 Output power as a function of supply voltage. Fig.20 Output power as a function of supply voltage. 2003 Jul 28 24 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 MDB545 0 MDB556 45 handbook, halfpage handbook, halfpage (dB) Gv (dB) 40 αcs −20 −40 35 (1) (1) (2) −60 30 −80 (2) (3) 25 −100 20 10 102 103 104 105 10 102 103 104 105 fi (Hz) fi (Hz) 2 × 2 Ω SE; VP = ±24 V. (1) Po = 10 W. (2) Po = 1 W. Vi = 100 mV; Rs = 5.6 kΩ Ci = 330pF. (1) 1 × 8 Ω BTL; Vp = ±15 V. (2) 2 × 8 Ω SE; Vp = ±20 V. (3) 2 × 4 Ω SE; Vp = ±15 V. Fig.21 Channel separation as a function of input frequency. Fig.22 Gain as a function of input frequency. MDB549 100 MDB557 45 handbook, halfpage handbook, halfpage η Gv (dB) 40 (1) (2) (3) (%) 80 (1) 60 35 40 30 (2) (3) 20 25 0 0 100 200 Po (W) 20 300 10 103 104 105 fi (Hz) 1 × 4 Ω BTL; 2 × 10 µH; 2 × 1 µF. (1) VP = ±20 V. (2) VP = ±24 V. (3) VP = ±25 V. Vi = 100 mV; Rs = 0. (1) 1 × 8 Ω BTL; Vp = ±15 V. (2) 2 × 8 Ω SE; Vp = ±20 V. (3) 2 × 4 Ω SE; Vp = ±15 V. Fig.23 Efficiency as a function of output power. 2003 Jul 28 102 Fig.24 Gain as a function of input frequency. 25 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 MDB554 120 Iq MDB555 330 handbook, halfpage handbook, halfpage (mA) 100 fclk (kHz) 320 80 60 310 40 300 20 0 0 10 20 30 VDD (V) 290 40 0 5 10 15 20 25 30 35 VDD (V) RL is open-circuit. RL is open-circuit. Fig.25 Quiescent current as a function of supply voltage. Fig.26 Clock frequency as a function of supply voltage. MDB562 0 MDB563 0 handbook, halfpage handbook, halfpage SVRR (dB) SVRR (dB) −20 −20 −40 −40 (1) −60 (2) (1) −60 (2) (3) (3) −80 −80 −100 10 102 103 104 −100 105 fi (Hz) VP = ±20 V; Vripple = 2 V (p-p) with respect to ground. (1) Both supply lines in phase. 1 2 3 4 5 Vripple(p-p) VP = ±20 V; Vripple = 2 V (p-p) with respect to ground. (1) fripple = 1 kHz. (2) fripple = 100 Hz. (3) fripple = 10 Hz. (2) Both supply lines in anti-phase. (3) One supply line rippled. Fig.27 SVRR as a function of input frequency. 2003 Jul 28 0 Fig.28 SVRR as a function of Vripple(p-p). 26 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 MDB550 10 MDB551 10 handbook, halfpage handbook, halfpage Vripple(p-p) (V) 8 Vripple(p-p) (V) 8 6 6 4 4 2 2 0 10−2 0 10−1 1 102 10 102 10 103 Po (W) fi (Hz) 104 1 × 2 Ω SE; VP = ±24 V; fi = 10 Hz; 6300 µF per supply line. VP = ±24 V; Po = 40 W into 1 × 2 Ω SE; 6300 µF per supply line. Fig.29 Supply voltage ripple as a function of output power. Fig.30 Supply voltage ripple as a function of input frequency. MDB559 10 MDB558 10 handbook, halfpage handbook, halfpage THD + N (%) THD + N (%) 1 1 (1) 10−1 (1) 10−1 (2) (3) (2) 10−2 10−3 100 200 300 400 10−3 100 500 600 fclk (kHz) VP = ±24 V; Po = 10 W into 2 Ω. (1) fi = 10 kHz. (2) fi = 100 Hz. (3) fi = 1 kHz. 200 300 400 500 600 fclk (kHz) VP = ±24 V; Po = 1 W into 2 Ω. (1) fi = 10 kHz. (2) fi = 1 KHz. (3) fi = 100 Hz. Fig.31 THD + N as a function of clock frequency. 2003 Jul 28 (3) 10−2 Fig.32 THD +N as a function of clock frequency. 27 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 MDB561 250 Iq MDB564 1500 handbook, halfpage handbook, halfpage (mA) Vres (mV) 200 1000 150 100 500 50 0 100 200 300 400 0 100 500 600 fclk (kHz) 200 300 400 500 600 fclk (kHz) VP = ±24 V; RL = open-circuit. VP = ±24 V; RL = 2 Ω. Fig.33 Quiescent current as a function of clock frequency. Fig.34 PWM residual voltage as a function of clock frequency. MDB560 150 MDB565 10 handbook, halfpage handbook, halfpage Vo (V) 1 Po (W) 10−1 100 10−2 10−3 50 10−4 10−5 0 100 10−6 200 300 400 500 600 fclk (kHz) 0 2 4 6 Vmode (V) VP = ±24 V; RL = 2 Ω; fi = 1 kHz; THD + N = 10 %. Vi = 100 mV; fi = 1 kHz. Fig.35 Output power as a function of clock frequency. Fig.36 Output voltage as a function of mode voltage. 2003 Jul 28 28 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 MDB566 120 S/N (dB) 100 handbook, halfpage (1) 80 (2) 60 40 20 0 10−2 10−1 1 10 102 Po (W) 103 VP = ±20 V; Rs = 5.6 kΩ; 20 kHz AES17 filter. (1) 2 × 8 Ω SE. (2) 1 × 8 Ω BTL. Fig.37 Signal-to-noise ratio as a function of output power. 2003 Jul 28 29 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 3 +25 V STABI PROT VDDA2 VDDA1 10 18 13 VDDP2 VDDP1 23 14 15 BOOT1 RFB IN1− 9 Vin1 RELEASE1 INPUT STAGE IN1+ 8 SGND1 11 SGND PWM MODULATOR SWITCH1 CONTROL AND ENABLE1 HANDSHAKE mute COSC DRIVER HIGH 16 OUT1 DRIVER LOW STABI VSSP1 Philips Semiconductors VDDA 2 × 120 W class-D power amplifier handbook, full pagewidth 2003 Jul 28 VDDP VDDA OSC 7 30 VSSA ROSC Vmode OSCILLATOR MODE 6 SGND2 2 SGND MANAGER IN2− 4 TDA8924 VDDP2 MODE 22 BOOT2 ENABLE2 mute IN2+ 5 Vin2 TEMPERATURE SENSOR CURRENT PROTECTION INPUT STAGE 1 12 VSSA2 VSSA1 PWM MODULATOR RFB CONTROL SWITCH2 AND HANDSHAKE RELEASE2 24 VSSD SGND 0V DRIVER HIGH 21 OUT2 DRIVER LOW 19 HW 17 VSSP1 20 VSSP2 −25 V VSSA MDB571 TDA8924 Fig.38 Typical application schematic of TDA8924. VSSP Objective specification VSSA VSSA Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 17 PACKAGE OUTLINE HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3 E D A x X c E2 y HE v M A D1 D2 12 1 pin 1 index Q A A2 E1 (A3) A4 θ Lp detail X 24 13 Z w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A2 max. 3.5 3.5 3.2 A3 0.35 A4(1) D1 D2 E(2) E1 E2 e HE Lp Q +0.08 0.53 0.32 16.0 13.0 −0.04 0.40 0.23 15.8 12.6 1.1 0.9 11.1 10.9 6.2 5.8 2.9 2.5 1 14.5 13.9 1.1 0.8 1.7 1.5 bp c D(2) v w x y 0.25 0.25 0.03 0.07 Z θ 2.7 2.2 8° 0° Notes 1. Limits per individual lead. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA ISSUE DATE 03-02-18 03-07-23 SOT566-3 2003 Jul 28 EUROPEAN PROJECTION 31 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 To overcome these problems the double-wave soldering method was specifically developed. 18 SOLDERING 18.1 Introduction to soldering surface mount packages If wave soldering is used the following conditions must be observed for optimal results: This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 18.2 – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering The footprint must incorporate solder thieves at the downstream end. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 270 °C depending on solder paste material. The top-surface temperature of the packages should preferably be kept: Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or Pb-free respectively. • below 220 °C (SnPb process) or below 245 °C (Pb-free process) A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. – for all BGA and SSOP-T packages 18.4 – for packages with a thickness ≥ 2.5 mm Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. – for packages with a thickness < 2.5 mm and a volume ≥ 350 mm3 so called thick/large packages. • below 235 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. 18.3 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. 2003 Jul 28 Manual soldering 32 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier 18.5 TDA8924 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE(1) WAVE BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA not suitable suitable(4) DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not PLCC(5), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP REFLOW(2) suitable suitable suitable not recommended(5)(6) suitable not recommended(7) suitable Notes 1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. 4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2003 Jul 28 33 Philips Semiconductors Objective specification 2 × 120 W class-D power amplifier TDA8924 19 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 20 DEFINITIONS 21 DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Jul 28 34 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA75 © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/01/pp35 Date of release: 2003 Jul 28 Document order number: 9397 750 11493