INTEGRATED CIRCUITS IN2 GND2 4 3 OUT2 2 VCC 1 AMP2 AMP1 5 ENABLE 6 IN1 7 GND1 8 OUT1 SA5200 RF dual gain-stage Product Specification Replaces data of Oct 10 1991 IC17 Data Handbook Philips Semiconductors 1997 Nov 07 Philips Semiconductors Product specification RF dual gain-stage SA5200 DESCRIPTION PIN CONFIGURATION The SA5200 is a dual amplifier with DC to 1200MHz response. Low noise (NF = 3.6dB) makes this part ideal for RF front-ends, and a simple power-down mode saves current for battery operated equipment. Inputs and outputs are matched to 50Ω. D Package The enable pin allows the designer the ability to turn the amplifiers on or off, allowing the part to act as an amplifier as well as an attenuator. This is very useful for front-end buffering in receiver applications. VC 1 8 OUT1 C OUT2 2 7 GND1 GND2 3 6 IN1 IN2 4 5 ENABLE FEATURES SR00166 • Dual amplifiers • DC - 1200MHz operation • Low DC power consumption (4.2mA per amplifier @ VCC = 5V) • Power-Down Mode (ICC = 95µA typical) • 3.6dB noise figure at 900MHz • Unconditionally stable • Fully ESD protected • Low cost Figure 1. Pin Configuration • Supply voltage 4-9V • Gain S21 = 7dB at f = 1GHz • Input and output match S11, S22 typically <–14dB APPLICATIONS • Cellular radios • RF IF strips • Portable equipment ORDERING INFORMATION DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG # –40-+85°C SA5200D SOT96-1 8-Pin Plastic Small Outline (Surface–mount) BLOCK DIAGRAM IN2 4 GND2 OUT2 3 2 VCC 1 AMP2 AMP1 5 ENABLE 6 7 IN1 GND1 8 OUT1 SR00167 Figure 2. Block Diagram RECOMMENDED OPERATING CONDITIONS SYMBOL RATING UNITS Supply voltage 4.0 to 9.0 V TA Operating ambient temperature range SA Grade -40 to +85 °C TJ Operating junction temperature SA Grade -40 to +105 °C VCC 1997 Nov 07 PARAMETER 5–2 853-1578 18662 Philips Semiconductors Product specification RF dual gain-stage SA5200 ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER voltage1 RATING UNITS VCC Supply -0.5 to +9 V PD Power dissipation, TA = 25°C (still air)2 8-Pin Plastic SO 780 mW TJMAX Maximum operating junction temperature 150 °C PMAX Maximum power input/output +20 dBm TSTG Storage temperature range –65 to +150 °C NOTE: 1. Transients exceeding 10.5V on VCC pin may damage product. 2. Maximum dissipation is determined by the operating ambient temperature and the thermal resistance, θJA: 8-Pin SO: θJA = 158°C/W DC ELECTRICAL CHARACTERISTICS VCC = +5V, TA = 25°C; unless otherwise stated. SYMBOL VCC PARAMETER TEST CONDITIONS Supply voltage VCC = 5V, ENABLE = High ICC Total supply current LIMITS MAX UNITS MIN TYP 4 5.0 9.0 V 6.4 8.4 10.4 mA VCC = 5V, ENABLE = Low 95 255 µA VCC = 9V, ENABLE = High 17.8 22.2 mA 320 960 µA VCC = 9V, ENABLE = Low VT TTL/CMOS logic threshold voltage1 VIH Logic 1 level Power-up mode 2.0 VCC VIL Logic 0 level Power-down mode -0.3 0.8 V IIL Enable input current Enable = 0.4V -1 1 µA IIH Enable input current Enable = 2.4V VIDC,ODC 1.25 Input and output DC levels V 0 V -1 0 1 µA 0.6 0.83 1.0 V NOTE: 1. The ENABLE input must be connected to a valid logic level for proper operation of the SA5200. AC ELECTRICAL CHARACTERISTICS1 VCC = +5V, TA = 25°C, either amplifier, enable = 5V; unless otherwise stated. SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN TYP MAX 13.2 f = 100MHz 9.2 11 f = 900MHz 5.2 7.5 UNITS S21 Insertion gain dB S22 Output return loss f = 900MHz –14.3 dB S12 Reverse isolation f = 900MHz –17.9 dB S11 Input return loss f = 900MHz –16.5 dB P-1 Output 1dB compression point f = 900MHz –4.3 dBm NF Noise figure in 50Ω f = 900MHz 3.6 dB IP2 Input second-order intercept point f = 900MHz +4.3 dBm dBm IP3 Input third-order intercept point f = 900MHz –1.8 ISOL Amplifier-to-amplifier isolation2 f = 900MHz –25 dB POUT Saturated output power f = 900MHz –1.7 dBm S21 Insertion gain when disabled f = 100MHz –13 f = 900MHz –13.5 NOTE: 1. All measurements include the effects of the SA5200 Evaluation Board (see Figure 4). Measurement system impedance is 50Ω. 2. Input applied to one amplifier, output taken at the other output. All ports terminated into 50Ω. 1997 Nov 07 5–3 dB Philips Semiconductors Product specification RF dual gain-stage SA5200 SA5200 finds applications in many areas of RF communications. It is an ideal gain block for high performance, low cost, low power RF communications transceivers. A typical radio transceiver front-end is shown in 6. This could be the front-end of a cellular phone, a VHF/ UHF hand-held transceiver, UHF cordless telephone or a spread spectrum system. The SA5200 can be used in the receiver path of most systems as an LNA and pre-amplifier. The bandpass filter between the two amplifiers also minimize the noise into the first mixer. In the transmitter path, SA5200 can be used as a buffer to the VCO and isolate the VCO from any load variations due to the power level changes in the power amplifier. This improves the stability of the VCOs. The SA5200 can also be used as a pre-driver to the power amplifier modules. APPLICATIONS SA5200 is a user-friendly, wide-band, unconditionally stable, low power dual gain amplifier circuit. There are several advantages to using the SA5200 as a high frequency gain block instead of a discrete implementation. First is the simplicity of use. The SA5200 does not need any external biasing components. Due to the higher level of integration and small footprint (SO8) package it occupies less space on the printed circuit board and reduces the manufacturing cost of the system. Also the higher level of integration improves the reliability of the amplifier over a discrete implementation with several components. The power down mode in the SA5200 helps reduce power consumption in applications where the amplifiers can be disabled. And last but not the least is the impedance matching at inputs and outputs. Only those who have toiled through discrete transistor implementations for 50Ω input and output impedance matching can truly appreciate the elegance and simplicity of the SA5200 input and output impedance matching to 50Ω. The two amplifiers in SA5200 can be easily cascaded to have a 13dB gain block at 900MHz. At 100MHz the gain will be 22dB and a noise figure of about 5.5dB. The SA5200 can be operated at a higher voltage up to 9V for much improved 1dB output compression point and higher 3rd order intercept point. A simplified equivalent schematic is shown in 3. Each amplifier is composed of an NPN transistor with an Ft of 13GHz in a classical series-shunt feedback configuration. The two wideband amplifiers are biased from the same bias generator. In normal operation each amplifier consumes about 4mA of quiescent current (at VCC = 5V). In the disable mode the device consumes about 90µA of current, most of it is in the TTL enable buffer and the bias generator. The input impedance of the amplifiers is 50Ω. The amplifiers have typical gain of 11dB at 100MHz and 7dB of gain at 1.2GHz. Several stages of SA5200 can also be cascaded and be used as an IF amplifier strip for DBS/TV/GPS receivers. 7 shows a 60dB gain IF strip at 180MHz. The noise figure for the cascaded amplifier chain is given by equation 1. It can be seen from 3 that any inductance between Pin 7, 3 and the ground plane will reduce the gain of the amplifiers at higher frequencies. Thus proper grounding of Pins 7 and 3 is essential for maximum gain and increased frequency response. 4 shows the printed circuit board layout and the component placement for the SA5200 evaluation board. The AC coupling capacitors should be selected such that at they are shorts at the desired frequency of operation. Since most low-cost large value surface mount capacitors cease to be simply capacitors in the UHF range and exhibit an inductive behavior, it is recommended that high frequency chip capacitors be utilized in the circuit. A good power supply bypass is also essential for the performance of the amplifier and should be as close to the device as practical. Since the noise figure for each stage is about 3.6dB and the gain is about 11dB, the noise figure for the 60dB gain IF strip will be about 6.4dB. 5 shows the typical frequency response of the two channels of SA5200. The low frequency gain is about 11dB at 100MHz and slowly drops off to 10dB at 500MHz. The gain is about 8dB at 900MHz and 7dB at 1.2 GHz which is typical of SA5200 with a good printed circuit board layout. It can also be seen that both channels have a very well matched frequency response and matched gain to within 0.1dB at 100MHz and 0.2dB at 900MHz. The ENABLE pin can also be used to improve the system dynamic range. For input levels that are extremely high, the SA5200 can be disabled. In this case the input signal is attenuated by 13dB. This prevents the system from being overloaded as well as improves the system’s overall dynamic range. In the disabled condition the SA5200 IP3 increases to nearly +20dBm. 1997 Nov 07 NF (total) = NF1 + NF2/G1 + NF3/G1*G2 + NF4/G1*G2*G3 + ... (Equation. 1) NOTE: The noise figure and gain should not be in dB in the above equation. In applications where a single amplifier is required with a 7.5dB gain at 900MHz and current consumption is of paramount importance (battery powered receivers), the amplifier A1 can be used and amplifier A2 can be disabled by leaving GND2 (Pin 3) unconnected. This will reduce the total current consumption for the IC to a meager 4mA. The ENABLE pin is useful for Time-Division-Duplex systems where the receiver can be disabled for a period of time. In this case the overall system supply current will be decreased by 8mA. 5–4 Philips Semiconductors Product specification RF dual gain-stage SA5200 PIN 1 PIN 5 GND1 BIAS GENERATOR ENABLE RF VCC RC RF PIN 8 RC OUT1 PIN 2 OUT2 PIN 6 PIN 4 IN1 IN2 RE RE AMP1 AMP2 PIN 7 PIN 3 GND1 GND2 SR00168 Figure 3. Simplified Equivalent Schematic of SA5200 SR00169 Figure 4. Printed Circuit Board Layout of the SA5200 Evaluation Board 1997 Nov 07 5–5 Philips Semiconductors Product specification RF dual gain-stage SA5200 SR00170 Figure 5. Typical Frequency Response of SA5200 in a 50Ω System FILTER IF OUT ANTENNA NE5200 ENABLE Rx DUPLEX FILTER LO NE602A NE5200 POWER AMP VCO FILTER ENABLE Tx MODULATION Figure 6. Typical Radio Transceiver Front-End 1997 Nov 07 5–6 SR00171 Philips Semiconductors Product specification RF dual gain-stage SA5200 NE5200 IF IN NE5200 NE5200 IF OUT IF OUT SR00172 Figure 7. 60dB IF Gain Block for 100-300MHz IF for GPS/DBS Systems -5 20 18 4V -10 16 5V 6V 14 S 11 (dB) I CC (mA) 7V 12 -15 +85°C 9V 10 –40°C 8 -20 6 TA = +25°C 4 -25 4 5 6 7 8 VCC (V) 9 10 100 1000 FREQUENCY (MHz) SR00173 Figure 8. Supply Current vs Supply Voltage and Temperature 2000 SR00174 Figure 10. Input Match vs Frequency and VCC -8 500 450 +85°C -10 400 +25°C 350 -12 -40°C +85°C S 11 (dB) I CC ( µA) 300 250 +25°C -14 200 -16 150 –40°C 100 -18 50 VCC = 5V 0 -20 4 5 6 7 8 9 10 VCC (V) SR00175 Figure 9. Disabled Supply Current vs VCC and Temperature 1997 Nov 07 100 FREQUENCY (MHz) 1000 2000 SR00176 Figure 11. Input Match vs Frequency and Temperature 5–7 Philips Semiconductors Product specification RF dual gain-stage SA5200 14 12 -40°C +25°C 9V 7V 12 +85°C 6V 10 5V 10 4V 8 S 21 (dB) S 21 (dB) 8 6 6 4 4 2 2 TA = +25°C VCC = 5V 0 0 10 100 1000 2000 10 100 FREQUENCY (MHz) 1000 FREQUENCY (MHz) Figure 12. Insertion Gain vs Frequency and VCC 2000 SR00180 SR00177 Figure 14. Insertion Gain vs Frequency and Temperature 10 10 9.5 9.5 9V 9 7V 9 8.5 6V -40°C 8 5V S 21 (dB) S21 (dB) 8.5 8 4V +25°C 7.5 +85°C 7 7.5 6.5 7 6 6.5 5.5 VCC = 5V TA = +25°C 5 6 800 850 900 950 1000 1050 1100 1150 1200 800 FREQUENCY (MHz) Figure 13. Insertion Gain vs Frequency and VCC — Expanded Detail — 1997 Nov 07 850 900 950 1000 1050 FREQUENCY (MHz) SR00178 1100 1150 1200 SR00179 Figure 15. Insertion Gain vs Frequency and Temperature – Expanded Detail – 5–8 Philips Semiconductors Product specification RF dual gain-stage SA5200 12 -10 9V 11 7V 6V 10 -15 5V 9 4V S 22 (dB) S 21 (dB) 8 CH1 7 -20 6 CH2 5 -25 4 VCC = 5V TA = +25°C 3 TA = +25°C 2 -30 10 100 1000 2000 10 100 FREQUENCY (MHz) 1000 FREQUENCY (MHz) SR00181 Figure 16. Insertion Gain Matching (CH1 vs CH2) vs Frequency 2000 SR00182 Figure 18. Output Match vs Frequency and VCC -10 -10 +85°C -12 -12 +25°C -14 S 12 (dB) -14 S 22 (dB) -40°C -16 -16 +85°C -18 -18 VCC = 5V -20 +25°C -20 VCC = 5V -40°C -22 10 100 1000 -22 2000 10 FREQUENCY (MHz) SR00183 Figure 17. Reverse Insertion Gain vs Frequency and Temperature 1997 Nov 07 100 FREQUENCY (MHz) 1000 2000 SR00184 Figure 19. Output Match vs Frequency and Temperature 5–9 Philips Semiconductors Product specification RF dual gain-stage SA5200 0 -0 S11 S22 -20 -10 -40 S12 S21 -15 ENABLED S 21 (dB) S (dB) -5 -60 DISABLED -80 -20 VCC = 5V VCC = 5V TA = +25°C TA = +25°C -100 -25 10 100 1000 10 2000 100 1000 2000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 20. S-parameters vs Frequency for Disabled Amplifier Figure 22. CH1 Input to CH2 Output Isolation vs Frequency -10 4 3.9 CH2 TA = +25°C CH1 3.8 -15 NF (dB) S 21 (dB) 3.7 3.6 3.5 -20 4V 3.4 VCC = 5V TA = +25°C 9V 3.3 5V 6V & 7V -25 10 100 1000 3.2 2000 10 FREQUENCY (MHz) 100 1000 2000 FREQUENCY (MHz) Figure 21. Insertion Gain Matching Disabled (CH1 vs CH2) vs Frequency 1997 Nov 07 Figure 23. Noise Figure vs Frequency and VCC in a 50Ω System 5–10 Philips Semiconductors Product specification RF dual gain-stage SA5200 5 16 TA = +25°C 100MHz 14 9V 500MHz 12 (dBm) 6V 10 900MHz 8 DISABLED IP3 (dBm) 7V P-1 0 6 -5 5V 4 2 4V TA = +25°C -10 0 10 100 1000 FREQUENCY (MHz) 2000 4 5 6 7 8 VCC (V) SR00185 Figure 24. 1dB Output Compression Point vs Frequency and VCC 9 SR00186 Figure 26. Third-Order Output Intercept vs Frequency and VCC 20 5 DISABLED 9V 15 7V 6V 0 (dBm) PSAT (dBm) 10 IP3 5V 5 4V -5 0 f = 900MHz TA = +25°C TA = +25°C -5 -10 10 100 FREQUENCY (MHz) 1000 4 2000 6 7 VCC (V) SR00187 Figure 25. Saturated Output Power vs Frequency and VCC 1997 Nov 07 5 8 9 SR00188 Figure 27. Third-Order Input Intercept vs Frequency and VCC 5–11 Philips Semiconductors Product specification RF dual gain-stage SA5200 25 25 DISABLED 15 15 IP2 IP 2 (dBm) 20 (dBm) 20 900MHz 10 10 DISABLED 500MHz 5 5 TA = +25°C 100MHz f = 900MHz TA = +25°C 0 0 4 5 6 7 VCC (V) 8 4 9 5 6 7 VCC (V) SR00191 Figure 28. Second-Order Output Intercept vs Frequency and VCC 8 9 SR00190 Figure 30. Second-Order Input Intercept vs Frequency and VCC ENABLE ENABLE ENABLE OUT OUT OUT SR00189 SR00192 Figure 29. Switching Speed; fIN = 10MHz at –26dBm, VDD = 5V, Coupling Capacitors Set to 0.01µF 1997 Nov 07 Figure 31. Switching Speed; fIN = 50MHz at –26dBm, VDD = 5V, Coupling Capacitors Set to 100pF 5–12 Philips Semiconductors Product specification RF dual gain-stage SA5200 SO8: plastic small outline package; 8 leads; body width 3.9mm 1997 Nov 07 13 SOT96-1 Philips Semiconductors Product specification RF dual gain-stage SA5200 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 1997 Nov 07 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. Copyright Philips Electronics North America Corporation 1993 All rights reserved. Printed in U.S.A. 14