IRF IRHLNA797064

PD-97174A
2N7622U2
IRHLNA797064
60V, P-CHANNEL
RADIATION HARDENED
LOGIC LEVEL POWER MOSFET
SURFACE MOUNT (SMD-2)
TECHNOLOGY
™
Product Summary
Part Number
Radiation Level
IRHLNA797064 100K Rads (Si)
RDS(on)
0.015Ω
ID
-56A*
IRHLNA793064
0.015Ω
-56A*
300K Rads (Si)
SMD-2
International Rectifier’s R7TM Logic Level Power
MOSFETs provide simple solution to interfacing
CMOS and TTL control circuits to power devices in
space and other radiation environments. The
threshold voltage remains within acceptable
operating limits over the full operating temperature
and post radiation. This is achieved while maintaining
single event gate rupture and single event burnout
immunity.
These devices are used in applications such as
current boost low signal source in PWM, voltage
comparator and operational amplifiers.
Features:
n
n
n
n
n
n
n
n
n
n
5V CMOS and TTL Compatible
Fast Switching
Single Event Effect (SEE) Hardened
Low Total Gate Charge
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Ceramic Package
Surface Mount
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
ID @VGS = -4.5V,TC = 25°C
ID @VGS = -4.5V,TC = 100°C
IDM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Units
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current À
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy Á
Avalanche Current À
Repetitive Avalanche Energy À
Peak Diode Recovery dv/dt Â
Operating Junction
Storage Temperature Range
-56*
-56*
-224
250
2.0
±10
1060
-56
25
-3.7
-55 to 150
Pckg. Mounting Surface Temp.
Weight
300 (for 5s)
3.3 (Typical)
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
g
* Current is limited by package
For footnotes refer to the last page
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1
06/11/07
IRHLNA797064, 2N7622U2
Pre-Irradiation
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
BVDSS
Parameter
Min
Drain-to-Source Breakdown Voltage
-60
—
—
V
—
-0.06
—
V/°C
—
—
0.015
Ω
-1.0
—
82
—
—
—
4.1
—
—
—
-2.0
—
—
-1.0
-10
V
mV/°C
S
nA
∆BV DSS /∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
∆VGS(th)/∆TJ Gate Threshold Voltage Coefficient
gfs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Typ Max Units
IGSS
IGSS
Qg
Q gs
Q gd
td(on)
tr
td(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
-100
100
190
53
56
38
265
210
70
—
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
10520
2780
310
—
—
—
Rg
Gate Resistance
VGS = -4.5V, ID = -56A
Ã
VDS = VGS, ID = -250µA
nC
VDS = -15V, IDS = -56A Ã
VDS= -48V ,VGS=0V
VDS = -48V,
VGS = 0V, TJ = 125°C
VGS = -10V
VGS = 10V
VGS = -4.5V, ID = -56A
VDS = -30V
ns
VDD = -30V, ID = -56A,
VGS = -6.0V, RG = 2.35Ω
µA
nH
pF
Ω
2.3
Test Conditions
VGS = 0V, ID = -250µA
Reference to 25°C, ID = -1.0mA
Measured from the center of
drain pad to center of source pad
VGS = 0V, VDS = -25V
f = 1.0MHz
f = 1.0MHz, open drain
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
IS
ISM
VSD
t rr
Q RR
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
ton
Forward Turn-On Time
—
—
—
—
—
—
—
—
—
—
-56*
-224
-5.0
159
430
Test Conditions
A
V
ns
nC
Tj = 25°C, IS = -56A, VGS = 0V Ã
Tj = 25°C, IF = -56A, di/dt ≤ -100A/µs
VDD ≤ -25V Ã
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
* Current is limited by package
Thermal Resistance
Parameter
RthJC
RthJ-PCB
Junction-to-Case
Junction-to-PC board
Min Typ Max Units
—
—
—
1.6
0.5
—
°C/W
Test Conditions
soldered to a 2” square copper-cladboard
Note: Corresponding Spice and Saber models are available on International Rectifier Web site.
For footnotes refer to the last page
2
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Radiation Characteristics
Pre-Irradiation
IRHLNA797064, 2N7622U2
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation ÄÅ
Parameter
BVDSS
V GS(th)
IGSS
IGSS
IDSS
RDS(on)
RDS(on)
VSD
Upto 300K Rads (Si)1
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
Static Drain-to-Source „
On-State Resistance (TO-3)
Static Drain-to-Source On-state „
Resistance (SMD-2)
Diode Forward Voltage„
Units
Test Conditions
Min
Max
-60
-1.0
—
—
—
—
-2.0
-100
100
-10
µA
VGS = 0V, ID = -250µA
VGS = VDS , ID = -250µA
VGS = -10V
VGS = 10V
VDS = -48V, VGS=0V
—
0.015
Ω
VGS = -4.5V, ID = -56A
—
0.015
Ω
VGS = -4.5V, ID = -56A
—
-5.0
V
VGS = 0V, ID = -56A
V
nA
1. Part numbers IRHLNA797064, IRHLNA793064
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion
LET
Energy Range
2
(MeV/(mg/cm ))
(MeV)
(µm)
VDS (V)
@VGS=
@VGS= @VGS= @VGS= @VGS= @VGS= @VGS= @VGS=
2V
4V
5V
6V
7V
8V
10V
Br
I
37
60
305
370
39
34
-60
-60
-60
-60
-60
-60
-60
-40
-40
-20
-30
-
-25
-
-20
-
Au
82
390
30
-60
-60
-60
-
-
-
-
-
VDS
0V
-70
-60
-50
-40
-30
-20
-10
0
Br
I
Au
0
1
2
3
4
5
6
7
8
9 10
VGS
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHLNA797064, 2N7622U2
10000
10000
VGS
TOP
-10V
-7.5V
-5.0V
-4.5V
-3.5V
-3.0V
-2.5V
BOTTOM -2.25V
1000
1000
100
-2.25V
10
60µs PULSE WIDTH
Tj = 25°C
100
-2.25V
10
60µs PULSE WIDTH
Tj = 150°C
1
1
0.1
1
10
0.1
100
1
10
100
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
-I D, Drain-to-Source Current (A)
1.5
T J = 25°C
T J = 150°C
100
VDS = -25V
15
60µs PULSE
WIDTH
10
ID = -56A
1.0
VGS = -4.5V
0.5
2
2.5
3
3.5
-VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
VGS
-10V
-7.5V
-5.0V
-4.5V
-3.5V
-3.0V
-2.5V
BOTTOM -2.25V
TOP
-I D, Drain-to-Source Current (A)
-I D, Drain-to-Source Current (A)
Pre-Irradiation
4
-60 -40 -20
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRHLNA797064, 2N7622U2
30
RDS(on), Drain-to -Source On Resistance ( mΩ)
RDS(on), Drain-to -Source On Resistance (m Ω)
Pre-Irradiation
ID = -56A
25
20
TJ = 150°C
15
10
T J = 25°C
5
0
2
4
6
8
10
18
T J = 150°C
16
14
12
T J = 25°C
10
Vgs = -4.5V
8
12
0
20
-V GS, Gate -to -Source Voltage (V)
Fig 5. Typical On-Resistance Vs
Gate Voltage
60
80
100
Fig 6. Typical On-Resistance Vs
Drain Current
2.0
75
ID = -1.0mA
-VGS(th) Gate threshold Voltage (V)
-V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
40
-I D, Drain Current (A)
70
65
60
55
1.5
1.0
0.5
ID = -50µA
ID = -250µA
ID = -1.0mA
ID = -150mA
0.0
50
-60 -40 -20
0
20
40
60
80 100 120 140 160
TJ , Temperature ( °C )
Fig 7. Typical Drain-to-Source
Breakdown Voltage Vs Temperature
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-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Temperature ( °C )
Fig 8. Typical Threshold Voltage Vs
Temperature
5
IRHLNA797064, 2N7622U2
12000
C oss = C ds + C gd
12
Ciss
10000
8000
Coss
6000
VDS= -48V
VDS= -30V
VDS= -12V
ID = -56A
-VGS, Gate-to-Source Voltage (V)
14000
VGS = 0V,
f = 1 MHz
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
4000
2000
8
4
FOR TEST CIRCUIT
SEE FIGURE 17
Crss
0
1
10
0
100
0
50
-VDS, Drain-to-Source Voltage (V)
100
150
200
250
300
QG, Total Gate Charge (nC)
Fig 9. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 10. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
120
LIMITED BY PACKAGE
100
T J = 150°C
100
-ID , Drain Current (A)
-I SD , Reverse Drain Current (A)
C, Capacitance (pF)
16000
Pre-Irradiation
T J = 25°C
10
1
0.1
1
2
3
4
-V SD , Source-to-Drain Voltage (V)
Fig 11. Typical Source-to-Drain Diode
Forward Voltage
6
60
40
20
VGS = 0V
0
80
5
0
25
50
75
100
125
150
°
TC , Case Temperature (°C)
Fig12. Maximum Drain Current Vs.
Case Temperature
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Pre-Irradiation
IRHLNA797064, 2N7622U2
OPERATION IN THIS AREA
LIMITED BY R DS(on)
2400
EAS , Single Pulse Avalanche Energy (mJ)
-I D, Drain-to-Source Current (A)
1000
100µs
100
1ms
10
10ms
Tc = 25°C
Tj = 150°C
Single Pulse
1
ID
TOP
-25A
-35.4A
BOTTOM -56A
2000
1600
1200
800
400
0
1
10
100
25
-V DS , Drain-to-Source Voltage (V)
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 13. Maximum Safe Operating Area
Fig 14. Maximum Avalanche Energy
Vs. Drain Current
Thermal Response ( Z thJC )
1
D = 0.50
0.20
0.1
0.10
P DM
0.05
0.01
t1
SINGLE PULSE
( THERMAL RESPONSE )
0.02
t2
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 15. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRHLNA797064, 2N7622U2
Pre-Irradiation
I AS
L
VDS
-
D.U.T
RG
+
IAS
VGS
-20V
tp
VVDD
DD
A
DRIVER
0.01Ω
tp
15V
V(BR)DSS
Fig 16a. Unclamped Inductive Test Circuit
Fig 16b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
-4.5V
QGS
50KΩ
-12V
12V
.2µF
.3µF
QGD
+VDS
D.U.T.
VGS
VG
-3mA
IG
Charge
Fig 17a. Basic Gate Charge Waveform
V DS
VGS
RG
Fig 17b. Gate Charge Test Circuit
RD
td(on)
tr
t d(off)
tf
VGS
D.U.T.
10%
-
+
V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
8
ID
Current Sampling Resistors
V DD
90%
VDS
Fig 18b. Switching Time Waveforms
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Pre-Irradiation
IRHLNA797064, 2N7622U2
Footnotes:
À Repetitive Rating; Pulse width limited by
maximum junction temperature.
Á VDD = -25V, starting TJ = 25°C, L= 0.67mH
Peak IL = -56A, VGS = -10V
 ISD ≤ -56A, di/dt ≤ -380A/µs,
VDD ≤ -60V, TJ ≤ 150°C
à Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Ä Total Dose Irradiation with VGS Bias.
-10 volt VGS applied and VDS = 0 during
irradiation per MIL-STD-750, method 1019, condition A.
Å Total Dose Irradiation with VDS Bias.
-48 volt VDS applied and VGS = 0 during
irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions — SMD-2
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TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 06/2007
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9