PHILIPS TDA9183P

INTEGRATED CIRCUITS
DATA SHEET
TDA9183
Integrated NTSC comb filter
Objective specification
Supersedes data of 2000 Nov 22
File under Integrated Circuits, IC02
2000 Nov 30
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
FEATURES
GENERAL DESCRIPTION
• One-chip NTSC adaptive comb filter
The TDA9183 is a an adaptive NTSC comb filter with two
internal delay lines, filters, clock control and input clamps.
The NTSC M video standard is supported.
• Cross luminance reduction
• Cross colour reduction
• No chroma trap, therefore sharper vertical luminance
transients
Two CVBS input signals can be selected by means of an
input switch.
• Analog discrete-time signal processing, therefore no
quantization noise
• Input switch selects between two Y/CVBS inputs
The selected CVBS input signal is filtered to obtain
a combed luminance output signal and a combed
chrominance output signal. Switched capacitor circuit
techniques are used, requiring an internal clock, locked on
to the colour subcarrier frequency.
• Output switch selects between combed CVBS and an
external Y/C source
The colour subcarrier frequency as well as twice the colour
subcarrier frequency may be applied to the IC.
• Anti-aliasing and reconstruction filters are included
• fSC as well as 2 × fSC colour subcarrier signal may be
applied
In addition to the comb filter the circuit contains an output
switch so that a selection can be made between the
combed CVBS signal and an external Y/C signal.
• Alignment free
• Few external components
The IC is available in a DIP16 and SO16 package.
The supply voltage is 5 V.
• Low power.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
VCCA
analog supply voltage
4.5
5.0
5.5
V
ICCA
analog supply current
−
25
−
mA
VDDD
digital supply voltage
4.5
5.0
5.5
V
IDDD
digital supply current
−
10
−
mA
Vi(Y/CVBS)(p-p)
luminance or CVBS input signal voltage (peak-to-peak value)
0.7
1.0
1.4
V
Vi(CIN)(p-p)
chrominance input signal voltage (peak-to-peak value)
−
0.7
1.0
V
Vi(FSC)(p-p)
colour subcarrier input signal voltage (peak-to-peak value)
100
200
400
mV
Vo(Y/CVBS)(p-p)
luminance or CVBS output signal voltage (peak-to-peak value)
0.6
1.0
1.54
V
Vo(CIN)(p-p)
chrominance output signal voltage (peak-to-peak value)
−
0.7
1.1
V
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA9183P
DIP16
plastic dual in-line package; 16 leads (300 mil); long body
SOT38-4
TDA9183T
SO16
plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
2000 Nov 30
2
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6
INPSEL
Y/CVBS1
14
12
CLAMP
3
LPF
SC
LPF
CLAMP
16
TDA9183
3
CIN
Y/CVBSOUT
ADAPTIVE
COMB
FILTER
2H/4H
DELAY
LPF
Y/CVBS2
5
2
Philips Semiconductors
VDDD
Integrated NTSC comb filter
BLOCK DIAGRAM
2000 Nov 30
VCCA
handbook, full pagewidth
COUT
1
7
FILTER
TUNING
(LPFs)
SANDCASTLE
DETECTOR
10, 11
n.c.
4 × fsc
CLOCK GENERATOR
9
FSC
8
FSCSEL
4
15
AGND DGND OUTSEL
MGT535
Objective specification
TDA9183
Fig.1 Block diagram.
13
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
PINNING
SYMBOL
PIN
DESCRIPTION
CIN
1
chrominance signal input
INPSEL
2
input switch select input
Y/CVBS2
3
luminance or CVBS signal 2 input
DGND
4
digital ground
VDDD
5
digital supply voltage
VCCA
6
analog supply voltage
SC
7
sandcastle signal input
FSCSEL
8
colour subcarrier select input
FSC
9
colour subcarrier signal input
n.c.
10
not connected
n.c.
11
not connected
Y/CVBS1
12
luminance or CVBS signal 1 input
AGND
13
analog ground (signal reference)
Y/CVBSOUT
14
luminance or CVBS signal output
OUTSEL
15
output switch select input
COUT
16
chrominance signal output
handbook, halfpage
handbook, halfpage
CIN 1
16 COUT
INPSEL 2
13 AGND
14 Y/CVBSOUT
DGND 4
TDA9183P
13 AGND
TDA9183T
VDDD 5
12 Y/CVBS1
VDDD 5
12 Y/CVBS1
VCCA 6
11 n.c.
VCCA 6
11 n.c.
SC 7
10 n.c.
SC 7
10 n.c.
FSCSEL 8
9
FSCSEL 8
FSC
MGT536
9
FSC
MGT537
Fig.2 Pin configuration (DIP16).
2000 Nov 30
15 OUTSEL
Y/CVBS2 3
14 Y/CVBSOUT
DGND 4
16 COUT
INPSEL 2
15 OUTSEL
Y/CVBS2 3
CIN 1
Fig.3 Pin configuration (SO16).
4
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
FUNCTIONAL DESCRIPTION
Output configuration
Input configuration
The luminance output switch selects between the
reconstructed combed luminance signal and one of the
buffered and clamped input signals Y/CVBS1 or Y/CVBS2.
The chrominance output switch selects between the
reconstructed combed chrominance signal and the
chrominance input signal (CIN). An external coupling
capacitor is needed for CIN. The selected signals are
applied to the outputs Y/CVBSOUT and COUT respectively
via a buffer stage. The output switch signal (OUTSEL)
determines whether the output switches select the internal
combed signals or the external Y/C signals.
The Y/CVBS1 and Y/CVBS2 input signals are clamped by
means of an internally generated clamp pulse which is
derived from the sandcastle input signal (pin SC). If no
sandcastle signal is available, a clamp pulse signal may be
applied to pin SC. External clamp capacitors are needed.
The buffered and clamped Y/CVBS1 and Y/CVBS2 signals
are then applied to the input switch. The input switch select
signal (INPSEL) determines whether Y/CVBS1 or
Y/CVBS2 is passed through to the anti-alias low-pass filter.
This 3rd-order low-pass filter is optimized for best
performance with respect to step response and clock
suppression. The filtered signal is sampled at a clock
frequency of four times the colour subcarrier frequency
(fSC).
Clock generation and filter tuning
The clock generator is driven by a Phase-Locked Loop
(PLL) circuit which generates a reference frequency of four
times the colour subcarrier frequency. This PLL circuit is
phase-locked to the colour subcarrier input signal (FSC).
Several internal clock signals are derived from the 4 × fSC
reference.
A colour subcarrier frequency signal is applied to pin FSC.
The colour subcarrier select input signal (FSCSEL)
indicates whether the colour subcarrier frequency (fSC) or
twice the colour subcarrier frequency (2 × fSC) is being
applied at the FSC input. An external coupling capacitor is
needed for the colour subcarrier input signal.
The filter tuning ensures the automatic alignment of the
anti-alias and the reconstruction low-pass filters. A 4 × fSC
clock signal is used as a reference for the alignment. The
tuning takes place each line during the line blanking and is
initiated by means of an internally generated signal which
is derived from the sandcastle input signal.
Comb filter
The sampled CVBS signal is applied to two delay lines.
One delay line delays the signal over 1H (1H = one
line-time).
If the output switches select external Y/C signals the
oscillator of the PLL circuit is stopped regardless of the
FSC input and no internal clock signals are generated. The
filter tuning is also stopped.
The direct and delayed signals are applied to an adaptive
comb filter. The adaptive comb filter performs band-pass
filtering around the colour subcarrier frequency and
compares the contents of adjacent lines. In this way the
combing of signals with different information is prevented
and artifacts such as hanging dots are avoided.
Both the combed chrominance and the combed luminance
signal are passed through a reconstruction low-pass filter
to obtain continuous-time signals. These low-pass filters
are 3rd-order, optimized for best performance with respect
to step response and clock suppression. The
reconstructed signals are applied to the output switches.
2000 Nov 30
5
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
Mode definitions
Table 1
Table 4
General mode definitions; note 1
PIN OUTSEL
PIN INPSEL
MODE
LOW
COMB
HIGH
YC
YC
Y/CVBS1 or Y/CVBS2 signal
Y/CVBS2 input selected
comb filtered chrominance signal
YC
CIN signal
FSC INPUT SIGNAL FREQUENCY
LOW
fSC
HIGH
2 × fSC
1. If the FSCSEL pin is left open-circuit, the pin is pulled
LOW by means of an internal pull-down resistor to
analog ground (AGND). Thus the fSC mode can also
be selected by not connecting the FSCSEL pin.
COUT OUTPUT SIGNAL
COMB
FSC mode definitions; note 1
Note
COUT output signal definitions
2000 Nov 30
HIGH
PIN FSCSEL
Y/CVBSOUT OUTPUT SIGNAL
comb filtered luminance signal
MODE
Y/CVBS1 input selected
Table 5
Y/CVBSOUT output signal definitions
COMB
Table 3
LOW
1. If the INPSEL pin is left open-circuit, the pin is pulled
LOW by means of an internal pull-down resistor to
analog ground (AGND). Thus the Y/CVBS1 input can
also be selected by not connecting the INPSEL pin.
1. If the OUTSEL pin is left open-circuit, the pin is pulled
LOW by means of an internal pull-down resistor to
analog ground (AGND). Thus the COMB mode can
also be selected by not connecting the OUTSEL pin.
MODE
INPUT SWITCH MODE
Note
Note
Table 2
Input switch mode definitions; note 1
6
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDDD
digital supply voltage
−
5.5
V
VCCA
analog supply voltage
−
5.5
V
Vi(prot)(th)
input voltage protection threshold
−0.3
VDD + 0.3
V
Tstg
storage temperature
−25
+150
°C
Tamb
ambient temperature
−25
+70
°C
Tsol
soldering temperature
−
260
°C
Tj
junction temperature
Ves
electrostatic handling voltage
for 5 s
−
150
°C
HBM; all pins, except
pins 5 and 6; notes 1, 2 and 3
−3000
+3000
V
MM; all pins, except
pins 5 and 6; notes 1, 4 and 5
−300
+300
V
Notes
1. All pins are protected against ESD by means of internal clamping diodes.
2. Human Body Model (HBM): R = 1.5 kΩ; C = 100 pF.
3. Pins 5 (VDDD) and 6 (VCCA): HBM: −1500 V < Ves < +1500 V.
4. Machine Model (MM): R = 0 Ω; C = 200 pF.
5. Pins 5 (VDDD) and 6 (VCCA): MM: −150 V < Ves < +150 V.
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
VALUE
UNIT
TDA9183P
75
K/W
TDA9183T
95
K/W
thermal resistance from junction to ambient in free air
QUALITY SPECIFICATION
In accordance with “SNW-FQ-611E”.
Latch-up
At an ambient temperature of 70 °C all pins meet the following specification:
• Itrigger ≥ 100 mA or Vtrigger ≥ 1.5VDD(max)
• Itrigger ≤ −100 mA or Vtrigger ≤ −0.5VDD(max).
2000 Nov 30
7
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
CHARACTERISTICS
VCCA = VDDD = 5 V; Tamb = 25 °C; input signal Y/CVBS1 = 1 V (p-p); input signal Y/CVBS2 = 1 V (p-p); input signal
CIN = 0.7 V (p-p); input signal FSC = 200 mV (p-p) sine wave at fSC; input signal SC = 5 V (p-p) sandcastle signal; test
signal: 100% white 75% amplitude FCC colour bar; source impedance for Y/CVBS1 and Y/CVBS = 75 Ω; coupled with
10 nF; source impedance for CIN and FSC = 75 Ω; coupled with 100 nF; load impedance for CVBS/YOUT and
COUT = 15 pF to analog ground (pin AGND); all voltages are related to analog ground (pin AGND); unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VCCA
analog supply voltage
4.5
5.0
5.5
V
ICCA
analog supply current
−
25
−
mA
VDDD
digital supply voltage
4.5
5.0
5.5
V
IDDD
digital supply current
−
10
−
mA
P
power dissipation
−
175
−
mW
V
Luminance or CVBS input 1 and 2; pins Y/CVBS1 and Y/CVBS2
Vi(Y/CVBS)(p-p)
luminance or CVBS input
including sync
voltage (peak-to-peak value)
0.7
1.0
1.4
tclamp(Y/CVBS)
clamp time constant
Ii(Y/CVBS)
input current
−
20
−
lines
during clamping
−10
0
+10
µA
during active video
−10
0
+10
nA
Chrominance input; pin CIN
Vi(CIN)(p-p)
chrominance input voltage
(peak-to-peak value)
−
0.7
1.0
V
Ri(CIN)
input resistance
30
−
−
kΩ
100
200
400
mV
Colour subcarrier input; pin FSC
Vi(FSC)(p-p)
subcarrier input voltage
(peak-to-peak value)
D
duty cycle
Ri(FSC)
input resistance
square wave
40
50
60
%
30
−
−
kΩ
no clamping
−
−
3.3
V
clamping
3.7
−
−
V
Sandcastle input; pin SC
Vi(SC)
sandcastle input voltage
tW
pulse width
clamping; note 1
2.6
−
−
µs
tW(rep)
input pulse rising edge
position
with respect to the end
of line blanking; note 1
−
−
−2.6
µs
Ri(SC)
input resistance
1
−
−
MΩ
Ci(SC)
input capacitance
−
−
2
pF
Input switch select input; pin INPSEL
VIL
LOW-level input voltage
Y/CVBS1 selected
−
−
0.5
V
VIH
HIGH-level input voltage
Y/CVBS2 selected
2.0
−
−
V
Ri(INPSEL)
input resistance
100
−
−
kΩ
Ci(INPSEL)
input capacitance
−
−
2
pF
2000 Nov 30
8
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
SYMBOL
PARAMETER
TDA9183
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Output switch select input; pin OUTSEL
VIL
LOW-level input voltage
COMB mode
−
−
0.5
V
VIH
HIGH-level input voltage
YC mode
2.0
−
−
V
Ri(OUTSEL)
input resistance
100
−
−
kΩ
Ci(OUTSEL)
input capacitance
−
−
2
pF
Colour subcarrier select input; pin FSCSEL
VIL
LOW-level input voltage
fSC at FSC input; note 2 −
−
0.5
V
VIH
HIGH-level input voltage
2 × fSC at FSC input
2.0
−
−
V
Ri(FSCSEL)
input resistance
100
−
−
kΩ
Ci(FSCSEL)
input capacitance
−
−
2
pF
0.6
1.0
1.54
V
−1
0
+1
dB
Luminance output; pin Y/CVBSOUT
Vo(Y/CVBSOUT)(p-p)
luminance output signal
(peak-to-peak value)
EG(Y)
luminance gain error
B−3dB(Y)
−3 dB luminance bandwidth
including sync
COMB mode
5
−
−
MHz
YC mode
10
−
−
MHz
COMB mode; note 3
−
800
−
ns
td(proc)(Y)
luminance processing delay
Vclamp
voltage level during
clamping
Ebl
black level error
during blanking; note 4
S/N
luminance signal-to-noise
ratio (1 V/Vrms noise)
unweighted; 200 kHz to 56
5 MHz
αct
crosstalk between different
inputs
0 to 5 MHz
fclk(res)(Y)
residues of clock
COMB mode; note 2
frequencies in the luminance
f = 4 × fSC
signal (Vrms/1 V)
f = 2 × fSC
YC mode
f = 1.33 × fSC
αct
2000 Nov 30
FSC residue in YC mode
(Vrms/1 V)
crosstalk suppression at
vertical transient black ←→
multi-burst (1 V/V (p-p))
15
−
ns
1.5
−
V
−10
0
+10
mV
−
−
dB
−
−
−50
dB
−
−
−30
dB
−
−
−30
dB
−
−
−30
dB
−
−
−40
dB
f = fSC; fSC at FSC
input; note 2
−
−
−60
dB
f = 2 × fSC; 2 × fSC at
FSC input
−
−
−60
dB
−
−
dB
f = fSC
FSCres(YC)
−
−
vertical transition active 26
video ←→ vertical
blanking; note 5 and
Fig.5
9
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
SYMBOL
SUPcomb(Y)
PARAMETER
suppression (comb depth)
with respect to luminance
band-pass nearest to fSC
TDA9183
CONDITIONS
MIN.
TYP.
MAX.
UNIT
COMB mode; note 2
and Fig.6
f = fSC
227.5 – 59
f = --------------------------- × f SC
227.5
227.5 + 59
f = ---------------------------- × f SC
227.5
30
−
−
dB
−
10
−
dB
−
10
−
dB
Ro
output resistance
−
−
500
Ω
ZL
load impedance
−
−
15
pF
Chrominance output; pin COUT
Vo(COUT)(p-p)
chrominance output signal
(peak-to-peak value)
−
0.7
1.1
V
EG(chrom)
chrominance gain error
−1
0
+1
dB
B−3dB(chrom)
−3 dB chrominance
bandwidth
COMB mode; around
fSC; note 2
1.5
−
−
MHz
YC mode; base-band
10
−
−
MHz
∆t(proc)(Y)
difference with luminance
processing delay
−
0
20
ns
VDC
DC voltage level
−
1.5
−
V
S/Nchrom
chrominance signal-to-noise unweighted;
ratio (0.7 V/Vrms noise)
fSC ± 0.3fSC; note 2
56
−
−
dB
αct
crosstalk between different
inputs
0 to 5 MHz
−
−
−50
dB
fclk(res)(chrom)
residues of clock
frequencies in the
chrominance signal
(Vrms/0.7 V)
COMB mode; note 2
f = 4 × fSC
−
−
−30
dB
f = 2 × fSC
−
−
−30
dB
f = 1.33 × fSC
−
−
−40
dB
f = fSC
−
−
−50
dB
f = fSC; fSC at FSC input −
−
−60
dB
f = 2 × fSC; 2 × fSC at
FSC input; note 2
−
−60
dB
−
−
dB
FSCres(YC)
αct
2000 Nov 30
FSC residue in YC mode
(Vrms/0.7 V)
crosstalk suppression at
vertical transient no-colour
←→ colour [0.7 V/V (p-p)]
−
vertical transition active 26
video ←→ vertical
blanking; note 6
and Fig.5
10
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
SYMBOL
SUPcomb(chrom)
TDA9183
PARAMETER
suppression (comb depth)
with respect to chrominance
band pass at f = fSC
CONDITIONS
MIN.
TYP.
MAX.
UNIT
COMB mode; note 2
and Fig.7
227
f = --------------- × f SC
227.5
30
−
−
dB
227 – 59
f = ---------------------- × f SC
227.5
30
−
−
dB
227 + 59
f = ----------------------- × f SC
227.5
30
−
−
dB
Ro
output resistance
−
−
500
Ω
ZL
load impedance
−
−
15
pF
Notes
1. The pulse should fall inside the line-blanking interval, after the rising edge of the synchronizing pulse.
2. fSC = colour subcarrier frequency; fSC = 3.579545 MHz for the NTSC M system.
3. With respect to 227.5 colour subcarrier periods (equals 63.556 µs) due to 1H delay in the comb filter.
4. With respect to the voltage level during clamping.
5. Test signal for NTSC M: 100% amplitude FCC multi-burst (see Fig.4).
6. Test signal for NTSC M: 100% white 75% amplitude FCC colour bar.
handbook, full pagewidth
1
0.5
1.5
2.0
3.0
3.58
4.1
MHz
(V)
0.65
0.45
0.30
0.15
0
MGT522
Fig.4 100% amplitude FCC multi-burst.
2000 Nov 30
11
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
handbook, full pagewidth
input
output
line n − 2
line n − 1
line n − 2
line n − 1
line n
line n
line n + 1
line n + 2
line n + 3
line n + 1
line n + 2
line n + 3
line n + 2
line n + 3
line n + 2
line n + 3
crosstalk
Transition at top of field
input
output
line n − 2
line n − 1
line n
line n − 2
line n − 1
line n
line n + 1
line n + 1
crosstalk
MGT524
Transition at bottom of field
Fig.5 Vertical transitions active video ←→ vertical blanking from line to line (NTSC system).
2000 Nov 30
12
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
handbook, full pagewidth
1
0.5
0
1 × f SC
0
2 × f SC
Detailed view
comb depth at f = f SC
Y
Y
Y
Y
1
0.5
C
C
C
C
C
0
225.5
f
227.5 SC
226
f
227.5 SC
226.5
f
227.5 SC
227
f
227.5 SC
227.5
f
227.5 SC
228
f
227.5 SC
228.5
f
227.5 SC
229
f
227.5 SC
229.5
f
227.5 SC
MGT528
Fig.6 Luminance transfer characteristic (NTSC M system).
2000 Nov 30
13
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
handbook, full pagewidth
1
0.5
0
1 × f SC
0
2 × f SC
Detailed view
227
f
comb depth at f =
227.5 SC
C
C
C
C
1
0.5
Y
Y
Y
Y
0
225.5
f
227.5 SC
226
f
227.5 SC
226.5
f
227.5 SC
227
f
227.5 SC
227.5
f
227.5 SC
228
f
227.5 SC
228.5
f
227.5 SC
229
f
227.5 SC
MGT532
Fig.7 Chrominance transfer characteristic (NTSC M system).
2000 Nov 30
14
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
APPLICATION INFORMATION
C1
handbook, full pagewidth
CIN
1
16
COUT
2
15
OUTSEL
3
14
Y/CVBSOUT
100 nF
INPSEL
C3
Y/CVBS2
L5
10 nF
C4
220 µH
100 nF
4
13
TDA9183
5
C12
10 nF
L6
5V
Y/CVBS1
12
6
11
n.c.
SC
7
10
n.c.
FSCSEL
8
9
220 µH
C9
C6
FSC
100 nF
100
nF
MGT538
Fig.8 Application diagram.
2000 Nov 30
15
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
PACKAGE OUTLINES
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
ME
seating plane
D
A2
A
A1
L
c
e
Z
w M
b1
(e 1)
b
b2
MH
9
16
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
b2
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.2
0.51
3.2
1.73
1.30
0.53
0.38
1.25
0.85
0.36
0.23
19.50
18.55
6.48
6.20
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
0.76
inches
0.17
0.020
0.13
0.068
0.051
0.021
0.015
0.049
0.033
0.014
0.009
0.77
0.73
0.26
0.24
0.10
0.30
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.030
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
92-11-17
95-01-14
SOT38-4
2000 Nov 30
EUROPEAN
PROJECTION
16
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
SO16: plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
D
E
A
X
c
HE
y
v M A
Z
9
16
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
8
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
10.5
10.1
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.10
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.41
0.40
0.30
0.29
0.050
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT162-1
075E03
MS-013
2000 Nov 30
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
97-05-22
99-12-27
17
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
SOLDERING
Introduction
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
WAVE SOLDERING
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. Wave soldering can still be used
for certain surface mount ICs, but it is not suitable for fine
pitch SMDs. In these situations reflow soldering is
recommended.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
Through-hole mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
SOLDERING BY DIPPING OR BY SOLDER WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Surface mount packages
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
MANUAL SOLDERING
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C. When using a dedicated tool, all other leads can
be soldered in one operation within 2 to 5 seconds
between 270 and 320 °C.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
2000 Nov 30
18
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
MOUNTING
PACKAGE
WAVE
suitable(2)
Through-hole mount DBS, DIP, HDIP, SDIP, SIL
Surface mount
REFLOW(1) DIPPING
−
suitable
BGA, LFBGA, SQFP, TFBGA
not suitable
suitable
−
HBCC, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, SMS
not suitable(3)
suitable
−
PLCC(4), SO, SOJ
suitable
suitable
−
suitable
−
suitable
−
recommended(4)(5)
LQFP, QFP, TQFP
not
SSOP, TSSOP, VSO
not recommended(6)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2000 Nov 30
19
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
DATA SHEET STATUS
DATA SHEET STATUS
PRODUCT
STATUS
DEFINITIONS (1)
Objective specification
Development
This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification
Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2000 Nov 30
20
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
NOTES
2000 Nov 30
21
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
NOTES
2000 Nov 30
22
Philips Semiconductors
Objective specification
Integrated NTSC comb filter
TDA9183
NOTES
2000 Nov 30
23
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SCA 70
© Philips Electronics N.V. 2000
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Printed in The Netherlands
753504/25/02/pp24
Date of release: 2000
Nov 30
Document order number:
9397 750 07804