PHILIPS PCA8591T

INTEGRATED CIRCUITS
DATA SHEET
PCF8591
8-bit A/D and D/A converter
Product specification
Supersedes data of 1997 Apr 02
File under Integrated Circuits, IC12
1998 Jul 02
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
CONTENTS
1
FEATURES
2
APPLICATIONS
3
GENERAL DESCRIPTION
4
ORDERING INFORMATION
5
BLOCK DIAGRAM
6
PINNING
7
FUNCTIONAL DESCRIPTION
7.1
7.2
7.3
7.4
7.5
7.6
Addressing
Control byte
D/A conversion
A/D conversion
Reference voltage
Oscillator
8
CHARACTERISTICS OF THE I2C-BUS
8.1
8.2
8.3
8.4
8.5
Bit transfer
Start and stop conditions
System configuration
Acknowledge
I2C-bus protocol
9
LIMITING VALUES
10
HANDLING
11
DC CHARACTERISTICS
12
D/A CHARACTERISTICS
13
A/D CHARACTERISTICS
14
AC CHARACTERISTICS
15
APPLICATION INFORMATION
16
PACKAGE OUTLINES
17
SOLDERING
17.1
17.2
17.2.1
17.2.2
17.3
17.3.1
17.3.2
17.3.3
Introduction
DIP
Soldering by dipping or by wave
Repairing soldered joints
SO
Reflow soldering
Wave soldering
Repairing soldered joints
18
DEFINITIONS
19
LIFE SUPPORT APPLICATIONS
20
PURCHASE OF PHILIPS I2C COMPONENTS
1998 Jul 02
2
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
1
PCF8591
FEATURES
• Single power supply
• Operating supply voltage 2.5 V to 6 V
• Low standby current
• Serial input/output via I2C-bus
• Address by 3 hardware address pins
3
• Sampling rate given by I2C-bus speed
The PCF8591 is a single-chip, single-supply low power
8-bit CMOS data acquisition device with four analog
inputs, one analog output and a serial I2C-bus interface.
Three address pins A0, A1 and A2 are used for
programming the hardware address, allowing the use of
up to eight devices connected to the I2C-bus without
additional hardware. Address, control and data to and from
the device are transferred serially via the two-line
bidirectional I2C-bus.
• 4 analog inputs programmable as single-ended or
differential inputs
• Auto-incremented channel selection
• Analog voltage range from VSS to VDD
• On-chip track and hold circuit
• 8-bit successive approximation A/D conversion
• Multiplying DAC with one analog output.
2
GENERAL DESCRIPTION
The functions of the device include analog input
multiplexing, on-chip track and hold function, 8-bit
analog-to-digital conversion and an 8-bit digital-to-analog
conversion. The maximum conversion rate is given by the
maximum speed of the I2C-bus.
APPLICATIONS
• Closed loop control systems
• Low power converter for remote data acquisition
• Battery operated equipment
• Acquisition of analog values in automotive, audio and
TV applications.
4
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
PCA8591P
DIP16
plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
PCA8591T
SO16
plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
1998 Jul 02
3
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8-bit A/D and D/A converter
BLOCK DIAGRAM
Philips Semiconductors
5
1998 Jul 02
4
Product specification
PCF8591
Fig.1 Block diagram.
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
6
PCF8591
PINNING
SYMBOL
PIN
DESCRIPTION
AINO
1
AIN1
2
AIN2
3
AIN3
4
A0
5
A1
6
A2
7
VSS
8
negative supply voltage
SDA
9
I2C-bus data input/output
SCL
10
I2C-bus clock input
OSC
11
oscillator input/output
EXT
12
external/internal switch for oscillator
input
AGND
13
analog ground
analog inputs
(A/D converter)
hardware address
VREF
14
voltage reference input
AOUT
15
analog output (D/A converter)
VDD
16
positive supply voltage
1998 Jul 02
Fig.2 Pinning diagram.
5
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
7
7.1
PCF8591
FUNCTIONAL DESCRIPTION
7.2
Control byte
The second byte sent to a PCF8591 device will be stored
in its control register and is required to control the device
function.
Addressing
Each PCF8591 device in an I2C-bus system is activated by
sending a valid address to the device. The address
consists of a fixed part and a programmable part.
The programmable part must be set according to the
address pins A0, A1 and A2. The address always has to
be sent as the first byte after the start condition in the
I2C-bus protocol. The last bit of the address byte is the
read/write-bit which sets the direction of the following data
transfer (see Figs 3, 15 and 16).
The upper nibble of the control register is used for enabling
the analog output, and for programming the analog inputs
as single-ended or differential inputs. The lower nibble
selects one of the analog input channels defined by the
upper nibble (see Fig.4). If the auto-increment flag is set
the channel number is incremented automatically after
each A/D conversion.
If the auto-increment mode is desired in applications
where the internal oscillator is used, the analog output
enable flag in the control byte (bit 6) should be set. This
allows the internal oscillator to run continuously, thereby
preventing conversion errors resulting from oscillator
start-up delay. The analog output enable flag may be reset
at other times to reduce quiescent power consumption.
Fig.3 Address byte.
1998 Jul 02
The selection of a non-existing input channel results in the
highest available channel number being allocated.
Therefore, if the auto-increment flag is set, the next
selected channel will be always channel 0. The most
significant bits of both nibbles are reserved for future
functions and have to be set to 0. After a Power-on reset
condition all bits of the control register are reset to 0.
The D/A converter and the oscillator are disabled for power
saving. The analog output is switched to a high-impedance
state.
6
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
Fig.4 Control byte.
1998 Jul 02
7
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
7.3
PCF8591
The on-chip D/A converter is also used for successive
approximation A/D conversion. In order to release the
DAC for an A/D conversion cycle the unity gain amplifier is
equipped with a track and hold circuit. This circuit holds the
output voltage while executing the A/D conversion.
D/A conversion
The third byte sent to a PCF8591 device is stored in the
DAC data register and is converted to the corresponding
analog voltage using the on-chip D/A converter. This D/A
converter consists of a resistor divider chain connected to
the external reference voltage with 256 taps and selection
switches. The tap-decoder switches one of these taps to
the DAC output line (see Fig.5).
The output voltage supplied to the analog output AOUT is
given by the formula shown in Fig.6. The waveforms of a
D/A conversion sequence are shown in Fig.7.
The analog output voltage is buffered by an auto-zeroed
unity gain amplifier. This buffer amplifier may be switched
on or off by setting the analog output enable flag of the
control register. In the active state the output voltage is
held until a further data byte is sent.
Fig.5 DAC resistor divider chain.
1998 Jul 02
8
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
Fig.6 DAC data and DC conversion characteristics.
Fig.7 D/A conversion sequence.
1998 Jul 02
9
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
7.4
PCF8591
The conversion result is stored in the ADC data register
and awaits transmission. If the auto-increment flag is set
the next channel is selected.
A/D conversion
The A/D converter makes use of the successive
approximation conversion technique. The on-chip D/A
converter and a high-gain comparator are used
temporarily during an A/D conversion cycle.
The first byte transmitted in a read cycle contains the
conversion result code of the previous read cycle. After a
Power-on reset condition the first byte read is a
hexadecimal 80. The protocol of an I2C-bus read cycle is
shown in Chapter 8, Figs 15 and 16.
An A/D conversion cycle is always started after sending a
valid read mode address to a PCF8591 device. The A/D
conversion cycle is triggered at the trailing edge of the
acknowledge clock pulse and is executed while
transmitting the result of the previous conversion (see
Fig.8).
The maximum A/D conversion rate is given by the actual
speed of the I2C-bus.
Once a conversion cycle is triggered an input voltage
sample of the selected channel is stored on the chip and is
converted to the corresponding 8-bit binary code. Samples
picked up from differential inputs are converted to an 8-bit
two’s complement code (see Figs 9 and 10).
Fig.8 A/D conversion sequence.
1998 Jul 02
10
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
Fig.9 A/D conversion characteristics of single-ended inputs.
Fig.10 A/D conversion characteristics of differential inputs.
1998 Jul 02
11
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
7.5
PCF8591
Reference voltage
7.6
Oscillator
For the D/A and A/D conversion either a stable external
voltage reference or the supply voltage has to be applied
to the resistor divider chain (pins VREF and AGND).
The AGND pin has to be connected to the system analog
ground and may have a DC off-set with reference to VSS.
An on-chip oscillator generates the clock signal required
for the A/D conversion cycle and for refreshing the
auto-zeroed buffer amplifier. When using this oscillator the
EXT pin has to be connected to VSS. At the OSC pin the
oscillator frequency is available.
A low frequency may be applied to the VREF and AGND
pins. This allows the use of the D/A converter as a
one-quadrant multiplier; see Chapter 15 and Fig.6.
If the EXT pin is connected to VDD the oscillator output
OSC is switched to a high-impedance state allowing the
user to feed an external clock signal to OSC.
The A/D converter may also be used as a one or two
quadrant analog divider. The analog input voltage is
divided by the reference voltage. The result is converted to
a binary code. In this application the user has to keep the
reference voltage stable during the conversion cycle.
1998 Jul 02
12
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
CHARACTERISTICS OF THE I2C-BUS
8
The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data
line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data
transfer may be initiated only when the bus is not busy.
8.1
Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period
of the clock pulse as changes in the data line at this time will be interpreted as a control signal.
handbook, full pagewidth
SDA
SCL
data line
stable;
data valid
change
of data
allowed
MBC621
Fig.11 Bit transfer.
8.2
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH, is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH, is
defined as the stop condition (P).
handbook, full pagewidth
SDA
SDA
SCL
SCL
S
P
START condition
STOP condition
Fig.12 Definition of START and STOP condition.
1998 Jul 02
13
MBC622
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
8.3
PCF8591
System configuration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER
MBA605
Fig.13 System configuration.
8.4
Acknowledge
The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited.
Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by
the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is
addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that
acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW
during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the
transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the
transmitter must leave the data line HIGH to enable the master to generate a stop condition.
handbook, full pagewidth
DATA OUTPUT
BY TRANSMITTER
not acknowledge
DATA OUTPUT
BY RECEIVER
acknowledge
SCL FROM
MASTER
1
2
8
9
S
clock pulse for
acknowledgement
START
condition
MBC602
Fig.14 Acknowledgement on the I2C-bus.
1998 Jul 02
14
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
8.5
PCF8591
I2C-bus protocol
After a start condition a valid hardware address has to be sent to a PCF8591 device. The read/write bit defines the
direction of the following single or multiple byte data transfer. For the format and the timing of the start condition (S), the
stop condition (P) and the acknowledge bit (A) refer to the I2C-bus characteristics. In the write mode a data transfer is
terminated by sending either a stop condition or the start condition of the next data transfer.
Fig.15 Bus protocol for write mode, D/A conversion.
Fig.16 Bus protocol for read mode, A/D conversion.
1998 Jul 02
15
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
9 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VDD
supply voltage (pin 16)
−0.5
+8.0
V
VI
input voltage (any input)
−0.5
VDD + 0.5
V
II
DC input current
−
±10
mA
IO
DC output current
−
±20
mA
IDD, ISS
VDD or VSS current
−
±50
mA
Ptot
total power dissipation per package
−
300
mW
PO
power dissipation per output
−
100
mW
Tamb
operating ambient temperature
−40
+85
°C
Tstg
storage temperature
−65
+150
°C
10 HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC12 under
“Handling MOS Devices”.
1998 Jul 02
16
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
11 DC CHARACTERISTICS
VDD = 2.5 V to 6 V; VSS = 0 V; Tamb = −40 °C to +85 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
2.5
−
6.0
V
VI = VSS or VDD; no load
−
1
15
µA
operating, AOUT off
fSCL = 100 kHz
−
125
250
µA
operating, AOUT active
fSCL = 100 kHz
−
0.45
1.0
mA
note 1
0.8
−
2.0
V
VDD
supply voltage (operating)
IDD
supply current
standby
VPOR
Power-on reset level
Digital inputs/output: SCL, SDA, A0, A1, A2
VIL
LOW level input voltage
0
−
0.3 × VDD
V
VIH
HIGH level input voltage
0.7 × VDD
−
VDD
V
IL
leakage current
A0, A1, A2
VI = VSS to VDD
−250
−
+250
nA
SCL, SDA
VI = VSS to VDD
−1
−
+1
µA
Ci
input capacitance
−
−
5
pF
IOL
LOW level SDA output current VOL = 0.4 V
3.0
−
−
mA
V
Reference voltage inputs
VREF
reference voltage
VREF > VAGND; note 2
VSS + 1.6
−
VDD
VAGND
analog ground voltage
VREF > VAGND; note 2
VSS
−
VDD − 0.8 V
ILI
input leakage current
−250
−
+250
nA
RREF
input resistance
−
100
−
kΩ
pins VREF and AGND
Oscillator: OSC, EXT
ILI
input leakage current
−
−
250
nA
fOSC
oscillator frequency
0.75
−
1.25
MHz
Notes
1. The power on reset circuit resets the I2C-bus logic when VDD is less than VPOR.
2. A further extension of the range is possible, if the following conditions are fulfilled:
V REF + V AGND
V REF + V AGND
-------------------------------------- ≥ 0.8V, V DD – -------------------------------------- ≥ 0.4V
2
2
1998 Jul 02
17
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
12 D/A CHARACTERISTICS
VDD = 5.0 V; VSS = 0 V; VREF = 5.0 V; VAGND = 0 V; RL = 10 kΩ; CL = 100 pF; Tamb = −40 °C to +85 °C unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Analog output
no resistive load
VSS
−
VDD
V
RL = 10 kΩ
VSS
−
0.9 × VDD
V
output leakage current
AOUT disabled
−
−
250
nA
OSe
offset error
Tamb = 25 °C
−
−
50
mV
Le
linearity error
−
−
±1.5
LSB
Ge
gain error
no resistive load
−
−
1
%
tDAC
settling time
to 1⁄2 LSB full scale step
−
−
90
µs
fDAC
conversion rate
−
−
11.1
kHz
SNRR
supply noise rejection ratio
−
40
−
dB
VOA
ILO
output voltage
Accuracy
f = 100 Hz;
VDDN = 0.1 × VPP
13 A/D CHARACTERISTICS
VDD = 5.0 V; VSS = 0 V; VREF = 5.0 V; VAGND = 0 V; RS = 10 kΩ; Tamb = −40 °C to +85 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Analog inputs
VIA
analog input voltage
VSS
−
VDD
V
ILIA
analog input leakage current
−
−
100
nA
CIA
analog input capacitance
−
10
−
pF
CID
differential input capacitance
−
10
−
pF
VIS
single-ended voltage
measuring range
VAGND
−
VREF
V
VID
differential voltage
measuring range;
VFS = VREF − VAGND
– V FS
------------2
+V FS
-------------2
V
Tamb = 25 °C
−
Accuracy
OSe
offset error
−
−
20
mV
Le
linearity error
−
−
±1.5
LSB
Ge
gain error
−
−
1
%
GSe
small-signal gain error
−
−
5
%
CMRR
common-mode rejection
ratio
−
60
−
dB
SNRR
supply noise rejection ratio
−
40
−
dB
tADC
conversion time
−
−
90
µs
fADC
sampling/conversion rate
−
−
11.1
kHz
1998 Jul 02
∆Vi = 16 LSB
f = 100 Hz;
VDDN = 0.1 × VPP
18
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
(a) Internal oscillator; Tamb = +27 °C.
(b) External oscillator.
Fig.17 Operating supply current as a function of supply voltage (analog output disabled).
(a) Output impedance near negative power rail; Tamb = +27 °C.
(b) Output impedance near positive power rail; Tamb = +27 °C.
The x-axis represents the hex input-code equivalent of the output voltage.
Fig.18 Output impedance of analog output buffer (near power rails).
1998 Jul 02
19
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
14 AC CHARACTERISTICS
All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and
VIH with an input voltage swing of VSS to VDD.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
I2C-bus timing (see Fig.19; note 1)
fSCL
SCL clock frequency
−
−
100
kHz
tSP
tolerable spike width on bus
−
−
100
ns
tBUF
bus free time
4.7
−
−
µs
tSU;STA
START condition set-up time
4.7
−
−
µs
tHD;STA
START condition hold time
4.0
−
−
µs
tLOW
SCL LOW time
4.7
−
−
µs
tHIGH
SCL HIGH time
4.0
−
−
µs
tr
SCL and SDA rise time
−
−
1.0
µs
tf
SCL and SDA fall time
−
−
0.3
µs
tSU;DAT
data set-up time
250
−
−
ns
tHD;DAT
data hold time
0
−
−
ns
tVD;DAT
SCL LOW-to-data out valid
−
−
3.4
µs
tSU;STO
STOP condition set-up time
4.0
−
−
µs
Note
1. A detailed description of the I2C-bus specification, with applications, is given in brochure “The I2C-bus and how to
use it”. This brochure may be ordered using the code 9398 393 40011.
handbook, full pagewidth
t SU;STA
BIT 6
(A6)
BIT 7
MSB
(A7)
START
CONDITION
(S)
PROTOCOL
t LOW
t HIGH
BIT 0
LSB
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
1 / f SCL
SCL
t
tr
BUF
t
f
SDA
t HD;STA
t SU;DAT
t
HD;DAT
t VD;DAT
MBD820
Fig.19 I2C-bus timing diagram; rise and fall times refer to VIL and VIH.
1998 Jul 02
20
t SU;STO
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
15 APPLICATION INFORMATION
Inputs must be connected to VSS or VDD when not in use. Analog inputs may also be connected to AGND or VREF.
In order to prevent excessive ground and supply noise and to minimize cross-talk of the digital to analog signal paths the
user has to design the printed-circuit board layout very carefully. Supply lines common to a PCF8591 device and noisy
digital circuits and ground loops should be avoided. Decoupling capacitors (>10 µF) are recommended for power supply
and reference voltage inputs.
Fig.20 Application diagram.
1998 Jul 02
21
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
16 PACKAGE OUTLINES
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
b1
w M
(e 1)
b
MH
9
16
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.7
0.51
3.7
1.40
1.14
0.53
0.38
0.32
0.23
21.8
21.4
6.48
6.20
2.54
7.62
3.9
3.4
8.25
7.80
9.5
8.3
0.254
2.2
inches
0.19
0.020
0.15
0.055
0.045
0.021
0.015
0.013
0.009
0.86
0.84
0.26
0.24
0.10
0.30
0.15
0.13
0.32
0.31
0.37
0.33
0.01
0.087
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT38-1
050G09
MO-001AE
1998 Jul 02
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
92-10-02
95-01-19
22
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
SO16: plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
D
E
A
X
c
HE
y
v M A
Z
9
16
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
8
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
10.5
10.1
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.10
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.41
0.40
0.30
0.29
0.050
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT162-1
075E03
MS-013AA
1998 Jul 02
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24
97-05-22
23
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
17 SOLDERING
17.1
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
17.3.2
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
17.2
17.2.1
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
DIP
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
SOLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
17.2.2
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
17.3
17.3.1
17.3.3
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1998 Jul 02
WAVE SOLDERING
24
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
18 DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
19 LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
20 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1998 Jul 02
25
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
NOTES
1998 Jul 02
26
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
NOTES
1998 Jul 02
27
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Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1998
SCA60
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Printed in The Netherlands
415106/1200/04/pp28
Date of release: 1998 Jul 02
Document order number:
9397 750 04058