Z0103NN Logic level four-quadrant triac Rev. 03 — 5 August 2009 Product data sheet 1. Product profile 1.1 General description Passivated sensitive gate 4-Q triac in a SOT223 surface-mountable plastic package 1.2 Features and benefits Direct interfacing to logic level ICs High blocking voltage of 800V Direct interfacing to low power gate drive circuits Sensitive gate in four quadrants Surface-mountable package 1.3 Applications General purpose low power motor control Industrial process control Low power AC Fan controllers Home appliances 1.4 Quick reference data Table 1. Quick reference Symbol Parameter VDRM repetitive peak off-state voltage IT(RMS) RMS on-state current Conditions Min Typ Max Unit - - 800 V half sine wave; Tsp ≤ 89 °C; see Figure 1 and 4 - - 1 A VD = 12 V; Tj = 25 °C; T2+ G-; see Figure 6 - - 3 mA VD = 12 V; Tj = 25 °C; T2- G- - - 3 mA VD = 12 V; Tj = 25 °C; T2+ G+ - - 3 mA VD = 12 V; Tj = 25 °C; T2- G+ - - 5 mA Static characteristics IGT gate trigger current Z0103NN NXP Semiconductors Logic level four-quadrant triac 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 T1 main terminal 1 2 T2 main terminal 2 3 G gate 4 T2 main terminal 2 Graphic symbol 4 T2 T1 G sym051 1 2 3 SOT223 (SC-73) 3. Ordering information Table 3. Ordering information Type number Z0103NN Package Name Description Version SC-73 plastic surface-mounted package with increased heatsink; 4 leads SOT223 Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 2 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VDRM repetitive peak off-state voltage IT(RMS) RMS on-state current dIT/dt rate of rise of on-state current Min Max Unit - 800 V half sine wave; Tsp ≤ 89 °C; see Figure 1 and 4 - 1 A IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs; T2+ G- - 50 A/µs IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs; T2+ G+ - 50 A/µs IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs; T2- G+ - 20 A/µs IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs; T2- G- - 50 A/µs IGM peak gate current - 1 A PGM peak gate power - 2 W Tstg storage temperature -40 150 °C Tj junction temperature - 125 °C ITSM non-repetitive peak on-state current full sine wave; tp = 16.7 ms; Tj(init) = 25 °C - 8.5 A full sine wave; tp = 20 ms; Tj(init) = 25 °C; see Figure 2 and 3 - 8 A tp = 10 ms; sine-wave pulse - 0.32 A2s - 0.1 W I2t I2t for fusing PG(AV) average gate power 003aac259 2.0 Ptot (W) 1.6 1.2 conduction angle (degrees) form factor a 30 60 90 120 180 4 2.8 2.2 1.9 1.57 α = 180° α 120° 90° 60° 0.8 30° 0.4 0.0 0 Fig 1. 0.2 0.4 0.6 0.8 1 IT(RMS) (A) 1.2 Total power dissipation as a function of RMS on-state current; maximum values Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 3 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 003aad318 10 ITSM (A) 8 6 4 ITSM IT t 2 1/f Tj(init) = 25 °C max 0 1 Fig 2. 102 10 103 number of cycles Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum values 003aad319 103 ITSM IT ITSM (A) t tp Tj(init) = 25 °C max 102 (1) (2) 10 1 10−5 Fig 3. 10−4 10−3 10−2 tp (s) 10−1 Non-repetitive peak on-state current as a function of pulse width; maximum values Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 4 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 003aad391 1.2 IT(RMS) (A) 0.8 0.4 0 −50 Fig 4. 0 50 100 150 Tsp (°C) Maximum permissible RMS on-state current as a function of solder point temperature; typical values. 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Rth(j-sp) Rth(j-a) Conditions Min Typ Max Unit thermal resistance from see Figure 5 junction to solder point - - 25 K/W thermal resistance from junction to ambient - 150 - K/W - 60 - K/W 003aad390 102 Zth(j-sp) (K/W) 10 1 P 10−1 t tp 10−2 10−5 Fig 5. 10−4 10−3 10−2 10−1 1 tp (s) 10 Transient thermal impedance from junction to solder point as a function of pulse duration Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 5 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit VD = 12 V; Tj = 25 °C; T2+ G-; see Figure 6 - - 3 mA VD = 12 V; Tj = 25 °C; T2- G- - - 3 mA VD = 12 V; Tj = 25 °C; T2+ G+ - - 3 mA Static characteristics gate trigger current IGT latching current IL VD = 12 V; Tj = 25 °C; T2- G+ - - 5 mA VD = 12 V; Tj = 25 °C; IG = 0.1 A; T2+ G-; see Figure 7 - - 15 mA VD = 12 V; Tj = 25 °C; IG = 0.1 A; T2+ G+ - - 7 mA VD = 12 V; Tj = 25 °C; IG = 0.1 A; T2- G+ - - 7 mA VD = 12 V; Tj = 25 °C; IG = 0.1 A; T2- G- - - 7 mA IH holding current VD = 12 V; Tj = 25 °C; see Figure 10 - - 7 mA VT on-state voltage IT = 1 A; see Figure 8 - 1.3 1.6 V VGT gate trigger voltage IT = 0.1 A; VD = 12 V; Tj = 25 °C; see Figure 9 - - 1.3 V IT = 0.1 A; VD = 800 V; Tj = 125 °C 0.2 - - V VD = 800 V; Tj = 125 °C - - 0.5 mA off-state current ID Dynamic characteristics dVD/dt rate of rise of off-state voltage VDM = 536 V; Tj = 110 °C; gate open circuit; see Figure 11 10 - - V/µs dVcom/dt rate of rise of commutating voltage VD = 400 V; Tj = 110 °C; dIcom/dt = 0.44 A/ms; gate open circuit 0.5 - - V/µs 003aaa205 4 003aaa203 3 IGT IL IGT(25°C) IL(25°C) 3 (1) (2) 2 (3) (4) 2 1 1 0 −50 0 50 100 0 −50 150 Tj (°C) Fig 7. Fig 6. 0 50 100 150 Tj (°C) Normalized latching current as a function of junction temperature Normalized gate trigger current as a function of junction temperature Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 6 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 003aac258 2 003aaa209 1.6 IT (A) VGT VGT(25°C) 1.6 1.2 1.2 0.8 0.8 (1) (2) (3) 0.4 0.4 0 0 0.4 0.8 1.2 1.6 VT (V) 0 −50 2 Fig 9. Fig 8. 0 50 100 150 Tj (°C) Normalized gate trigger voltage as a function of junction temperature On-state current as a function of on-state voltage 003aaa204 3 IH IH(25°C) 2 1 0 −50 0 50 100 150 Tj (°C) Fig 10. Normalized holding current as a function of junction temperature Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 7 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 003aaa208 1.6 A 1.2 0.8 0.4 0 0 50 100 150 Tj (°C) Fig 11. Normalized critical rate of rise of off-state voltage as a function of junction temperature;typical values Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 8 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 7. Package outline Plastic surface-mounted package with increased heatsink; 4 leads D SOT223 E B A X c y HE v M A b1 4 Q A A1 1 2 3 Lp bp e1 w M B detail X e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y mm 1.8 1.5 0.10 0.01 0.80 0.60 3.1 2.9 0.32 0.22 6.7 6.3 3.7 3.3 4.6 2.3 7.3 6.7 1.1 0.7 0.95 0.85 0.2 0.1 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT223 JEITA SC-73 EUROPEAN PROJECTION ISSUE DATE 04-11-10 06-03-16 Fig 12. Package outline SOT223 (SC-73) Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 9 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes Z0103NN_3 20090805 Product data sheet - Z0103_07_09_SERIES-02 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Type number Z0103NN separated from data sheet Z0103_07_09_SERIES-02. Z0103_07_09_SERIES-02 (9397 750 10102) 20020912 Product data - Z0103_07_09_SERIES-01 Z0103_07_09_SERIES-01 (9397 750 09419) 20020411 Product data - - Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 10 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 9. Legal information 9.1 Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Z0103NN_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 5 August 2009 11 of 12 Z0103NN NXP Semiconductors Logic level four-quadrant triac 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . . 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 5 August 2009 Document identifier: Z0103NN_3