BLA1011-200R; BLA1011S-200R Avionics LDMOS transistors Rev. 01 — 23 February 2010 Product data sheet 1. Product profile 1.1 General description 200 W LDMOS avionics power transistor for transmitter applications at frequencies from 1030 MHz to 1090 MHz. Table 1. Typical performance RF performance at Th = 25 °C in a common source class-AB test circuit; IDq = 150 mA; typical values. Mode of operation Conditions VDS (V) PL (W) Gp (dB) ηD (%) tr (ns) tf (ns) Pulsed class-AB: 1030 MHz to 1090 MHz tp = 50 μs; δ = 2 % 36 200 15 50 35 6 tp = 128 μs; δ = 2 % 36 250 14 50 35 6 tp = 340 μs; δ = 1 % 36 250 14 50 35 6 CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 1.2 Features and benefits Typical pulsed class-AB performance at a frequencies from 1030 MHz to 1090 MHz, a supply voltage of 36 V and an IDq of 150 mA: Load power ≥ 200 W Gain ≥ 13 dB Efficiency ≥ 45 % Rise time ≤ 50 ns Fall time ≤ 50 ns High power gain Easy power control Excellent ruggedness Source on mounting flange eliminates DC isolators, reducing common mode inductance Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors 1.3 Applications Avionics transmitter applications in the 1030 MHz to 1090 MHz frequency range. 2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol BLA1011-200R (SOT502A) 1 drain 2 gate 3 1 1 3 [1] source 2 2 3 sym039 BLA1011S-200R (SOT502B) 1 drain 2 gate 3 1 1 3 [1] source 2 2 3 sym039 [1] Connected to flange. 3. Ordering information Table 3. Ordering information Type number BLA1011-200R Package Name Description Version - flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A earless flanged LDMOST ceramic package; 2 leads SOT502B BLA1011S-200R - 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VDS drain-source voltage - 75 V VGS gate-source voltage - ±22 V Ptot total power dissipation - 700 W Tstg storage temperature −65 +150 °C Tj junction temperature - 200 °C Th ≤ 25 °C; tp = 50 μs; δ = 2 % BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 Min Max Unit © NXP B.V. 2010. All rights reserved. 2 of 13 BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Zth(j-h) transient thermal impedance from junction to Th = 25 °C heatsink [1] Conditions [1] Typ Unit 0.15 K/W Thermal resistance is determined under RF operating conditions; tp = 50 μs, δ = 10 %. 6. Characteristics Table 6. Characteristics Tj = 25 °C unless otherwise specified Symbol Parameter Conditions V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 3 mA Min Typ Max Unit 75 - - V VGS(th) gate-source threshold voltage VDS = 10 V; ID = 300 mA 4 - 5 V IDSS drain leakage current VGS = 0 V; VDS = 36 V - - 1 μA IDSX drain cut-off current VGS = VGS(th) + 9 V; VDS = 10 V 45 - - A IGSS gate leakage current VGS = ±20 V; VDS = 0 V - - 1 μA gfs forward transconductance VDS = 10 V; ID = 10 A - 9 - S RDS(on) drain-source on-state resistance VGS = 9 V; ID = 10 A - 60 - mΩ 7. Application information Table 7. Application information RF performance in a common source pulsed class-AB circuit; (tp = 50 μs; δ = 2 %); f = 1030 MHz and 1090 MHz; Th = 25 °C; Zth(mb-h) = 0.15 K/W; IDq = 150 mA; unless otherwise specified. Symbol Parameter Conditions VDS drain-source voltage PL output power Gp power gain PL = 200 W 13 - dB ηD drain efficiency tp = 50 μs; δ = 2 % 45 - % tr rise time - - 50 ns tf fall time - - 50 ns tp = 50 μs; δ = 2 % Min Typ Max Unit - 36 - V - 200 W 7.1 Ruggedness in class-AB operation The BLA1011-200R and BLA1011S-200R are capable of withstanding a load mismatch corresponding to VSWR = 5 : 1 through all phases under the following conditions: VDS = 36 V; f = 1030 MHz to 1090 MHz at rated load power. BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 3 of 13 BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors mgw033 20 Gp (dB) 80 ηD (%) Gp mgw034 250 PL (W) 200 15 60 150 10 40 ηD 100 5 20 50 0 0 50 100 150 0 200 250 PL (W) 0 0 VDS = 36 V; IDq = 150 mA; f = 1060 MHz; tp = 50 μs; δ=2% Fig 1. Power gain and drain efficiency as functions of load power; typical values mgw035 20 Gp (dB) 2 4 6 PD (W) 8 VDS = 36 V; IDq = 150 mA; f = 1060 MHz; tp = 50 μs; δ=2% Fig 2. Load power as a function of drive power; typical values mgw036 250 IDq = 1.5 A 200 16 20 Gp (dB) PL (W) 16 150 mA Gp 12 150 8 100 4 50 0 PL 8 4 0 0 50 100 150 200 250 PL (W) Power gain as a function of load power; typical values 0 0 1 2 3 4 5 VGS (V) VDS = 36 V; f = 1060 MHz; tp = 50 μs; δ = 2 % Fig 3. 12 VDS = 36 V; IDq = 150 mA; Pi = 5.5 W; f = 1060 MHz; tp = 50 μs; δ = 2 % Fig 4. Load power and power gain as functions of gate-source voltage; typical values BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 4 of 13 BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors mgw037 20 Gp (dB) Zi (W) ηD (%) Gp mgw038 5 80 xi 4 15 60 ri 3 ηD 10 40 2 5 20 1 0 1020 1040 1060 1080 0 1100 f (MHz) 0 1020 VDS = 36 V; IDq = 150 mA; PL = 200 W; tp = 50 μs; δ=2% Fig 5. 1040 1060 1080 1100 f (MHz) VDS = 36 V; IDq = 150 mA; PL = 200 W; tp = 50 μs; δ=2% Power gain and drain efficiency a functions of frequency; typical values Fig 6. Input Impedance as a function of frequency (series components); typical values mgw039 4 ZL (W) 2 RL 0 XL −2 −4 1020 1040 1060 1080 1100 f (MHz) VDS = 36 V; IDq = 150 mA; PL = 200 W; tp = 50 μs; δ = 2 % Fig 7. Load impedance as a function of frequency (series components); typical values BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 5 of 13 BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors 8. Test information 40 40 60 C6 + C10 C5 C9 + R2 C4 C3 R1 C11 C8 L1 C7 C1 C2 mgw032 Dimensions in mm. The components are situated on one side of the copper-clad Duroid Printed-Circuit Board (PCB) with εr = 6.2 and thickness 0.64 mm. The other side is unetched and serves as a ground plane. See Table 8 for list of components. Fig 8. Component layout for 1030 MHz to 1090 MHz test circuit BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 6 of 13 BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors Table 8. List of components (see Figure 8) Component Description Value multilayer ceramic chip capacitor [1] 39 pF C2 multilayer ceramic chip capacitor [2] 4.3 pF C3 multilayer ceramic chip capacitor [1] 11 pF multilayer ceramic chip capacitor [1] 62 pF C5 multilayer ceramic chip capacitor [1] 100 pF C6 electrolytic capacitor C8 multilayer ceramic chip capacitor [2] 20 pF multilayer ceramic chip capacitor [1] 47 pF multilayer ceramic chip capacitor [3] 1.2 nF C1 C4, C7 C9 C10 47 μF; 20 V 47 μF; 63 V C11 electrolytic capacitor L1 Ω-shaped enamelled 1 mm copper wire R1 metal film resistor 301 Ω R2 SMD 0508 resistor 18 Ω length = 38 mm [1] American Technical Ceramics type 100A or capacitor of same quality. [2] American Technical Ceramics type 100B or capacitor of same quality. [3] American Technical Ceramics type 700 or capacitor of same quality. BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 Dimensions © NXP B.V. 2010. All rights reserved. 7 of 13 BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors 9. Package outline Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A D A F 3 D1 U1 B q c C 1 H L E1 p U2 E w1 M A M B M A 2 w2 M C M b 0 5 Q 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 4.72 3.43 12.83 12.57 0.15 0.08 inches 0.186 0.135 0.505 0.006 0.495 0.003 OUTLINE VERSION E E1 F H L p Q q U1 U2 w1 w2 20.02 19.96 19.61 19.66 9.50 9.30 9.53 9.25 1.14 0.89 19.94 18.92 5.33 4.32 3.38 3.12 1.70 1.45 27.94 34.16 33.91 9.91 9.65 0.25 0.51 0.788 0.786 0.772 0.774 0.374 0.375 0.366 0.364 0.067 1.100 0.057 1.345 1.335 0.390 0.380 0.01 0.02 D D1 0.045 0.785 0.035 0.745 0.210 0.133 0.170 0.123 REFERENCES IEC JEDEC JEITA ISSUE DATE 99-12-28 03-01-10 SOT502A Fig 9. EUROPEAN PROJECTION Package outline SOT502A BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 8 of 13 BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors Earless flanged LDMOST ceramic package; 2 leads SOT502B D A F 3 D D1 c U1 1 L H E1 U2 E 2 w2 M D M b 0 5 Q 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 4.72 3.43 12.83 12.57 0.15 0.08 inches 0.186 0.135 0.505 0.006 0.495 0.003 OUTLINE VERSION E E1 F H L Q U1 U2 w2 20.02 19.96 19.61 19.66 9.50 9.30 9.53 9.25 1.14 0.89 19.94 18.92 5.33 4.32 1.70 1.45 20.70 20.45 9.91 9.65 0.25 0.788 0.786 0.772 0.774 0.374 0.375 0.366 0.364 0.045 0.785 0.035 0.745 0.210 0.170 0.067 0.815 0.057 0.805 D D1 REFERENCES IEC JEDEC JEITA 0.390 0.010 0.380 EUROPEAN PROJECTION ISSUE DATE 03-01-10 07-05-09 SOT502B Fig 10. Package outline SOT502B BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 9 of 13 NXP Semiconductors BLA1011-200R; BLA1011S-200R Avionics LDMOS transistors 10. Abbreviations Table 9. Abbreviations Acronym Description IDq quiescent drain current LDMOS Laterally Diffused Metal-Oxide Semiconductor LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor RF Radio Frequency SMD Surface Mount Device VSWR Voltage Standing-Wave Ratio 11. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes BLA1011-200R_1011S-200R_1 20100223 Product data sheet - BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 - © NXP B.V. 2010. All rights reserved. 10 of 13 BLA1011-200R; BLA1011S-200R NXP Semiconductors Avionics LDMOS transistors 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. 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In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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All rights reserved. 11 of 13 NXP Semiconductors BLA1011-200R; BLA1011S-200R Avionics LDMOS transistors product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BLA1011-200R_1011S-200R_1 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 01 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 12 of 13 NXP Semiconductors BLA1011-200R; BLA1011S-200R Avionics LDMOS transistors 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 7.1 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Application information. . . . . . . . . . . . . . . . . . . 3 Ruggedness in class-AB operation . . . . . . . . . 3 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 23 February 2010 Document identifier: BLA1011-200R_1011S-200R_1