INTEGRATED CIRCUITS DATA SHEET CGY2105ATS High dynamic range dual LNA MMIC Preliminary specification File under Integrated Circuits, IC17 1999 Dec 23 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS FEATURES GENERAL DESCRIPTION • Dual Low Noise Amplifier (LNA) Monolithic Microwave Integrated Circuit (MMIC) The CGY2105 is a dual Gallium Arsenide (GaAs) MMIC amplifier designed for use in very low noise figure applications, where high linearity is also required. • Typical noise figure of 0.55 dB • Typical gain of 16.3 dB at 1810 MHz Excellent tracking between the two amplifiers is obtained. Gain and noise figure variations with temperature are very small. • Input IP3 of 13.5 dBm at 1810 MHz • Low current of 58 mA at 2.5 V for each channel The device is suitable for use in DCS1800 and PCS1900 base station applications. • Low cost SSOP16 plastic package. It also provides high gain and very low noise performance at frequencies between 1.0 and 2.5 GHz, as used in Wireless Local Area Network (WLAN) applications. APPLICATIONS • DCS1800 • PCS1900. A rematching of the application board might be necessary for optimum performance. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION CGY2105ATS SSOP16 plastic shrink small outline package; 16 leads; body width 4.4 mm SOT369-1 BLOCK DIAGRAM handbook, full pagewidth OUT2 16 VG1 VG2 13 12 OUT1 9 CGY2105ATS 1, 2, 14, 15 3 4, 5 6 7, 8, 10, 11 FCA096 VS2 IN2 n.c. IN1 Fig.1 Block diagram. 1999 Dec 23 2 VS1 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS PINNING SYMBOL PIN DESCRIPTION VS2 1, 2, 14 and 15 IN2 3 amplifier 2 source amplifier 2 input VS2 1 16 OUT2 n.c. 4 not connected VS2 2 15 VS2 n.c. 5 not connected IN2 3 14 VS2 IN1 6 amplifier 1 input n.c. 4 VS1 7, 8, 10 and 11 handbook, halfpage amplifier 1 source 13 VG2 CGY2105ATS n.c. 5 12 VG1 amplifier 1 gate bias IN1 6 11 VS1 13 amplifier 2 gate bias VS1 7 10 VS1 16 amplifier 2 drain output VS1 8 9 OUT1 9 amplifier 1 drain output VG1 12 VG2 OUT2 OUT1 FCA097 Fig.2 Pin configuration. LIMITING VALUES SYMBOL PARAMETER CONDITIONS MIN. VDS drain-source voltage − VGS gate-source voltage VDG drain-gate voltage Vsupply positive supply voltage Vneg negative supply voltage Tamb TYP. MAX. UNIT − 5 −3 − +1 V − − 7 V see Chapter “Application and test information” − − 6 V see Chapter “Application and test information” −6 − − V ambient temperature −40 − +85 °C Tj junction temperature − − 150 °C Tstg storage temperature − − 150 °C Ptot total power dissipation − − 430 mW Tamb < 85 °C V THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 1999 Dec 23 PARAMETER thermal resistance from junction to ambient 3 VALUE UNIT 138 K/W Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS CHARACTERISTICS Tamb = 25 °C; measured and guaranteed only for the application shown in Chapter “Application and test information”; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies Isupply positive supply current (for each LNA) Ineg negative supply current (for each LNA) Vsupply = 5.0 V; Vneg = −5.0 V Vsupply = 5.0 V; Vneg = −5.0 V 42 58 72 mA − 0.3 0.4 mA Amplifiers: Vsupply = 5.0 V; Vneg = −5.0 V; Z0 = 50 Ω; both LNAs biased; duty cycle 100% fi input frequency G gain ∆G(T) gain variation with temperature 1710 − 1910 MHz fi = 1710 MHz 16 16.9 17.8 dB fi = 1710 to 1910 MHz 14.8 16.3 17.8 dB −40 °C < Tamb < +85 °C − ±0.45 − dB NF noise figure − 0.55 0.8 dB ∆NF(T) noise figure variation with temperature −40 °C < Tamb < +85 °C − ±0.25 − dB IP3i input third-order intercept point ∆f = ±0.5 MHz 11 13.5 − dBm ∆IP3i(T) input third-order intercept point variation with temperature −40 °C < Tamb < +85 °C − ±0.45 − dB ISOr reverse isolation 18 20 − dB ISOi isolation between inputs 21 23 − dB s11 input reflection coefficient 50 Ω source − −8.5 − dB s22 output reflection coefficient 50 Ω load − −22 − dB 1999 Dec 23 4 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS APPLICATION AND TEST INFORMATION Vsupply handbook, full pagewidth Vneg R2 R4 R3 R6 R5 R1 C2 C1 TRL6 C4 TRL5 C3 L1 L2 C5 C6 OUT1 OUT2 16 15 14 13 12 11 10 9 6 7 8 CGY2105ATS 1 2 3 4, 5 n.c. TRL4 TRL3 TRL2 TRL1 IN2 IN1 FCA098 The demonstration board has been optimized for a centre frequency of 1.8 GHz. The MMIC s-parameters (typical values) in a range from 0.1 to 6 GHz are available on request. Fig.3 Application diagram. 1999 Dec 23 5 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS Vneg handbook, full pagewidth OUT2 Vsupply Vsupply R2 C2 C4 R4 R6 R3 R1 C1 C3 R5 L2 OUT1 L1 C6 C5 TRL6 TRL5 TRL4 TRL3 TRL2 TRL1 IN2 IN1 FCA099 Designed for a centre frequency of 1.8 GHz. Fig.4 Application PCB layout. 1999 Dec 23 6 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC Table 1 CGY2105ATS List of components; see Figs 3 and 4 COMPONENT DESCRIPTION VALUE REFERENCE C1, C2 decoupling capacitor 1 nF Philips; NPO, 0603 C3, C4 decoupling capacitor 47 pF Philips; NPO, 0603 C5, C6 decoupling capacitor 47 pF Philips; NPO, 0603 R1, R2 drain biasing resistor 39 Ω Philips; XR7, 0805 R3, R4 gate biasing resistor 15 kΩ Philips; 0603 R5, R6 gate biasing resistor 10 kΩ Philips; 0603 L1, L2 drain biasing inductor 18 nH Coilcraft; 0603 Table 2 Transmission lines; see Figs 3 and 4 COMPONENT Z0 LENGTH IN λ LENGTH IN mm(1) WIDTH IN mm(1) TRL1, TRL2 100 Ω 0.08λ at 1800 MHz 10 mm 0.25 mm TRL3, TRL4 100 Ω 0.08λ at 1800 MHz 4 mm 0.80 mm TRL5, TRL6 100 Ω 0.08λ at 1800 MHz 3.4 mm 0.80 mm Note 1. Transmission line lengths and widths in mm are valid for a double sided PCB; thickness of 0.8 mm in FR4 material (ε = 4.7). 1999 Dec 23 7 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS Measured performance FCA100 20.0 FCA101 2.00 handbook, halfpage handbook, halfpage G (dB) NF (dB) 16.0 1.60 12.0 1.20 8.0 0.80 4.0 0.40 0.0 1.50 1.60 1.70 1.80 0.00 1.50 1.90 2.00 f (GHz) Vsupply = 5 V; Vneg = −5 V. 1.60 1.70 1.80 1.90 2.00 f (GHz) Vsupply = 5 V; Vneg = −5 V. Fig.5 Gain as a function of the frequency. Fig.6 Noise figure as a function of the frequency. FCA102 0.0 FCA103 20.0 handbook, halfpage handbook, halfpage s21 (dB) s11 (dB) 16.0 −2.5 12.0 −5.0 8.0 −7.5 4.0 −10.0 1.00 1.50 2.00 f (GHz) 0.0 1.00 2.50 Vsupply = 5 V; Vneg = −5 V. Fig.7 2.00 f (GHz) 2.50 Vsupply = 5 V; Vneg = −5 V. Input reflection coefficient s11 as a function of the frequency. 1999 Dec 23 1.50 Fig.8 8 Forward transmission coefficient s21 as a function of the frequency. Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS FCA104 0.0 handbook, halfpage s12 s22 (dB) (dB) −5.0 −5.0 −10.0 −10.0 −15.0 −15.0 −20.0 −20.0 −25.0 1.00 1.50 2.00 f (GHz) −25.0 1.00 2.50 Vsupply = 5 V; Vneg = −5 V. Fig.9 2.00 f (GHz) 2.50 Fig.10 Output reflection coefficient s22 as a function of the frequency. FCA106 0.0 handbook, halfpage ISOi Po (dBm) (dB) −10.0 10.0 −20.0 0.0 2.00 f (GHz) FCA107 20.0 handbook, halfpage 1.50 1.50 Vsupply = 5 V; Vneg = −5 V. Reverse transmission coefficient s12 as a function of the frequency. −30.0 1.00 FCA105 0.0 handbook, halfpage −10.0 −20.0 2.50 −10.0 0.0 Pi (dBm) 10.0 Vsupply = 5 V; Vneg = −5 V. Vsupply = 5 V; Vneg = −5 V. Fig.11 Isolation between RF inputs as a function of the frequency. Fig.12 RF output power as a function of the RF input power. 1999 Dec 23 9 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS PACKAGE OUTLINE SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm D SOT369-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 1.5 0.15 0.00 1.4 1.2 0.25 0.32 0.20 0.25 0.13 5.30 5.10 4.5 4.3 0.65 6.6 6.2 1.0 0.75 0.45 0.65 0.45 0.2 0.13 0.1 0.48 0.18 10 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 94-04-20 95-02-04 SOT369-1 1999 Dec 23 EUROPEAN PROJECTION 10 o Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS SOLDERING If wave soldering is used the following conditions must be observed for optimal results: Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering The footprint must incorporate solder thieves at the downstream end. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Wave soldering Manual soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. To overcome these problems the double-wave soldering method was specifically developed. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 1999 Dec 23 11 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Dec 23 12 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS NOTES 1999 Dec 23 13 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS NOTES 1999 Dec 23 14 Philips Semiconductors Preliminary specification High dynamic range dual LNA MMIC CGY2105ATS NOTES 1999 Dec 23 15 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 465008/01/pp16 Date of release: 1999 Dec 23 Document order number: 9397 750 06527