LED Driver Series for LCD Backlight White backlight LED drivers for medium to large LCD panels (SWREG type) No.09040EAT01 BD9202EFS ●Description BD9202EFS is the LED driver IC which loads the step-up DCDC controller and the constant electric current driver of 8ch. As for the constant electric current driver, PWM modulated light of 10bit gradation (1024stages) is possible with the register setting from 4 line serial interfaces. Because it can adjust brightness with every channel, back light is controlled in every area according to the light and shade of the picture, rise of contrast ratio is actualized. ●Features 1)8ch constant electric current driver built-in ・ Largest drive electric current 150mA/CH *2 ・10bit gradation (1024 stages) modulated light is possible by register setting ・To input the standard CLK of PWM from outside is possible (BCT_SYNC_IN terminal) ・Because it is high output resisting pressure (60V), the multi-stage connection of LED is p ossi b le ・Detecting abnormal mode with LED opening detection 2)Step-up DCDC controller built-in 3) UVLO function 4) 4 line serial interface 5) HTSSOP-A44 Package ●Applications For the equipment of loading LCD indicator of TV, monitor and note PC and the like ●Absolute maximum rating (Ta=25℃) Parameter Symbol Rating Unit Power supply voltage VCC CPUVDD 36 5.5 V V VREG 5.5 V LED1～8 terminal voltage VLED1～8 60 V EN,LOADSW terminal voltage VEN,VLOADSW 36 V FAIL1,FAIL2 terminal voltage VFAIL1,VFAIL2 VVREF, VISET, VVSET, VTEST, VBRT, VRT, VCS, VUVLO, VCOMP,VCP1,VCP2,VTOUT1, VTOUT2,VSWOUT,VOVPVCT_SYNC_IN, VCT_SYNC_OUT,VBCT_SYNC_IN, VBCT_SYNC_OUT 7 V -0.3～5.5＜ VREG V VREF,ISET,VSET,TEST,BRT,RT, CS,UVLO,COMP,CP1,CP2,TOUT1, TOUT2,SWOUT,OVP,CT_SYNC_IN, CT_SYNC_OUT,BCT_SYNC_IN, BCT_SYNC_OUT terminal voltage CPUDI,CPUCLK,CPUCS,CPUDO terminal voltage VCPUDI, VCPUCLK, VCPUCS, VCPUDO -0.3～5.5＜ CPUVDD V Power Dissipation Pd 4.5 *1 W Operating Temperature Range Topr -40～+85 ℃ Storage Temperature Range Tstg -55～+150 ℃ LED Maximum Current ILED 150 *2 *3 mA *1At the time of mounting 2 layer glass epoxy base-plate of 70mm×70mm×1.6mm, 36.0mW is reduced at 1 ℃ above Ta=25. *2 When the VF variation of LED is large, the loss quantity with the driver will increase, because there are times when package temperature rises, please do the base-plate design after considering heat dissipation measure sufficiently. *3It is the electric current quantity per 1ch. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/19 2009.04 - Rev.A Technical Note BD9202EFS ●Operating condition (Ta=25℃) Parameter Symbol Voltage range Unit VREG 5.25～5.5 V CPUVDD 2.7～5.5 V CT oscillation frequency setting range fCT 300～800 kHz CT_SYNC_IN input frequency range *4*5 FCT_SYNC_IN fCT～800 kHz Power supply voltage BCT oscillation frequency setting range fBCT 100～1000 kHz BCT_SYNC_IN input frequency range *4*5 FBCT_SYNC_I fBCT～1000 kHz VSET Input potential VSET 0.9～2.4 V *4 When not using external frequency input, please connect the terminal of CT_SYNC_IN, BCT_SYNC_IN to GND. *5When using external frequency input, please do not do the operation that is changed to internal oscillation frequency on midway. ● Electric characteristic （(Unless otherwise specified Ta=25℃，VCC=24V，VREG=5V, Parameter Symbol Min CPUVDD=3V） Limit Typ Max Unit Condition 【All the circuit electric currents】 Circuit electric currents Icc 6 13 21 mA VCC=24V CPUVDD=3V, EN=3V LED1～8=OFF Stand-by electric current IST - 0 10 uA EN=0V VREG Output voltage VREG 4.8 5 5.2 V Io=0mA,CREG=2.2uF VREG IREG 5 12 20 VREF 1.57 1.60 1.63 mA V RONH RONL - 7 2 - Ω Ω VOLIMIT 0.1 0.2 0.3 V VLED ICOMPSINK ICOMPSOURCE 0.55 40 -200 0.75 100 -100 0.95 V 200 uA VLED=2V,Vcomp=1V -40 uA VLED=0V,Vcomp=1V FCT 500 VREG ×0.7 600 700 VREG +0.3 VREG ×0.3 kHz RT=51kΩ 【VREG section】 VREG sink electric current VREF Output voltage At the time of external impressing of VREG=5.25VAt LED1～8=OFF,EN=3V Io=0uA 【Switching section】 SWOUT Source value of resistance SWOUT Sink value of resistance ION=-10mA ION=10mA 【OCP section】 Over-current protective operating voltage Vcs=Sweep up 【Error amplifier section】 LED Control voltage COMP Sink electric current COMP Source electric current 【CT Oscillator section】 CT Oscillation frequency CT_SYNC_IN input High voltage VSYNC_INH - V CT_SYNC_IN input low voltage VSYNC_INL -0.3 - CT_SYNC_OUT output high voltage VSYNC_OUTH VREG -1.0 VREG –0.15 - V IOL=-1mA CT_SYNC_OUT output low voltage VSYNC_OUTL - 0.1 0.5 V IOL=1mA FBCT 500 VREG ×0.7 600 700 VREG +0.3 VREG ×0.3 kHz V 【BCT Oscillator section】 BCT Oscillation frequency - BRT=51kΩ BCT_SYNC_IN input High voltage VBSYNC_INH V BCT_SYNC_IN input low voltage VBSYNC_INL -0.3 - BCT_SYNC_OUT output high voltage VBSYNC_OUTH VREG -1.0 VREG –0.15 - V IOL=-1mA BCT_SYNC_OUT output low voltage VBSYNC_OUTL - 0.1 0.5 V IOL=1mA V 【OVP section】 Over-voltage detection reference voltage OVP Hysteresis voltage VOVP 1.85 2.0 2.15 V VOVP=Sweep up VOVPHYS 0.4 0.5 0.6 V VOVP=Sweep down VUVLO_VREG VUHYS_VREG 2.6 50 2.9 100 3.2 200 V mV VUVLO_EXT 1.7 1.9 2.1 V VREG=Sweep down VREG=Sweep up UVLO=sweep down VUHYS_EXT 50 100 200 mV 【UVLO section】 UVLO (VREG) Detection voltage UVLO (VREG) Hysteresis voltage UVLO(EXT) Detection voltage UVLO(EXT) Hysteresis voltage www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/19 UVLO=sweep up 2009.04 - Rev.A Technical Note BD9202EFS Min Limit Typ Max Unit RON_LOAD 1.2 2.0 2.2 kΩ ILOAD=1mA VCP ICP 1.8 -2.0 2.0 -1.0 2.2 -0.5 V uA CP1,CP2=Sweep up CP1,CP2=0V ⊿ILED - - (5) % VISET VOPEN VSHORT 1.8 0.05 3.5 2.0 0.20 4.0 2.2 0.35 4.5 V V V Input High voltage VINH 0.7× - CPUVDD CPUVDD V Input Low voltage VINL -0.3 - CPUVDD V IIN -5 0 5 uA IEN 13 25 38 uA VIN=5V(CPUCS, CPUCLK,CPUDI), CPUVDD=5V VEN=5V(EN) VOUTH VOUTL 2.4 - 2.7 0.25 0.6 V V IOL=-1mA,CPUVDD=3V IOL=1mA,CPUVDD=3V VOL 0.07 0.14 0.28 V IOL=1mA Parameter Symbol 【LOADSW section】 LOADSW ON value of resistance 【Filter(CP1,CP2) section】 CP Detection voltage CP Charging current 【LED output (LED1～8) section】 LED Electric current absolute variation ISET Clamp voltage Open detection voltage Short detection voltage 【Logic input(EN,CPUCS,CPUCLK,CPUDI)】 Input influx electric current (CPUCS,CPUCLK,CPUDI) Input influx electric current (EN) 【Logic output section(CPUDO)】 output High voltage output Low voltage 【FAIL1,2outut open drain】 FAIL Low voltage +0.3 0.3× Condition ILED=75mA,VSET=1.65V RISET=130kΩ when input VSET＞VISET VLED=Sweep down VLED=Sweep up ＊This product is not designed for protection against radioactive rays. ●Block diagram VIN CIN + CREG VREG UVLO 15 34 VCC EN VREF RT CT_SYNC_IN CT_SYNC_OUT UVLO EXT Control Logic 31 OCP 35 ERR AMP 8 39 I/F 4 29 + + 32 1 3 20 Logic 22 23 Current driver 25 40 42 44 CP1 FAIL1 SWOUT CS PGND1 LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 18 ISET ISET OVP CP1 Driver + + 11 VSET 30 6 37 13 12 9 10 OVP PWM COMP OSC1 28 RPC TOUT2 TSD FILTER CPC CPUVDD CPUCS CPUCLK CPUDI CPUDO UVLO VREG VREG 16 AGND COMP LOADSW 33 14 41 COUT 2 PGND2 PGND3 PGND4 PGND5 21 24 17 43 PWMCLK BRT 27 OSC2 Open-Short Detect FILTER BCT_SYNC_IN 5 38 7 BCT_SYNC_OUT CP2 CP2 FAIL2 36 Nov.29.2007 26 TEST 19 www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/19 TOUT1 2009.04 - Rev.A Technical Note BD9202EFS LED8 PGND5 LED7 EN TOUT 2 COMP BCT_SYNC_IN CT_SYNC_IN BCT_SYNC_OUT CT_SYNC_OUT UVLO LOADSW PGND1 SWOUT OVP CS RT BRT TOUT 1 LED6 PGND4 LED5 ●Pin configuration 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 17 18 19 20 21 22 LED4 16 PGND3 15 LED3 14 TEST 13 VSET 12 ISET FAIL1 11 VREF CP2 10 VREG CP1 9 VCC LED2 8 CPUCS PGND2 7 CPUCLK 6 CPUVDD 5 CPUDO 4 CPUDI 3 AGND 2 FAIL2 1 LED1 BD９２０２EFS ●Terminal number， terminal name PIN No. Terminal name (1) (2) (3) LED1 PGND2 LED2 (4) CP1 Function PIN No. Terminal name LED output terminal1 GND2 for LED LED output terminal2 Condenser connected terminal for filter setting 1 Condenser connected terminal for filter setting 2 (23) (24) (25) LED5 PGND4 LED6 (26) TOUT1 (27) BRT (5) CP2 (6) FAIL1 Malfunction detection output 1 (28) RT (7) FAIL2 Malfunction detection output 2 (29) CS Function LED output terminal 5 GND4 for LED LED output terminal 6 Output terminal 1 for test monitor 1 BCT oscillation frequency setting resistant connected terminal CT oscillation frequency setting resistant connected terminal DC/DC output electric current detection terminal DC/DC Over-voltage detection terminal DC/DC Switching output terminal GND1 for LED Load switch control terminal It is the prevention detection terminal for miss operating at low voltage CT Synchronization signal output terminal BCT Synchronization signal output terminal CT Synchronization signal input terminal BCT Synchronization signal input terminal (8) AGND Small signal section GND (30) OVP (9) (10) (11) CPUDI CPUDO CPUVDD Serial interface DATA input terminal Serial interface DATA output terminal Serial interface Power supply terminal (31) (32) (33) SWOUT PGND1 LOADSW (12) CPUCLK Serial interface CLK input terminal (34) UVLO (13) CPUCS Serial interface CS input terminal (35) CT_SYNC_OUT (14) VCC Power supply terminal (36) BCT_SYNC_OUT (15) VREG Series regulator output terminal (37) CT_SYNC_IN (16) VREF Reference voltage output terminal (38) BCT_SYNC_IN (17) ISET (39) COMP Error amplifier output terminal (18) (19) (20) (21) (22) VSET TEST LED3 PGND3 LED4 LED fixed electric current setting resistant connected terminal DC modulated light voltage input terminal Test mode change terminal Output terminal 3 GND3 for LED LED output terminal 4 (40) (41) (42) (43) (44) TOUT2 EN LED7 PGND5 LED8 Output terminal 2 for test monitor Enabling terminal LED output terminal 7 GND5 for LED LED output terminal 8 www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 4/19 2009.04 - Rev.A Technical Note BD9202EFS ●The reference data (Unless otherwise specified VCC=24V and Ta=25 ℃) 110 5.5 OSC1,OSC2 FREQUENCY [kHz] 5.3 100 EFFICIENCY [%] VREG [ V ] 700 VCC=24V, Io=0mA VCC=24V, Io=0mA 5.1 4.9 4.7 90 80 70 4.5 -40 -15 10 35 60 680 660 640 620 600 580 540 520 500 60 85 -40 0 Ta [℃] Fig.1 VREG Temperature characteristic 200 400 600 800 1000 -15 10 1200 35 60 85 Ta [℃] IDCDC [mA] Fig.3 Fig.2 VREF Temperature characteristic 100 VCC=24V, RT(BRT)=51kΩ 560 90 OSC1,OSC2 Temperature re characteristic 1.0 80 0.9 VCC=24V, RSET=68kΩ 40 VCC=24V, RSET=130kΩ VFB [ V ] 60 ILED [ mA ] ILED [ mA ] 85 80 75 20 VCC=24V, RSET=68kΩ 0.8 0.7 0.6 0.5 0 70 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -40 -40 VLED [V] Fig.4 ILED depending on VLED -15 10 35 60 -15 10 85 35 60 85 Ta [℃] Ta [℃] Fig.5 ILED Temperature characteristic Fig.6 VSET Constant electric current characteristic 1.0 10 100 0.9 80 0.8 0.7 8 60 VREG [ V ] ILED [ mA ] VFB [ V ] VCC=24V 40 20 6 4 0.6 2 0 0.5 0.0 -40 -15 10 35 Ta [℃] Fig.7 VLED characteristic 60 0.5 1.0 1.5 2.0 2.5 3.0 0 VLED [V] 85 0 Temperature 0.9 5 100 EFFICIENCY [%] VFB [ V ] VSHORT[ V ] 4 110 4.5 3.5 3 Fig.9 EN Threshold voltage 1.0 4.0 2 VEN [V] Fig.8 ICC-VCC characteristic 5.0 1 0.8 0.7 0.6 90 80 VCC=24V, recommendation 70 for external part use 3.0 60 0.5 -40 -15 10 35 60 85 Ta [℃] Fig.10 Short detection temperature characteristic www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. -40 -15 10 35 60 85 Ta [℃] Fig.11 Open detection temperature characteristic 5/19 0 200 400 600 800 1000 1200 IDCDC [mA] Fig.12 Efficiency 2009.04 - Rev.A Technical Note BD9202EFS ●Functional explanation ○ VREG The fixed voltage of 5V is generated from VCC. It starts when it becomes EN=H. UVLO (Under Voltage LOCK Out) is built in by VREG, When it is below 2.9V (typ)，the internal circuit stops. When it is above 3.0V (typ), the internal circuit operation starts. Please connect Creg=2.2 μ F to the VREG terminal, as a capacity for phase compensation. In order to make IC heat generation decrease, impressing voltage into the VREG terminal from outside, it is possible to decrease the loss with the regulator inside IC. In this case, as for the impressing voltage, please impress that of above output voltage (5.25V5.5V) of the internal regulator. ○ UVLO (Under Voltage Lock Out) There are UVLO (REG) which detects VREG voltage① and UVLO (VCC) ② which detects VCC voltage in UVLO. When each UVLO is below specified value, the internal circuit is made to stop. (The logic section is reset.) Detecting circuit Detection object Detection Cancellation UVLO (VREG) VREG Below2.9V(typ) Above 3.0V(typ) UVLO (VCC) VCC partial pressure input Below1.9V(typ) Above 2.0V(typ) Please do not connect VCC terminal (> 5.25V) to the UVLO terminal (for VCC detection) directly. Because there is a possibility of destruction, please be sure to input with partial pressure. ○ Fixed electric current driver Fixed current value of the fixed electric current driver can be got by constant doubling the standard electric current which is decided by the resistance (RSET) of being connected to ISET and the voltage which are input into the VSET terminal. In addition continual electric current variable (analog modulated light) is possible by changing VSET voltage from outside. In addition, it is possible to do PWM modulated light by the fact that the data is input to the internal register from the serial interface section. It is possible to set the Duty value of PWM for each channel. ・Setting of fixed current value Fixed current value (DC value) of the LED driver is a relational expression below. ILED=｛VSET/(RSET[kΩ]+20[kΩ]) ｝×7980－8 [mA] However, when VSET voltage is above 2V, it reaches the point where it is clamped with 2V inside IC, fixed current value above that does not increase. In addition, please input VSET in the range of 0.6V-2.4V. Characteristic RSET- ILE D特 性 160 140 IL ED[m A] 120 100 Calculated value 計算値 (実線） Solid line 80 60 Survey value 実測値 (Marker) ( マ ーカー） 40 20 0 0 ・ 100 200 300 400 R S E T[kΩ ] 500 600 700 800 VREF normal output In VREG block, VREF (1.6V (typ.)of reference voltage output is provided. The necessity of doing the voltage impression from outside by the fact that this terminal is connected to the VSET terminal is gone. However, because the voltage variation of VREF is to be reflected on the variation of LED fixed electric current directly, so that please pay attention to it. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/19 2009.04 - Rev.A Technical Note BD9202EFS ○ Serial interface section This IC is controlled by 4 line serial interfaces of CPUCLK, CPUCS,CPUDI and CPUDO. The data entry format and timing are shown below. In the case of WRITE CPUCS tCYC tCSS CPUCLK 1 tDIS 2 3 tCLKH 4 5 6 7 tDIH CPUDI W tCSH 8 9 10 11 12 13 14 15 16 tCLKL A5 A4 A3 A2 A1 A0 D7 * CPUDO D6 D5 D4 D3 D2 D1 D0 Hi-Z In the case of READ CPUCS tCYC tCSS CPUCLK 1 tDIS CPUDI 2 3 4 tCLKH 5 6 7 tDIH R A5 tCSH 8 9 10 11 12 13 14 15 16 tCLKL A4 A3 A2 A1 A0 * * * * * * * * D6 D5 D4 D3 D2 D1 * tDOD CPUDO D7 Hi-Z D0 Hi-Z ・It does not correspond to the continual entry of the data. It is necessary to set CPUCS into L in every address. ・There is no function of the automatic increment of address. ・Address width is correspondence to 6bit, but please do not access the address other than 00h-11h absolutely. AC electric quality Function CPUCLK Periods CPUCLK high level width CPUCLK low level width CPUDI input set up time CPUDI input hold time CPUCS input set up time CPUCS input hold time CPUDO Output delay time Symbol tCYC tCLKH tCLKL ｔＤIＳ ｔＤIＨ ｔＣSＳ ｔＣSＨ ｔＤOＤ Min Limit Typ Max 100 35 35 50 50 50 50 - - 40 Unit ｎｓ ｎｓ ｎｓ ｎｓ ｎｓ ｎｓ ｎｓ ｎｓ （Output load：15pF） www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/19 2009.04 - Rev.A Technical Note BD9202EFS Register map Addres Initial R/W s value Register name 00H R/W 00h PWMCNT 01H R/W 00h 02H R/W 00h 03H R/W 00h 04H R/W 00h 05H R/W 00h 06H R/W 00h 07H R/W 00h 08Ｈ R/W 00h 09H R/W 00h 0AH R/W 00h 0BH R/W 00h 0CH R/W 00h 0DH R/W 00h 0EH R/W 00h 0FH R/W 00h 10H R/W 00h 11H R/W 00h LEDEN SETPWM1 1 SETPWM 12 SETPWM 21 SETPWM 22 SETPWM 31 SETPWM 32 SETPWM 41 SETPWM 42 SETPWM 51 SETPWM 52 SETPWM 61 SETPWM 62 SETPWM 71 SETPWM 72 SETPWM 81 SETPWM 82 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bitφ PWMRS - - - - - PARADRV PWMEN LED8EN PWM LED1[7] - LED7EN PWM LED1[6] - LED6EN PWM LED1[5] - LED5EN PWM LED1[4] - LED4EN PWM LED1[3] - LED3EN PWM LED1[2] - PWM LED2[7] - PWM LED2[6] - PWM LED2[5] - PWM LED2[4] - PWM LED2[3] - PWM LED2[2] - PWM LED3[7] - PWM LED3[6] - PWM LED3[5] - PWM LED3[4] - PWM LED3[3] - PWM LED3[2] - PWM LED4[7] - PWM LED4[6] - PWM LED4[5] - PWM LED4[4] - PWM LED4[3] - PWM LED4[2] - PWM LED5[7] - PWM LED5[6] - PWM LED5[5] - PWM LED5[4] - PWM LED5[3] - PWM LED5[2] - PWM LED6[7] - PWM LED6[6] - PWM LED6[5] - PWM LED6[4] - PWM LED6[3] - PWM LED6[2] - PWM LED7[7] - PWM LED7[6] - PWM LED7[5] - PWM LED7[4] - PWM LED7[3] - PWM LED7[2] - PWM LED8[7] - PWM LED8[6] - PWM LED8[5] - PWM LED8[4] - PWM LED8[3] - PWM LED8[2] - LED2EN PWM LED1[1] PWM LED1[9] PWM LED2[1] PWM LED2[9] PWM LED3[1] PWM LED3[9] PWM LED4[1] PWM LED4[9] PWM LED5[1] PWM LED5[9] PWM LED6[1] PWM LED6[9] PWM LED7[1] PWM LED7[9] PWM LED8[1] PWM LED8[9] LED1EN PWM LED1[0] PWM LED1[8] PWM LED2[0] PWM LED2[8] PWM LED3[0] PWM LED3[8] PWM LED4[0] PWM LED4[8] PWM LED5[0] PWM LED5[8] PWM LED6[0] PWM LED6[8] PWM LED7[0] PWM LED7[8] PWM LED8[0] PWM LED8[8] Function PWM control T register LED ON/OFF Control register Register 1 for setting LED1 PWM ( Subordinate bit setting) Register 2 for setting LED1 PWM (Superior bit setting) Register 1 for setting LED2 PWM (Subordinate bit setting) Register 2 for setting LED2 PWM (Superior bit setting) Register 1 for setting LED3 PWM (Subordinate bit setting) Register 2 for setting LED3 PWM (Superior bit setting) Register 1 for setting LED4 PWM (Subordinate bit setting) Register 2 for setting LED4 PWM (Superior bit setting) Register 1 for setting LED5 PWM (Subordinate bit setting) Register 2 for setting LED5 PWM (Superior bit setting) Register 1 for setting LED6 PWM (Subordinate bit setting) Register 2 for setting LED6 PWM (Superior bit setting) Register 1 for setting LED7 PWM (Subordinate bit setting) Register 2 for setting LED7 PWM (Superior bit setting) Register 1 for setting LED8 PWM (Subordinate bit setting) Register 2 for setting LED8 PWM (Superior bit setting) All registers are reset by each condition below. ①UVLO(VREG)＜2.9V(typ.) ②UVLO(EXT)＜1.9V(typ.) ③Thermal shutdown detection (Tj＞175℃) ④Register PWMRST=1( exclude PWMRST itself) ●ADDR=00h PWMCNT(PWM Control register : Read/Write) Bit 7 6 5 Register PWMRST not_used not_used name Initial value 0 0 0 PWMEN 0 1 PARADRV 0 1 4 3 2 1 0 not_used not_used not_used PARADRV PWMEN 0 0 0 0 0 PWM mode control disable (Default) PWM mode enable LED output control To control LED1-LED8 independently To control LED1and 2, LED3 and 4, LED5 and 6, LED7 and 8 simultaneously PWMRST PWM logic reset control 0 Normal Function (Default) 1 Logic reset When it makes PWMRST = ' 1 ', PWM Logic and all registers (the PWMRST register is excluded) is reset. To make normal operation, it is necessary to reset if make PWMRST= ' 0 '. When it makes PARADRV= ' 1 ', because LED1 and LED2 (LED3 and LED4, LED5 andLED6, LED7 and LED8) operate synchronously (following the setting of LED of odd number turn), when you use the output of LED1 and LED2 (LED3and LED4, LED5 and LED6, LED7 and LED8) by short-circuiting, it operates as each heavy-current driver of ILEDMAX=300mA. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/19 2009.04 - Rev.A Technical Note BD9202EFS ●ADDR=01h LEDEN(LED ON/OFF Control register : Read/Write) Bit 7 6 5 Register LED8EN LED7EN LED6EN name Initial value 0 0 0 LED1(～8)EN 0 1 4 3 2 1 0 LED5EN LED4EN LED3EN LED2EN LED1EN 0 0 0 0 0 LED1 (～8) output control OFF (Default) Usual ON When doing PWM modulated light with PWMEN of ADDR=00h, if LED1 of ADDR=01h (8) EN is designated as 1, it becomes regular ON. (LED1 (8) EN takes precedence.) So after that, if LED1 (8) EN is designated as 0, it returns to the PWM modulated light that is set at beginning. ●ADDR=02h SETPWM11(Register 1 for setting LED1 PWM （Subordinate bit setting）: Read/Write) Bit 7 6 5 4 3 2 1 0 Register PWMLED1 PWMLED PWMLED1 PWMLED1 PWMLED1 PWMLED1 PWMLED1 PWMLED1 name [7] 1[6] [5] [4] [3] [2] [1] [0] Initial value 0 0 0 0 0 0 0 0 ●ADDR=03h SETPWM12((Register 2 for setting LED1 PWM (superior bit setting) : Read/Write) Bit 7 6 5 4 3 Register not used not used not used not used not used name Initial value 0 0 0 0 0 2 not used 0 1 0 PWMLED1 PWMLED1 [9] [8] 0 0 It sets Duty of PWM modulated light with the total 10bit of Bit70 of ADDR=02h and Bit1-0 of ADDR=03h. To set the subordinate position 8bit with ADDR=02h and the Superior position 2bit with ADDR=03h. (Chart below) PWMLED1 [9:0] “0000000000” “0000000001” “0000000010” “0000000011” ～ “1111111100” “1111111101” “1111111110” “1111111111” LED1 Pulse width Usual ‘L’ (Default) PWMCLK 1 Clock width PWMCLK 2 Clock width PWMCLK 3 Clock width ～ PWMCLK 1020 Clock width PWMCLK 1021 Clock width PWMCLK 1022 Clock width PWMCLK 1023 Clock width ●ADDR=04h～11h The setting method is similar to LED1 of ADDR=02h,03h is described above with the PWM pulse width setting register of LED28. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/19 2009.04 - Rev.A Technical Note BD9202EFS PWM設定例 PWM Setting example PWMCLK(=FBCT) (600kHz) PWMEN (resister) COUNT [9:0] (internal) 0 1 2 3 4 5 300 6 1021 1022 1023 0 PWMLED1 [9:0] = 300d = 12Ch LED1ON (internal) PWMLED2 [9:0] = 6d = 006h LED2ON (internal) 1.71ms（586Hz） ※ When count [ 9:0 ] becomes 1, LEDON will become High and then LED lights up. When COUNT [ 9:0 ] reaches to the value that is set by PWM pulse, LEDON will become Low and the light goes out. ※ COUNT [9:0 ] =1 with Illumination timing of each channel becomes being identical. ※ ※ When setting of pwm modulated light is modified, it is reflected being at the point where COUNT [ 9:0 ] is reset to 0 (It is not immediately reflection with register entry) After writing ' 1 ' in PWMEN, the delay of 0 ～maximum of 1 clocks occurs until LED lights up. ○ Register setting example of LED illuminations ・ When illuminates LED3 and LED8 regular (100% illumination) ① (ADDR,DATA)＝(01h､84h) → Operation of regular illumination ・ When it does PWM modulated light with 40% to LED3, and 80% to LED8, 1024×40%=409 , 1024×80%=819 Because (409)DEC=(199)HEX , (819)DEC=(333)HEX ① (ADDR,DATA)＝(06h､99h) (ADDR,DATA)＝(07h､01h) →Setting LED3 to 40% ② (ADDR,DATA)＝(10h､33h) (ADDR,DATA)＝(11h､03h) →Setting LED8 to 80% →Operation of modulated light ③ (ADDR,DATA)＝(00h､01h) ○ The method connected control wire when plural IC is used Connected method of the control wire when plural BD9202EFS is controlled with one CPU is shown. You connect CPUCLK and CPUDI in parallel (note the ability of respective drive), CPUCS wires in each BD9202EFS. CPU BD9202 No.1 CPUCS DATA CLK CS1 CPUDI CPUCLK BD9202 No.2 CS2 CPUCS CS3 CPUDI CPUCLK BD9202 No.3 CPUCS CPUDI CPUCLK www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/19 2009.04 - Rev.A Technical Note BD9202EFS ○Booster DC/DC Controller ・ LED Series Numeric It detects the LED cathode voltage, or the LED voltage, and controls the output voltage to be 0.75 (Typ.). The booster only operates when the LED output is operating. When multiple LED outputs are operating, the LED VF controls the LED output of the highest line to be 0.75V (Typ.). Therefore, the voltages of other LED outputs are higher by the variation of VF. Furthermore, you must be aware that the LED inline numerics have the following limits. At open detection, 85% of the OVP configured voltage becomes the trigger, so the maximum value of output voltage during normal operation is 51V=60×0.85, and 51V/VF>maximum N. ・ Over voltage Protection Circuit OVP Inputs the output voltage to the OVP terminal with resistive divide. The configured value of OVP should be determined by the series numeric of the LED and the VF variance. When determining the OVP configured voltage, the open detection trigger, OVP×0.85 should be considered. The switching operation stops when OVP is detected. Furthermore, if the output voltage falls to 80% of the OVP configuration voltage within the filter time tcp1 determined by CP1, OVP is released. If OVP continues for over tcp1, the error detection flag FAIL1 turns to Low, it latches with the switching operation in the stopped position. When the output voltage side is ROVP1 and the GND side is ROVP2, the OVP detection voltage is: VOVP=(ROVP1+ROVP2)/ROVP2×2.0V When ROVP1=560kΩand ROVP2=20kΩ, OVP activates when VOUT=58V or more. ・ Booster DC/DC Converter Oscillation Frequency and LED Driver PWM Standard Frequency By attaching resistance to RT (BRT), it is possible to configure triangular wave oscillation frequency. The RT (BRT) determines the charge and discharge current corresponding to the internal condenser, and the frequency changes. Configure the RT (BRT) resistance by referring to the theoretical formula below. We recommend a range of 30kΩ ~300kΩ. Configurations outside of the frequency range in the chart below can result in stopping switching, and operation cannot be guaranteed. R T(B R T)-FOSC特 性 RT(BRT)-FOSC Characteristics 1200 1000 fOS C [kHz] 800 Calculated Value 計算値 (Actual Line) 600 fosc (実線） 3.04 10 4 [kHz] RT (BRT )[ kΩ] 実Measured 測値 ( マ ーValue カー ） 400 (Marker) 200 0 0 ・ 100 200 300 R T(BR T)[kΩ ] 400 500 600 Internal Oscillation Frequency Output Terminal CT_SYNC_OUT and External Synchronous Terminal CT_SYNC_IN The internal oscillation frequency output terminal CT_SYNC_ OUT outputs the internal oscillator’s clock configured by the RT terminal. However, there is no output when there is a CLK input in the external synchronous terminal CT_SYNC_IN. The external synchronous terminal CT_SYNC_IN can be the operational frequency of the DC/DC converter by externally inputting CLK. At this time, the external input frequency should be configured to be higher than the internal oscillation frequency. Furthermore, there should be no switching between the external synchronous and internal oscillator during operation. ・ Soft Start There is no soft start function with this IC. At startup, stand-up occurs with control by the current value configured by OCP (over-current detection). ・ Over-current Protection Circuit (OCP) The current flowing through the coil is changed to voltage by the sense resistance Rcs, and when the CS terminal is over 0.2V (typ), the switching operation is stopped. OCP detection is in pulse-by-pulse format, and is detected at every switching cycle and reset at the next clock. When detection continues longer than the time configured at tCP1, FAIL1=L and it latches with the switching operation in the stopped position. ○ Error Detection Output Function ・ Outputs errors detected by protection circuits to FAIL1 and FAIL2 terminals. FAIL1 or FAIL2 switch to Low after the filter time configured at CP1 or CP2, when they detect OVP or OCP (FAIL1) or LED open/short (FAIL2). (Because FAIL1 terminal is open collector output, it is used with external pull-up.) The filter time for CP1 and CP2 is expressed as: www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Tcp1(cp2) 11/19 Ccp1 2V 1μA 2009.04 - Rev.A Technical Note BD9202EFS 【Protection Functions】 Logic at detection FAIL1 FAIL2 Protection Function Detection Release Type UVLO (VREG) UVLO (EXT) TSD VREG＜2.9V UVLO＜1.9V Tj＞175℃ VOVP＞2.0V & t>tCP1 VCS≧0.2V & t>tCP1 VLED＜0.2V & VOVP＞1.7V VLED≧4.0V VREG＞3.0V UVLO＞2.0V Tj＜150℃ Hysteresis Hysteresis Hysteresis H H H H H H VOVP＜1.5V Latch L H VCS＜0.2V Latch L H Latch H L Latch H L OVP OCP LED open detection LED short detection VLED＞0.2V & VOVP＜1.6V VLED＜4.0V To clear the latch type, the logic section must be reset. Protection Function UVLO (VREG) UVLO (EXT) TSD OVP OCP LED open detection LED short detection *1 *1 Operation at protection function detection LOADSW LED Dr ON All CH stop ON All CH stop ON All CH stop OFF (All CH stop) *2 OFF Normal operation ON All CH stop ON All CH stop DCDC Stop Stop Stop Stop Current limit Stop Stop Internal logic Reset Reset Reset Normal operation Normal operation Normal operation Normal operation *1 LED open and short detection is only valid with operating channels, and all CH turn to OFF when 1-ch error is detected. Furthermore, it is only valid in the ON areas during PWM operation. *2 Because the DC/DC converter stops and there is no voltage supply for the LED, the light will be turned off. ● Selection of External Parts 1. Selection of Coil (L) The value of the coil greatly affects the input ripple current. As presented in formula (1), the larger the coil and the higher the switching frequency, the lower the ripple current. ΔIL ΔIL VCC (VOUT Vcc) Vcc [ A] ・・・・・ (1) L VOUT ｆ When efficiency is expressed as in formula (2), the input peak current is as shown in formula (3). IL L VOUT CO VOUT IOUT ・・・・・ (2) Vcc Icc ILMAX Icc ΔIL VOUT IOUT ΔIL ・・・・・ (3) 2 Vcc 2 ※ If current that is stronger than the coil’s fixed current value flows through the coil, there is magnetic saturation in the coil, lowering efficiency. A margin large enough should be considered during selection, so that the peak current does not exceed the coil’s fixed current value. ※ To lessen loss from the coil and improve efficiency, coils with low resistance components (DCR and ACR) should be selected. 2. Selection of Output Condenser (Co) The stability domain of the output voltage and equivalent series resistance necessary to smooth out the ripple voltage should be consideredVCC when choosing a condenser for the output side. The output ripple voltage is determined by formula (4). ΔVOUT ILMAX RESR L IL VOUT ESR l IOUT 1 [V ] ・・・・・ (4) Co ｆ (ΔIL: output ripple current, ESR: equivalent series resistance of Co, η: efficiency) ※The condenser’s fixed value should be selected with enough margin for the output voltage. CO www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 12/19 2009.04 - Rev.A Technical Note BD9202EFS 3. Selection of Input Condenser (Cin) The input condenser selected should have low ESR with enough capacity to be compatible large ripple current, in order to prevent large transient voltage. VCC The ripple current IRMS can be derived from formula (5). Cin IRMS IOUT L IL VOUT VOUT [ A] ・・・・・ (5) Furthermore, because it relies heavily on the characteristics of the power used for input, the wiring pattern on the substrate and MOSFET gate drain capacity, the usage temperature, load range and MOSFET conditions must be adequately confirmed. CO ● (VOUT VCC) VOUT 4. Selection of MOSFET for Load Switch, and its Soft Start Because there are no switches on the route between the VCC and the VO with regular boost applications, in case of an output short circuit the coil or rectification diode may be damaged. To prevent this from happening, a PMOSFET load switch should inserted between the VCC and the coil. PMOSFET with better ability to withstand pressure between gate-source and drain-source than VCC should be selected. To initiate soft start of the load switch, insert capacity between the gate and source. 5. Selection of Switching MOSFET There are no problems as long as the absolute maximum rating of the current rating is L and the pressure threshold and rectification diode of C are at least VF, but in order to actualize high-speed switching, one with small gate capacity (injected charge amount) should be selected. ※ Excess of over current protection configuration recommended ※ Higher efficiency can be gained if one with smaller ON resistance is selected. 6. Selection of Rectification Diode Select a Schottky barrier diode with higher current ability than the current rating of L and higher reverse pressure threshold than the threshold of C, particularly with low forward voltage VF. Phase Compensation Configuration Method ・Stability of Applications Feedback stability conditions for reverse feedback are as follows: ・ Phase-lag of less than 150°(phase margin of over 30°) when gain is 1 (0dB) Furthermore, DC/DC converter applications have been sampled by the switching frequency, so the GBW of the entire line is configured at less than 1/10 of the switching frequency. To sum up, the characteristics aimed for by applications are as outlined below: ・ Phase-lag less than 150°(phase margin over 30°) when gain is 1 (0dB) ・ The GBW (frequency of gain 0dB) at that time is less than 1/10 of switching frequency Therefore, to improve the response with GBW limitations, it is necessary to make the switching frequency higher. The trick to secure stability by phase compensation is to cancel out the second phase lag (-180°) generated by LC resonance with two phase leads (insert two phase leads). Phase leads are by the output condenser’s ESR component or the error amp output Comp terminal’s CR. With DC/DC converter applications, there is always a LC resonance circuit at the output, so the phase lag at that section is 180°. If the output condenser has large ESR (several Ω), such as an aluminum electrolysis condenser, a phase lead of +90°is generated, and the phase lag is -90°. When using an output condenser with low ESR such as a ceramic condenser, insert R for the ESR component. VCC VCC fr VOUT CO 1 2 LCO fr [ Hz] VOUT Resonance point phase lag -180° RESR 1 2 LCO fESR Resonance [ Hz] -180° point 1 Phase lead [ Hz] 2RESRCo Phase lag -90° CO With the changes in phase characteristics by caused by ESR, the number of phase leads to be inserted is one. The frequency configuration to insert phase lead should ideally be configured close to the LC resonance frequency in order to cancel LC resonance. This configuration is for simplicity, and no detailed calculations have been carried out, so there are times when adjustments on the actual product are necessary. These characteristics change depending on substrate layout and load conditions, so ample confirmation is necessary during design for mass production. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 13/19 2009.04 - Rev.A Technical Note BD9202EFS ●Electricity Consumption Calculations Pc(N)=ICC*VCC+2*Ciss*VREG*Fsw*Vcc*[VLED*N+ΔVf*(N-1)]*ILED ：Maximum circuit current ：Power voltage ：External FET capacity ：SW gate voltage ：SW frequency ：LOAD SW ON resistance ：LOAD SW maximum inflowing current ：LED control voltage ：LED parallel numeric ：LED Vf variance ：LED output current ICC VCC Ciss Vsw Fsw Rload Iload VLED N ΔVf ILED ＜Sample calculation＞ When Pc(8)=21mA×30V+500pF×5V×600kHz×30V+[0.95V×8+ΔVf×7] ×75mA ΔVf=1.2V (about 0.1V each), Pc(8)=0.63W+0.045W+1.2W =1.875W Because this IC has a built-in driver circuit, there is a considerable amount of heat generated. Careful consideration is necessary for substrate and heat dissipation design. ●PCB Board Circuit Diagram RVCC＝300Ω VCC 14 CVCC=10uF 1 2 3 4 RVULO1 ＝91kΩ LED8 44 PGND5 43 LED7 42 CP1 EN 41 CP2 TOUT2 40 6 FAIL1 COMP 39 7 FAIL2 BCT_SYNC_IN 38 8 AGND CT_SYNC_IN 37 1 LED1 2 PGND2 3 LED2 4 5 RUVLO2 =10kΩ J4 GND J3 CT_SYNC_IN 37 BCT_SYNC_IN 38 RE-H42TD-1130 CP1=27pF CPUVDD CP2=27pF RFL1=5.1kΩ RPC=300Ω 9 CPUDI 10 CPUDO 11 CPUVDD 12 CPUCLK 13 CPUCS 14 VCC 15 VREG 16 17 BD9202EFS CPC＝1uF RFL2=5.1kΩ BCT_SYNC_OUT 36 CT_SYNC_OUT 35 UVLO 34 LOSDSW 33 PGND1 32 SWOUT 31 OVP 30 VREF CS 29 ISET RT 28 RLD1 =5.1kΩ LED1 1 CLD Q1 LED8 44 L1 47uH LED7 42 D1 RESR CVOUT =220uF RLPF=100Ω RSET=68kΩ RCT=51kΩ RBCT=51kΩ VSET BRT 27 19 TEST TOUT1 26 20 LED3 LED6 25 21 PGND3 PGND4 24 22 LED4 LED5 23 ROVP1= 560kΩ LED6 25 Q2 CREG=2.2uF 18 LED2 3 RLD2 =5.1kΩ CLPF =1000pF ROVP2 =20kΩ RCS=51mΩ LED5 23 LED3 20 LED4 22 CSGND J5 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 CPUVDD 11 CPUDCLK 12 CPUDO 10 CPUCS 13 PGND1 32 CPUDI 9 EN 41 08FDZ-ST (1) VREF 16 VSET 18 J2 J1 12FDZ-BT BCT_SYNC_IN 38 BCT_SYNC_OUT 36 CT_SYNC_IN 37 CT_SYNC_OUT 35 1 2 3 4 5 6 7 8 08FDZ-ST (2) ○ ○ ○ ○ ○ ○ The CVCC and CREG decoupling condensers should be placed as close as possible to the IC pin. Because high current can flow through CSGND and PGND1~4, they should all be wired independently with low impedance. Do not apply noise to 17-pin ISET, 18-pinVSET, 27-pin BRT, 28-pin RT and 39-pin COMP. 1-pin LED, 3-pin LED2, 20-pin LED3, 22-pin LED4, 23-pin LED5, 25-pin LED6, 31-pin SWOUT, 35-pin CT_CYNC_OUT, 36-pin BCT_SYNC_OUT, 42-pin LED7 and 44-pin LED8 switch, so make sure they do not affect the surrounding pattern. The thick-lined areas should be laid out as short as possible with broad pattern. During normal use, the jumper configurations are J1～J4=Short and J5=open. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 14/19 2009.04 - Rev.A Technical Note BD9202EFS ●External Parts for PCB Board Name Connector Ceramic Type Parts Number Connecting Point Size Maker Pieces/Board 2 For SPI/IF 22 05 2081 - - Molex For LED Board I/F 22 05 2121 - - Molex 1 For Power Supply 22 01 2045 - - Molex 1 - - CSS 1005 murata 1 27pF GRM1882C1H270JA01 CP1 , CP2 1608 murata 2 1000pF GRM15XB11H102KA86 CLPF 1005 murata 1 10uF GRM55D31106KA87 CVCC 5750 murata 1 2.2uF GRM188R71A225KE15 CREG 1608 murata 1 1uF GRM188R71A105KA61 CPC 1608 murata 1 - - CLD 3225 murata 1 Tantal 220uF UVR5A221MPD CVOUT - Rubicon 1 Resistance 5.1kΩ MCR03Series5101 RLD1 , RLD2 , RFL1 , RFL2 1608 ROHM 4 PMOS NMOS Indactance Diode ※ - - RESR 3216 - 1 51mΩ MCR10SeriesR051 RCS 2012 ROHM 1 100Ω MCR03Series1000 RLPF 1608 ROHM 1 300Ω MCR03Series3000 RPC , RVCC 1608 ROHM 1 10kΩ MCR03Series1002 RUVLO2 1608 ROHM 1 20kΩ MCR03Series2002 ROVP2 1608 ROHM 1 51kΩ MCR03Series5102 RCT , RBCT 1608 ROHM 2 68kΩ MCR03Series6802 RSET 1608 ROHM 1 91kΩ MCR03Series9102 RUVLO1 1608 ROHM 1 560kΩ MCR03Series5603 ROVP1 1608 ROHM 1 - RSS090P03FU6TB Q1 - ROHM 1 47uH TPC8213-H C12-K7.5L EJ Q2 L1 - TOSHIBA Mitsumi 1 1 - RB160L-60TE25 D1 - ROHM 1 The values above are fixed, and have been verified for operation at VCC=24V, LED12-series 8-parallel and ILED=150mA. Therefore, the optimal values can vary depending on usage conditions, so fixed values should be determined with careful consideration. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 15/19 2009.04 - Rev.A Technical Note BD9202EFS ●In/Output Equivalent Circuit 1 1.LED1 , 3.LED2 , 20.LED3 , 22.LED4 , 23.LED5 , 25.LED6 , 42.LED7 , 44.LED8 4.CP1 , 5.CP2 6.FAIL1 , 7.FAIL2 VREG 50 LED1～8 100k OVP 100 3k 7V 5k 9.CPUDI ,12.CPUCLK , 13.CPUCS CPUVDD CPUVDD 10.CPUDO CPUVDD 15.VREG CPUVDD CL7V CPUDO 150k VREG 765k 252k www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 16/19 2009.04 - Rev.A Technical Note BD9202EFS ●In/Output Equivalent Circuit 2 16.VREF VREG 17.ISET CL7V 18.VSET CL7V CL7V VREF ISET VSET 500 500 800k 26.TOUT1 , 35.CT_SYNC_OUT , 36.BCT_SYNC_OUT 19.TEST VREG CL7V TEST 27.BRT , 28. RT VREG CL7V RT 30k 167 20k 29.CS 30.OVP, 34.UVLO CL7V CL7V OVP CS 31.SWOUT VREG VREG 1k SWOUT 100 100k 5k 5k 5P 33.LOADSW 37.CT_SYNC_IN , 38.BCT_SYNC_IN 39.COMP VREG CL7V VREG VREG LOADSW 10k COMP 2k 40.TOUT2 41.EN CL7V VREG VCC CL7V EN 2k TOUT2 50 172k 135k 10k 7V 100k www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 17/19 2009.04 - Rev.A Technical Note BD9202EFS ●Usage Notes 1.) Absolute Maximum Ratings Although the quality of this product has been tightly controlled, deterioration or even destruction may occur if the absolute maximum ratings, such as for applied pressure and operational temperature range, are exceeded. mode destruction conditions. Furthermore, we are unable to assume short or open If special modes, which exceed the absolute maximum ratings, are expected, physical safely precautions such as fuses should be considered. 2.) Reverse Connection of Power Supply Connector The IC can destruct from reverse connection of the power supply connector. Precautions, such as inserting a diode between the external power supply and IC power terminal, should be taken as protection against reverse connection destruction. 3.) Power Supply Line Because there is a return of current regenerated by back EMF of the external coil, the capacity value should be determined after confirming that there are no problems with characteristics such as capacity loss at low temperatures with electrolysis condensers, for example by placing a condenser between the power supply and GND as a route for the regenerated current. 4.) GND Potential The potential of the GND pin should be at the minimum potential during all operation status 5.) Heat Design Heat design should consider power dissipation (Pd) during actual use and margins should be set with plenty of room. 6.) Short-circuiting Between Terminals and Incorrect Mounting When attaching to the printed substrate, pay special attention to the direction and proper placement of the IC. If the IC is attached incorrectly, it may be destroyed. Destruction can also occur when there is a short, which can be caused by foreign objects entering between outputs or an output and the power GND. 7.) Operation in Strong Magnetic Fields Exercise caution when operating in strong magnet fields, as errors can occur. 8.) ASO When using this IC, it should be configured so that the output Tr should not exceed absolute maximum ratings and ASO. With CMOS ICs and ICs that have multiple power sources, there is a chance of rush current flowing momentarily, so exercise caution with power supply coupling capacity, power supply and width of GND pattern wiring and its layout. 9.) Heat Interruption Circuit This IC has a built-in Temperature Protection Circuit (TSD circuit). The temperature protection circuit (TSD circuit) is only to cut off the IC from thermal runaway, and has not been designed to protect or guarantee the IC. Therefore, the user should not plan to activate this circuit with continued operation in mind. 10.) Inspection of Set Substrates If a condenser is connected to a pin with low impedance when inspecting the set substrate, stress may be placed on the IC, so there should be a discharge after each process. Furthermore, when connecting a jig for the inspection process, the power must first be turned OFF before connection and inspection, and turned OFF again before removal. 11.) IC Terminal Input This IC is a monolithic IC, and between each element there is a P+ isolation and P substrate for element separation. There is a P-N junction formed between this P-layer and each element’s N-layer, which makes up various parasitic elements. For example, when resistance and transistor are connected with a terminal as in figure 15: 〇When GND>(terminal A) at the resistance, or GND>(terminal B) at the transistor (NPN), the P-N junction operates as a parasitic diode. 〇Also, when GND>(terminal B) at the transistor, a parasitic NPN transistor operates by the N-layer of other elements close to the aforementioned parasitic diode. With the IC’s configuration, the production of parasitic elements by the relationships of the electrical potentials is inevitable. The operation of the parasitic elements can also interfere with the circuit operation, leading to malfunction and even destruction. Therefore, uses that cause the parasitic elements to operate, such as applying voltage to the input terminal that is lower than the GND (P-substrate), should be avoided. Resistance Transistor (NPN) B ～ ～ (Terminal A) (Terminal B) C E GND P P N P board P P＋ N N (Terminal A) N ＋ Parasitic Element P＋ N Ｎ ～ ～ P ＋ Parasitic Element N P board GND GND Parasitic Element Fig.32 Simple Structure of Bipolar IC 12.) Earth Wiring Pattern Where there are both a small signal GND and a large current GND, it is recommended that large current GND pattern and small signal GND pattern are separated, and that there is an earth at the set’s control point so that the pattern wiring’s resistance and voltage change from the large current doesn’t change the small signal GND’s voltage. Ensure that the GND wiring patterns for external parts do not fluctuate. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 18/19 2009.04 - Rev.A Technical Note BD9202EFS Selecting a Model Name When Ordering B D 9 ROHM model name 2 0 2 E Part number F − S E 2 Taping type E2 = Reel-wound embossed taping Package type EFS = HTSSOP HTSSOP-A44 <Dimension> <Tape and Reel information> 18.5±0.1 (MAX 18.85 include BURR) (6.0) 0.5±0.15 1.0±0.2 (5.0) 1 1PIN MARK 22 1500pcs E2 (The direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand) 1234 1234 1234 1234 1234 1234 1234 0.08 S 0.37 +0.05 -0.04 Quantity Direction of feed 0.17 +0.05 -0.03 S 0.8 Embossed carrier tape 1234 1.0MAX 0.85±0.05 0.08±0.05 0.85 4 +6 -4 23 9.5±0.2 7.5±0.1 44 Tape 0.08 M Reel (Unit:mm) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1pin Direction of feed ※When you order , please order in times the amount of package quantity. 19/19 2009.04 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. R0039A