APT5024BFLL APT5024SFLL 500V 22A 0.240Ω POWER MOS 7 R FREDFET BFLL (B) Power MOS 7 is a new generation of low loss, high voltage, N-Channel enhancement mode power MOSFETS. Both conduction and switching losses are addressed with Power MOS 7® by significantly lowering RDS(ON) and Qg. Power MOS 7® combines lower conduction and switching losses along with exceptionally fast switching speeds inherent with APT's patented metal gate structure. ® • Lower Input Capacitance • Lower Miller Capacitance • Lower Gate Charge, Qg TO -2 D3PAK 47 (S) C G G E SFLL C E • Increased Power Dissipation • Easier To Drive • TO-247 or Surface Mount D3PAK Package • FAST RECOVERY BODY DIODE MAXIMUM RATINGS Symbol VDSS ID All Ratings: TC = 25°C unless otherwise specified. Parameter APT5024BFLL_SFLL UNIT 500 Volts Drain-Source Voltage 22 Continuous Drain Current @ TC = 25°C 1 Amps IDM Pulsed Drain Current VGS Gate-Source Voltage Continuous ±30 Gate-Source Voltage Transient ±40 Total Power Dissipation @ TC = 25°C 265 Watts Linear Derating Factor 2.12 W/°C VGSM PD TJ,TSTG 88 -55 to 150 Operating and Storage Junction Temperature Range TL Lead Temperature: 0.063" from Case for 10 Sec. IAR Avalanche Current EAR Repetitive Avalanche Energy EAS Single Pulse Avalanche Energy 1 Volts °C 300 22 (Repetitive and Non-Repetitive) Amps 30 1 4 mJ 960 STATIC ELECTRICAL CHARACTERISTICS BVDSS ID(on) RDS(on) IDSS IGSS VGS(th) Characteristic / Test Conditions MIN Drain-Source Breakdown Voltage (VGS = 0V, ID = 250μA) 500 Volts 22 Amps On State Drain Current 2 (VDS > I D(on) x RDS(on) Max, VGS = 10V) Drain-Source On-State Resistance 2 (VGS = 10V, 11A) TYP MAX 0.240 Zero Gate Voltage Drain Current (VDS = 500V, VGS = 0V) 250 UNIT Ohms μA Zero Gate Voltage Drain Current (VDS = 400V, VGS = 0V, TC = 125°C) 1000 Gate-Source Leakage Current (VGS = ±30V, VDS = 0V) ±100 nA 5 Volts Gate Threshold Voltage (VDS = VGS, ID = 1mA) 3 CAUTION: These Devices are Sensitive to Electrostatic Discharge. Proper Handling Procedures Should Be Followed. Microsemi Website - http://www.microsemi.com 050-7131 Rev D 10-2009 Symbol DYNAMIC CHARACTERISTICS Symbol APT5024BFLL_SFLL Characteristic Test Conditions Ciss Input Capacitance Coss VGS = 0V Output Capacitance VDS = 25V Reverse Transfer Capacitance f = 1 MHz Crss Qg Total Gate Charge Qgs Gate-Source Charge 3 Gate-Drain ("Miller ") Charge Turn-on Delay Time ID = 22A @ 25°C RESISTIVE SWITCHING VGS = 15V Rise Time td(off) VDD = 250V Turn-off Delay Time tf ID = 22A @ 25°C Fall Time Eon Turn-on Switching Energy Eoff Turn-off Switching Energy Eon Turn-on Switching Energy Eoff Turn-off Switching Energy 6 UNIT pF nC ns 2 RG = 0.6W INDUCTIVE SWITCHING @ 25°C 167 VDD = 333V, VGS = 15V 6 MAX 27 43 12 24 8 6 18 VGS = 10V Qgd TYP 1900 417 VDD = 250V td(on) tr MIN 86 ID = 22A, RG = 5W INDUCTIVE SWITCHING @ 125°C μJ 262 VDD = 333V VGS = 15V ID = 22A, RG = 5W 99 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Symbol Characteristic / Test Conditions ISM Pulsed Source Current 1 VSD Diode Forward Voltage 2 dv MIN TYP Continuous Source Current (Body Diode) IS /dt Peak Diode Recovery dv 5 (IS = -ID 22A, di/dt = 100A/μs) Reverse Recovery Charge Q rr (IS = -ID 22A, di/dt = 100A/μs) Peak Recovery Current IRRM 88 (VGS = 0V, IS = -ID 22A) Reverse Recovery Time t rr 22 (Body Diode) /dt di (IS = -ID 22A, /dt = 100A/μs) MAX Volts 15 V/ns 250 Tj = 125°C 400 .500 Tj = 125°C 1.3 Tj = 25°C 7 Tj = 125°C 10 Amps 1.3 Tj = 25°C Tj = 25°C UNIT ns μC Amps THERMAL CHARACTERISTICS Symbol Characteristic RqJC Junction to Case RqJA Junction to Ambient MIN TYP MAX 0.47 40 1 Repetitive Rating: Pulse width limited by maximum junction temperature 2 Pulse Test: Pulse width < 380 μs, Duty Cycle < 2% 3 See MIL-STD-750 Method 3471 Z JC, THERMAL IMPEDANCE (°C/W) θ 050-7131 Rev D 10-2009 0.50 0.9 0.40 0.7 0.30 0.5 0.20 0.3 0.10 0.1 0 10-5 SINGLE PULSE 10-3 10-2 10-1 1.0 RECTANGULAR PULSE DURATION (SECONDS) FIGURE 1, MAXIMUM EFFECTIVE TRANSIENT THERMAL IMPEDANCE, JUNCTION-TO-CASE vs PULSE DURATION 10-4 °C/W 4 Starting Tj = +25°C, L = 3.97mH, RG = 25W, Peak IL = 22A 5 dv/dt numbers reflect the limitations of the test circuit rather than the device itself. IS £ -ID27A di/dt £ 700A/μs VR £ VDSS TJ £ 150°C 6 Eon includes diode reverse recovery. See figures 18, 20. APT Reserves the right to change, without notice, the specifications and information contained herein. 0.05 UNIT Typical Performance Curves APT5024BFLL_SFLL 60 0.205 0.00544F Power (Watts) 0.264 0.0981F ID, DRAIN CURRENT (AMPERES) RC MODEL Junction temp. ( ”C) VGS=15 &10V 50 8V 40 7.5V 30 7V 20 6.5V 10 6V 5.5V Case temperature VDS> ID (ON) x RDS (ON)MAX. 250μSEC. PULSE TEST @ <0.5 % DUTY CYCLE 50 40 30 20 TJ = +125°C 10 0 TJ = +25°C TJ = -55°C 0 1 2 3 4 5 6 7 8 9 10 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) FIGURE 4, TRANSFER CHARACTERISTICS 0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) FIGURE 3, LOW VOLTAGE OUTPUT CHARACTERISTICS 1.7 10 5 0 25 RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE (NORMALIZED) 50 75 100 125 150 TC, CASE TEMPERATURE (°C) FIGURE 6, MAXIMUM DRAIN CURRENT vs CASE TEMPERATURE BVDSS, DRAIN-TO-SOURCE BREAKDOWN VOLTAGE (NORMALIZED) 15 2.5 GS = 10V @ 11A 1.4 1.3 VGS=10V 1.2 VGS=20V 1.1 1.0 0.9 0 10 20 30 40 50 60 ID, DRAIN CURRENT (AMPERES) FIGURE 5, RDS(ON) vs DRAIN CURRENT 1.10 1.05 1.00 0.95 0.90 0.85 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) FIGURE 7, BREAKDOWN VOLTAGE vs TEMPERATURE 1.2 I = 11A D V 2.0 GS = 10V 1.5 1.0 0.5 0.0 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) FIGURE 8, ON-RESISTANCE vs. TEMPERATURE VGS(TH), THRESHOLD VOLTAGE (NORMALIZED) ID, DRAIN CURRENT (AMPERES) 20 V 1.5 1.15 25 NORMALIZED TO 1.6 1.1 1.0 0.9 0.8 0.7 0.6 -50 -25 0 25 50 75 100 125 150 TC, CASE TEMPERATURE (°C) FIGURE 9, THRESHOLD VOLTAGE vs TEMPERATURE 050-7131 Rev D 10-2009 ID, DRAIN CURRENT (AMPERES) FIGURE 2, TRANSIENT THERMAL IMPEDANCE MODEL 60 RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 0 5,000 Ciss 100μS 10 TC =+25°C TJ =+150°C SINGLE PULSE C, CAPACITANCE (pF) ID, DRAIN CURRENT (AMPERES) OPERATION HERE LIMITED BY R (ON) DS Coss 100 Crss 10mS 10 I = 22A D VDS=100V VDS=250V 12 VDS=400V 8 4 0 10 20 30 40 50 60 70 80 Qg, TOTAL GATE CHARGE (nC) FIGURE 12, GATE CHARGES vs GATE-TO-SOURCE VOLTAGE 0 10 20 30 40 50 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) FIGURE 11, CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE IDR, REVERSE DRAIN CURRENT (AMPERES) 1 10 100 500 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) FIGURE 10, MAXIMUM SAFE OPERATING AREA 16 0 1,000 1mS 1 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) APT5024BFLL_SFLL 10,000 89 40 200 100 TJ =+150°C 1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) FIGURE 13, SOURCE-DRAIN DIODE FORWARD VOLTAGE 50 V DD td(off) R 40 V DD R G = 5W T = 125°C J L = 100μH 20 10 0 td(on) 0 T = 125°C J L = 100μH 30 tf 20 0 10 20 30 40 ID (A) FIGURE 14, DELAY TIMES vs CURRENT tr 0 10 20 30 40 ID (A) FIGURE 15, RISE AND FALL TIMES vs CURRENT 500 DD R 400 G = 333V Eoff = 5W Eon T = 125°C J L = 100μH EON includes diode reverse recovery. 300 200 Eoff 100 SWITCHING ENERGY (mJ) V SWITCHING ENERGY (mJ) = 333V = 5W 10 500 050-7131 Rev D 10-2009 G = 333V tr and tf (ns) td(on) and td(off) (ns) 30 TJ =+25°C 10 400 Eon 300 200 V DD = 333V I = 22A D T = 125°C J L = 100μH 100 EON includes 0 0 10 20 30 40 ID (A) FIGURE 16, SWITCHING ENERGY vs CURRENT 0 diode reverse recovery. 0 5 10 15 20 25 30 35 40 45 50 RG, GATE RESISTANCE (Ohms) FIGURE 17, SWITCHING ENERGY VS. GATE RESISTANCE APT5024BFLL_SFLL Gate Voltage 10 % 90% TJ = 125 C Gate Voltage T = 125 C J t d(off) td(on) Drain Voltage Drain Current 90% tr 90% t 5% 5% f 10 % Drain Voltage 10% 0 Switching Energy Drain Current Switching Energy Figure 18, Turn-on Switching Waveforms and Definitions Figure 19, Turn-off Switching Waveforms and Definitions APT15DF60 ID V DD V DS G D.U.T. Figure 20, Inductive Switching Test Circuit 3 TO-247 Package Outline D PAK Package Outline e1 SAC: Tin, Silver, Copper 15.49 (.610) 16.26 (.640) 6.15 (.242) BSC Collector e3 SAC: Tin, Silver, Copper 5.38 (.212) 6.20 (.244) Collector (Heat Sink) 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 4.98 (.196) 5.08 (.200) 1.47 (.058) 1.57 (.062) 15.95 (.628) 16.05(.632) Revised 4/18/95 20.80 (.819) 21.46 (.845) 1.04 (.041) 1.15(.045) 13.79 (.543) 13.99(.551) 13.41 (.528) 13.51(.532) Revised 8/29/97 11.51 (.453) 11.61 (.457) 3.50 (.138) 3.81 (.150) 4.50 (.177) Max. 0.40 (.016) 0.79 (.031) 1.65 (.065) 2.13 (.084) 19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055) 2.21 (.087) 2.59 (.102) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters and (Inches) Gate Collector Emitter 0.020 (.001) 0.178 (.007) 2.67 (.105) 2.84 (.112) 1.27 (.050) 1.40 (.055) 1.22 (.048) 1.32 (.052) 1.98 (.078) 2.08 (.082) 5.45 (.215) BSC {2 Plcs.} 3.81 (.150) 4.06 (.160) (Base of Lead) Heat Sink (Collector) and Leads are Plated Emitter Collector Gate Dimensions in Millimeters (Inches) Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262 and foreign patents. US and Foreign patents pending. All Rights Reserved. 050-7131 Rev D 10-2009 0.46 (.018) 0.56 (.022) {3 Plcs} 2.87 (.113) 3.12 (.123)