ATMEL T7024-PGPM

Features
•
•
•
•
•
•
•
•
Single 3-V Supply Voltage
High Power-added Efficient Power Amplifier (Pout Typically 23 dBm)
Ramp-controlled Output Power
Low-noise Preamplifier (NF Typically 2.1 dB)
Biasing for External PIN Diode T/R Switch
Current-saving Standby Mode
Few External Components
QFN20 Package with Extended Performance
1. Description
The T7024 is a monolithic SiGe transmit/receive front-end IC with power amplifier,
low-noise amplifier and T/R switch driver. It is especially designed for operation in
TDMA systems like Bluetooth® and WDCT.
Due to the ramp-control feature and a very low quiescent current, an external switch
transistor for VS is not required.
Figure 1-1.
Bluetooth/ISM
2.4-GHz
Front-end IC
T7024
Block Diagram
RX_ON
PU
VS_LNA
TX
TX/RX/
Standby
Control
SWITCH_OUT
R_SWITCH
RX
LNA_OUT
LNA_IN
LNA
V1_PA
RAMP
V2_PA
PA_IN
V3_PA_OUT
PA
4533I–BLURF–01/09
2. Pin Configuration
LNA_IN
GND
10 9
GND
VS_LNA
Pinning QFN20
GND
Figure 2-1.
8
7
6
V3_PA_OUT
11
5
SWITCH_OUT
V3_PA_OUT
12
4
R_SWITCH
V3_PA_OUT
13
3
PU
GND
14
2
RX_ON
RAMP
15
1
LNA_OUT
T7024
Table 2-1.
2
PA_IN
V1_PA
GND
V2_PA
V2_PA
16 17 18 19 20
Pin Description
Pin
Symbol
1
LNA_OUT
2
RX_ON
3
PU
4
R_SWITCH
5
SWITCH_OUT
6
GND
7
LNA_IN
Function
Low-noise amplifier output
RX active high
Power-up active high
Resistor to GND sets the PIN diode current
Switched current output for PIN diode
Ground
Low-noise amplifier input
8
GND
9
VS_LNA
Ground
10
GND
11
V3_PA_OUT
Inductor to power supply and matching network for power amplifier output
12
V3_PA_OUT
Inductor to power supply and matching network for power amplifier output
13
V3_PA_OUT
Inductor to power supply and matching network for power amplifier output
14
GND
15
RAMP
Power ramping control input
16
V2_PA
Inductor to power supply for power amplifier
17
V2_PA
Inductor to power supply for power amplifier
18
GND
19
V1_PA
Supply voltage for power amplifier
20
PA_IN
Power amplifier input
Slug
GND
Ground
Supply voltage input for low-noise amplifier
Ground
Ground
Ground
T7024
4533I–BLURF–01/09
T7024
3. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters
Symbol
Value
Unit
Supply voltage
Pins VS_LNA, V1_PA, V2_PA, V3_PA_OUT
VS
6
V
Junction temperature
Tj
150
°C
Storage temperature
Tstg
–40 to +125
°C
RF input power LNA
PinLNA
5
dBm
RF input power PA
PinPA
10
dBm
Symbol
Value
Unit
RthJA
27
K/W
Electrostatic sensitive device.
Observe precautions for handling.
4. Thermal Resistance
Parameters
Junction ambient QFN20, slug soldered on PCB
5. Handling
Do not operate this part near strong electrostatic fields. This IC meets class 1 ESD test requirement (HBM in accordance to EIA/JESD22-A114-A (October 97) and class A ESD test
requirement (MM) in accordance to EIA/JESD22-A115A.
6. Operating Range
All voltages are referred to ground (pins GND and slug). Power supply points are VS_LNA, V1_PA, V2_PA, V3_PA_OUT.
The table represents the sum of all supply currents depending on the TX/RX mode.
Parameters
Symbol
Min.
Typ.
Max.
Unit
Supply voltage
Pins V1_PA, V2_PA and V3_PA_OUT
VS
2.7
3.0
4.6
V
Supply voltage, pin VS_LNA
VS
2.7
3.0
5.5
Supply current TX
Supply current RX
IS
IS
165
8
mA
mA
IS_standby
10
µA
Standby current, PU = 0
Ambient temperature
Tamb
–25
+25
+85
V
°C
3
4533I–BLURF–01/09
7. Electrical Characteristics
Test conditions (unless otherwise specified): VS = 3.0V, Tamb = 25°C
Parameters
Test Conditions
Symbol
Min.
VS
2.7
Typ.
Max.
3.0
4.6
Unit
(1)
Power Amplifier
Supply voltage
Supply current
Standby current
Pins V1_PA, V2_PA, V3_PA_OUT
165
IS_TX
RX (PA off), VRAMP ≤ 0.1V
IS_RX
10
µA
IS_standby
10
µA
2.5
GHz
Standby
Frequency range
TX
f
2.4
Gain-control range
TX
ΔGp
60
42
Power gain maximum
TX, pin PA_IN to V3_PA_OUT
Gp
28
30
Power gain minimum
TX, pin PA_IN to V3_PA_OUT
Gp
–40
Ramping voltage maximum
TX, power gain (maximum)
Pin RAMP
VRAMP max
1.7
Ramping voltage minimum
TX, power gain (minimum)
Pin RAMP
VRAMP min
IRAMP max
1.75
dB
33
dB
–17
dB
1.83
V
0.1
Ramping current maximum
TX, VRAMP = 1.75V, pin RAMP
Power-added efficiency
TX
PAE
35
40
Saturated output power
TX, input power = 0 dBm referred to
pins V3_PA_OUT
Psat
22
23
Input matching(2)
TX, pin PA_IN
Load
VSWR
< 1.5:1
Output matching(2)
TX, pins V3_PA_OUT
Load
VSWR
< 1.5:1
TX, pins V3_PA_OUT
TX, pins V3_PA_OUT
Harmonics at Psat = 23 dBm
V
mA
TX
V
0.5
mA
%
24
dBm
2 fo
–30
dBc
3 fo
–30
dBc
1
µA
T/R Switch Driver (Current Programming by External Resistor from R_SWITCH to GND)
Standby, pin SWITCH_OUT
Switch-out current output
IS_O_standby
1
µA
RX
IS_O_RX
TX at 100Ω
IS_O_100
1.7
mA
TX at 1.2 kΩ
IS_O_1k2
7
mA
TX at 33 kΩ
IS_O_33k
17
mA
IS_O_R
19
mA
TX at ∞
Low-noise Amplifier(3)
Supply voltage
All, pin VS_LNA
VS
Supply current
RX
IS
Supply current
(LNA and control logic)
TX (control logic active)
Pin VS_LNA
IS
Notes:
2.7
3.0
5.5
V
8
9
mA
0.5
mA
1. Power amplifier shall be unconditionally stable, maximum duty cycle 100%, true CW operation, maximum load mismatch
and duration: load VSWR = 10:1 (all phases) 10s, ZG = 50Ω.
2. With external matching network, load impedance 50Ω.
3. Low-noise amplifier shall be unconditionally stable.
4. With external matching components.
5. LNA gain can be adjusted with RX_ON voltage according to Figure 9-10 on page 9. Please note, that for RX_ON below
1.4V the T/R switch driver switches to TX mode.
4
T7024
4533I–BLURF–01/09
T7024
7. Electrical Characteristics (Continued)
Test conditions (unless otherwise specified): VS = 3.0V, Tamb = 25°C
Parameters
Test Conditions
Symbol
Standby current
Standby, pin VS_LNA
IS_standby
Frequency range
RX
Min.
f
2.4
Power gain
RX, pin LNA_IN to LNA_OUT
Gp
15
Noise figure
RX
NF
Gain compression
RX, referred to pin LNA_OUT
(5)
rd
3 -order input interception point
RX
(4)
RX, pin LNA_IN
Input matching
Output matching(4)
RX, pin LNA_OUT
Logic Input Levels (RX_ON, PU)
Max.
Unit
1
10
µA
2.5
GHz
16
19
dB
2.1
2.3
dB
O1dB
–9
–7
–6
dBm
IIP3
–16
–14
–13
dBm
VSWRin
2:1
VSWRout
2:1
(5)
High input level
= ‘1’ pins RX_ON and PU
ViH
2.4
VS, LNA
V
0
0.5
V
60
µA
0.2
µA
Low input level
= ‘0’
ViL
High input current
= ‘1’ ViH = 2.4V
IiH
Low input current
= ‘0’
IiL
Notes:
Typ.
40
1. Power amplifier shall be unconditionally stable, maximum duty cycle 100%, true CW operation, maximum load mismatch
and duration: load VSWR = 10:1 (all phases) 10s, ZG = 50Ω.
2. With external matching network, load impedance 50Ω.
3. Low-noise amplifier shall be unconditionally stable.
4. With external matching components.
5. LNA gain can be adjusted with RX_ON voltage according to Figure 9-10 on page 9. Please note, that for RX_ON below
1.4V the T/R switch driver switches to TX mode.
8. Control Logic PA and LNA/Antenna Switch Driver
PU
RX_ON
Ramp(1)
PA
LNA
Antenna Switch Driver
Operation Mode
0
0
0
off
off
off
standby
0
0
1
on
off
off
(2)
0
1
0
off
on
off
(3)
0
1
1
on
on
off
(4)
1
0
0
off
off
on
(4)
1
0
1
on
off
on
TX
1
1
0
off
on
off
RX
1
1
on
on
off
(5)
1
Notes:
1. “0” = VRAMP ≤0.1V, “1” = VRAMP typically 1.75V, 1.3V < VRAMP < 1.83V controls gain and output power, compare Figure 9-5 on
page 7
2. Only for special operation, e.g. only PA operation, no LNA/switch driver operation
3. Only for special operation, e.g. no switch driver operation
4. Only for special operation
5. Only for special operation, e.g. separate TX/RX antennas, TX and RX operation at the same time
5
4533I–BLURF–01/09
9. Typical Operating Characteristics
Figure 9-1.
LNA: Gain and Noise Figure versus Frequency
25
5
20
4
15
3
NF
10
2
5
1
0
2000
2200
2400
2600
NF (dB)
Gain (dB)
Gain
0
3000
2800
Frequency (MHz)
Figure 9-2.
LNA: NF and Gain versus Temperature
2.5
2.0
NF
VS = 3V
Relative gain
relative NF (dB)
1.5
1.0
0.5
0.0
-0.5
Gain
-1.0
-1.5
-2.0
-2.5
-40
-20
0
20
40
60
80
Temperature (°C)
Figure 9-3.
LNA: Typical Switch-out Current versus Rswitch
2.0
IS_O (mA)
16
12
8
4
0
1
10
100
1000
10000
100000 1000000
Rswitch (Ω)
6
T7024
4533I–BLURF–01/09
T7024
PA: Output Power and PAE versus Supply Voltage
Pout (dBm), PAE (%)
50
250
40
220
PAE
I_S_TX
30
190
Pout
20
160
f = 2.4 GHz
Vramp = 1.8V
PinPA = 0 dBm
10
130
0
2.7
3.1
3.5
3.9
IS_TX (mA)
Figure 9-4.
100
4.7
4.3
Supply Voltage (V)
Figure 9-5.
PA: Output Power and PAE versus Ramp Voltage
50
250
30
200
Pout
10
150
-10
I_S_TX
-30
100
f = 2.4 GHz
VS = 3V
PinPA = 0 dBm
50
-50
1.2
IS_TX (mA)
Pout (dBm), PAE (%)
PAE
1.4
1.6
0
2.0
1.8
Vramp (V)
PA: Output Power and PAE versus Input Power
300
Pout (dBm), PAE (%), Gp (dB)
50
250
PAE
40
Gain
200
30
20
150
I_S_TX
VS = 3V
f = 2.4 GHz
Vramp = 1.8V
PinPA = 0 dBm
10
0
IS_TX (mA)
Figure 9-6.
100
50
Pout
0
-10
-40
-30
-20
-10
0
-10
Input Power (dBm)
7
4533I–BLURF–01/09
Figure 9-7.
PA: Output Power and PAE versus Frequency
50
250
40
200
I_S_TX
30
150
Pout
20
10
0
2400
2420
100
VS = 3V
Vramp = 1.8V
PinPA = 0 dBm
2440
2460
IS_TX (mA)
Pout (dBm), PAE (%)
PAE
50
0
2500
2480
Frequency (MHz)
Figure 9-8.
LNA: Supply Current versus Temperature
8.0
Supply current (mA)
7.8
7.6
7.4
7.2
7.0
6.8
6.6
6.4
6.2
6.0
-40
-20
0
20
40
60
80
Temperature (°C)
Figure 9-9.
PA: Pout versus VRAMP and Temperature
30
f = 2.4 GHz
VS = 3V
Pin = 0 dBm
Pout (dBm)
20
5
10
25
0
80
-15
-10
-40°C
-20
1.0
1.2
1.4
1.6
1.8
Vramp (V)
8
T7024
4533I–BLURF–01/09
T7024
Figure 9-10. LNA Gain (dB) versus RX_ON (V)
20
15
10
Gain (dB)
5
VS = 3V
0
-5
-10
-15
-20
-25
1
1.5
2
2.5
3
RX_ON (V)
10. Input/Output Circuits
Figure 10-1. Input Circuit PA_IN/V1_PA
V1_PA
PA_IN
GND
Figure 10-2. Input Circuit RAMP/V1_PA
V1_PA
RAMP
9
4533I–BLURF–01/09
Figure 10-3. Input Circuit V2_PA
V2_PA
GND
Figure 10-4. Input/Output Circuit V3_PA_OUT
V3_PA_OUT
GND
Figure 10-5. Input Circuit SWITCH_OUT/R_SWITCH
V1_PA
SWITCH_OUT
R_SWITCH
GND
10
T7024
4533I–BLURF–01/09
T7024
Figure 10-6. Input Circuit LNA_IN/VS_LNA
VS_LNA
LNA_IN
GND
Figure 10-7. Input Circuit PU/RX_ON
VS_LNA
LNA_IN / PU
Figure 10-8. Output Circuit LNA_OUT
VS_LNA
LNA_OUT
GND
11
4533I–BLURF–01/09
Figure 10-9. Typical Application T7024
LNA_OUT
PA_IN
V1_PA
V2_PA
2.2 pF
1 pF
3.3 pF
20 19 18 17 16
1
15
PX_ON
2
14
PU
3
R1 is selected
with DIL-switch
R1
Var
T7024
13
4
12
5
11
6
7
8
PA_RAMP
harm. termination
2.2 pF
9 10
0.8 pF
Pin diode replaced by
LED on application board
Switch_OUT
18 nH
1.8 pF
LNA_IN
VS_LNA
V3_PA
PA_OUT
blocking capacitors
depending on application
12
T7024
4533I–BLURF–01/09
T7024
11. Ordering Information
Extended Type Number
Package
Remarks
MOQ
T7024-PGPM
QFN20
Taped and reeled
Pb free, halogen free
1500 pcs.
T7024-PGQM
QFN20
Taped and reeled
Pb free, halogen free
6000 pcs.
Demoboard-T7024-PGM
QFN20
Evaluation board QFN
1
12. Package Information
Package: QFN 20 - 5 x 5
Exposed pad 3.1 x 3.1
Dimensions in mm
Not indicated tolerances ± 0.05
0.9±0.1
5
+0
3.1
0.05-0.05
16
20
20
15
1
1
11
0.6
0.28
5
5
10
technical drawings
according to DIN
specifications
6
0.65 nom.
Drawing-No.: 6.543-5094.01-4
2.6
Issue: 1; 19.12.02
13
4533I–BLURF–01/09
13. Recommended PCB Land Pattern
Figure 13-1. Recommended PCB Land Pattern
B
E
D
A
C
F
Table 13-1.
Recommended PCB Land Pattern Signs
Sign
Description
Size
A
Distance of vias
1.6 mm
B
Size of slug pattern
3.1 mm
C
Distance slug to pins
0.33 mm
D
Diameter of vias
1 mm
E
Width of pin pattern
0.3 mm
F
Distance of pin pattern
0.33 mm
14. Revision History
Please note that the following page numbers referred to in this section refer to the specific revision
mentioned, not to this document.
14
Revision No.
History
4533I-BLURF-01/09
• PSSO20 package variant deleted
4533H-BLURF-07/07
• Put datasheet in a new template
• Page 1: Block diagram changed
• Page 13: Figure 10-8 changed
T7024
4533I–BLURF–01/09
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4533I–BLURF–01/09