PHILIPS TSA5055T

INTEGRATED CIRCUITS
DATA SHEET
TSA5055T
2.65 GHz bidirectional I2C-bus
controlled synthesizer
Product specification
Supersedes data of November 1991
File under Integrated Circuits, IC02
1999 Aug 11
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
FEATURES
• Complete 2.65 GHz single-chip system
• Low power 5 V, 60 mA
• I2C-bus programming
• In-lock flag
GENERAL DESCRIPTION
• Varicap drive disable
The TSA5055T is a single-chip PLL frequency synthesizer
designed for satellite TV tuning systems. It may be used
with a symmetrical input (pins 13 and 14) or with an
asymmetrical input (pin 13).
• Low radiation
• 5-level Analog to Digital Converter (ADC)
• Address selection for Picture-In-Picture (PIP),
DBS tuner, etc.
Control data is entered via the I2C-bus; five serial bytes are
required to address the device, select the oscillator
frequency, program the six output ports and set the
charge-pump current. Four of these ports can also be used
as input ports (three general purpose I/O ports, one ADC).
Digital information concerning these ports can be read out
of the TSA5055T on the SDA line (one status byte) during
a READ operation. A flag is set when the loop is ‘in-lock’
and is read during a READ operation. The device has one
fixed I2C-bus address and three programmable
addresses, programmed by applying a specific voltage to
port 3. The phase comparator operates at 7.8125 kHz
when a 4 MHz crystal is used.
• 6 controllable outputs, 4 bidirectional
• Power-down flag
• Available in SOT109-1 (SO16) package
• Symmetrical or asymmetrical drive.
APPLICATIONS
• Satellite TV
• High IF cable tuning systems.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
VCC
supply voltage
4.5
5
5.5
V
ICC
supply current
−
60
80
mA
fRF
RF input frequency range
1
−
2.65
GHz
VI (rms)
input voltage level (RMS value)
1 to 1.8 GHz
50
−
300
mV
1.8 to 2.65 GHz
70
−
300
mV
fXTAL
crystal oscillator frequency
3.2
4
4.48
MHz
zXTAL
crystal oscillator impedance (absolute value)
600
1000
−
Ω
IO
open-collector output current P7, P6, P5 and P4
−
−
10
mA
output current P3 and P0
−
1
−
mA
Tamb
ambient temperature
−20
−
+85
°C
Tstg
storage temperature
−40
−
+150
°C
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TSA5055T
1999 Aug 11
SO16
DESCRIPTION
plastic small outline package; 16 leads; body width 3.9 mm
2
CODE
SOT109-1
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PRESCALER
16
14
fDIV
Q2 3
OSCILLATOR
4 MHz
DIVIDER
N = 512
POWER DOWN
DETECTOR
fREF
7.8125 kHz
IN-LOCK
DETECTOR
CHARGEPUMP
TO
DIGITAL
PHASE
COMPARATOR
Q1 2
3
SDA
PD
UD
CP
15-BIT LATCH
DIVIDER RATIO
LOGIC
OS
TSA5055T
SCL
16
5
I2C-BUS
TRANSCEIVER
4
15
ADDRESS
SELECTION
3-BIT
ADC
3
TTL LEVEL
COMPARATORS
Philips Semiconductors
RFIN2
15-BIT
PROGRAMMABLE
DIVIDER
2.65 GHz bidirectional I2C-bus controlled
synthesizer
RFIN1
BLOCK DIAGRAM
handbook, full pagewidth
1999 Aug 11
1
13
GND
LATCH 3
CONTROL DATA
7-BIT LATCH
PORT INFORMATION
12
VCC
GATE
T1
10
9
8
7
6
MBC307
P3
P4
P5
P6
P7
Fig.1 Block diagram.
TSA5055T
P0
Product specification
11
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
PINNING
SYMBOL
PIN
DESCRIPTION
PD
1
charge-pump output
Q1
2
crystal oscillator input 1
Q2
3
crystal oscillator input 2
SDA
4
serial data input/output
SCL
5
serial clock input
P7
6
port output/input (general
purpose)
P6
7
port output/input (ADC)
P5
8
port output/input (general
purpose)
P4
9
port output/input (general
purpose)
P3
10
port output (also used for address
selection)
P0
11
port output
VCC
12
voltage supply
RFIN1
13
RF signal input 1
RFIN2
14
RF signal input 2 (decoupled)
GND
15
ground
UD
16
drive output
handbook, halfpage
16 UD
Q1 2
15 GND
Q2 3
14 RFIN2
SDA 4
TSA5055T
13 RFIN1
12 VCC
SCL 5
P7 6
11 P0
P6 7
10 P3
P5 8
9 P4
MBC304
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
The meaning of the bits in the data bytes is given in
Table 1. The first bit of the first data byte transmitted
indicates whether frequency data (first bit = 0) or
charge-pump and port information (first bit = 1) will follow.
Until an I2C-bus STOP condition is sent by the controller,
additional data bytes can be entered without the need to
re-address the device. This allows a smooth frequency
sweep for fine tuning. At power-on, the ports are set to the
high-impedance state.
General
The TSA5055T is controlled via the 2-wire I2C-bus. For
programming, there is one (7-bit) module address and the
R/W bit for selecting READ or WRITE mode.
WRITE mode: R/W = 0; see Table 1
After the address transmission (first byte), data bytes can
be sent to the device. Four data bytes are needed to fully
program the TSA5055T. The bus transceiver has an
auto-increment facility that permits the programming of the
TSA5055T within one single transmission (address + four
data bytes).
The 7.8125 kHz reference frequency is obtained by
dividing the output of the 4 MHz crystal oscillator by 512.
Because the input of the RF signal is first divided by 16,
the step size is 125 kHz. A 3.2 MHz crystal can offer a step
size of 100 kHz.
The TSA5055T can also be partly programmed on the
condition that the first data byte following the address is
byte 2 or byte 4.
1999 Aug 11
PD 1
4
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
Table 1
TSA5055T
Write data format; see notes 1 to 13
BYTE
MSB
DATA BYTE
LSB
COMMAND
Address
1
1
0
0
0
MA1
MA0
0
A
byte 1
Programmable divider
0
N14
N13
N12
N11
N10
N9
N8
A
byte 2
N7
N6
N5
N4
N3
N2
N1
N0
A
byte 3
1
CP
T1
T0
1
1
1
OS
A
byte 4
P7
P6
P5
P4
P3
X
X
P0
A
byte 5
Charge-pump and test bits
Output ports, control bits
Notes
1. MA1 and MA0: programmable address bits (see Table 3).
2. A: Acknowledge bit.
3. N14 to N0: programmable divider bits.
4. N = N14 × 214 + N13 × 213 + ... + N1 × 21 + N0.
5. CP: charge-pump current. CP = 0: 50 µA; CP = 1: 220 µA.
6. P7 to P4 = 1: open-collector outputs are active.
7. P7 to P3 and P0 = 0: outputs are in high-impedance state.
8. P3 and P0 = 1: current-limited outputs are active.
9. T1, T0 and OS = 0, 0 and 0: normal operation.
10. T1 = 1: P6 = fREF and P7 = fDIV.
11. T0 = 1: 3-state charge-pump.
12. OS = 1: Operational amplifier output is switched off (varicap drive disable).
13. X: don’t care.
READ mode: R/W = 1; see Table 2
The TSA5055T will then release the data line to allow the
processor to generate a STOP condition. When ports
P3 to P7 are used as inputs, they must be programmed to
their high-impedance state.
Data can be read out of the TSA5055T by setting the R/W
bit to 1. After the slave address has been recognized, the
TSA5055T generates an Acknowledge signal (A) and the
first data byte (status byte) is transferred to the SDA line
(MSB first). Data is valid on the SDA line while the SCL
clock signal is HIGH.
The POR flag (Power-On Reset) is set to 1 at power-on
and when VCC goes below 3 V. The flag is reset when an
end of data is detected by the TSA5055T (end of a READ
sequence). Control of the loop is made possible with the
in-lock flag FL, which indicates when the loop is
phase-locked (FL = 1).
A second data byte can be read out of the TSA5055T if the
processor generates an Acknowledge signal on the SDA
line. End of transmission will occur if the processor does
not send an Acknowledge signal.
1999 Aug 11
5
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
Table 2
TSA5055T
Read data format (see notes 1 to 5)
BYTE
MSB
Address
Status byte
DATA BYTE
LSB
COMMAND
1
1
0
0
0
MA1
MA0
1
A
byte 1
POR
FL
I2
I1
I0
A2
A1
A0
−
byte 2
Notes
1. POR: Power-on reset flag (POR = 1 on power-on).
2. FL: in-lock flag (FL = 1 when the loop is phase-locked).
3. I2, I1 and I0: digital information for I/O ports P7, P5 and P4 respectively.
4. A2, A1 and A0: digital outputs of the 5-level ADC. Accuracy is 1⁄2 LSB (see Table 4).
5. MSB is transmitted first.
Bits I2, I1 and I0 represent the status of the I/O ports P7, P5 and P4, respectively. A logic ‘0’ indicates a LOW level and
a logic ‘1’ a HIGH level (TTL levels). A built-in 5-level ADC is available at I/O port P6. This ADC can be used to feed AFC
information to the controller from the IF section of the receiver, as shown in Fig.4. The relationship between bits A2, A1,
A0 and the input voltage at port P6 is given in Table 4.
Table 3
Address selection
MA1
MA0
VOLTAGE APPLIED ON PORT P3
0
0
0 to 0.1VCC
0
1
always valid
1
0
0.4VCC to 0.6VCC
1
1
0.9VCC to 13.5 V
Address selection; see Table 3
The module address contains programmable address bits (MA1 and MA0), which offer the possibility of having several
synthesizers (up to three) in one system. The relationship between MA1 and MA0 and the input voltage at port P3 is
given in Table 3.
Table 4
ADC levels
A2
A1
A0
1
0
0
0.6VCC to VCC
0
1
1
0.45VCC to 0.6VCC
0
1
0
0.3VCC to 0.45VCC
0
0
1
0.15VCC to 0.3VCC
0
0
0
0 to 0.15VCC
1999 Aug 11
VOLTAGE APPLIED ON PORT P6
6
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
+12 V
handbook, full pagewidth
+5 V
IF signal
IF SECTION
AFC
OUTPUT
P0
P3
P4
9
P5
8
P6
SATELLITE
MIXER
OSCILLATOR
PART
10
7
11
6
12
5
TSA5055T
1 nF
oscillator
outputs
P7
SCL
I2C-bus
13
4
14
3
15
2
16
1
SDA
MICROCONTROLLER
4 MHz
1 nF
18 pF
0.1 µF
180 nF
39 nF
varicap VT
input
+33 V
22 kΩ
22 kΩ
BC847B
FCE048
Fig.3 Symmetrical application diagram.
1999 Aug 11
7
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
+12 V
handbook, full pagewidth
+5 V
IF signal
IF SECTION
AFC
OUTPUT
P0
P3
P4
9
8
10
7
11
6
12
5
P5
P6
SATELLITE
MIXER
OSCILLATOR
PART
oscillator
output
TSA5055T
1 nF
P7
SCL
I2C-bus
13
4
14
3
15
2
16
1
SDA
MICROCONTROLLER
4 MHz
18 pF
10 nF
0.1 µF
180 nF
39 nF
varicap VT
input
+33 V
22 kΩ
22 kΩ
BC847B
FCE049
Fig.4 Asymmetrical application diagram.
1999 Aug 11
8
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VCC
supply voltage
−0.3
+6
V
VO(PD)
charge-pump (PD) output voltage
−0.3
VCC
V
VI(Q1)
crystal (Q1) input voltage
−0.3
VCC
V
VI/O(SDA)
serial data (SDA) input/output voltage
−0.3
+6
V
VI(SCL)
serial clock (SCL) input voltage
−0.3
+6
V
VI/O(P7-P0)
input/output ports (P7 to P3 and P0) voltage
−0.3
+16
V
VI(RFIN)
prescaler inputs (RFIN1 and RFIN2) voltage
−0.3
+2.5
V
VO(UD)
drive output (UD) voltage
−0.3
VCC
V
IO(P4-P7)
output ports (P7 to P4) current (open-collector)
−1
+15
mA
IO(SDA)
serial data (SDA) output current (open-collector)
−1
+5
mA
Tstg
storage temperature
−40
+150
°C
Tj
maximum junction temperature
−
150
°C
HANDLING
All pins withstand the ESD test in accordance with “MIL-STD-883C”, category A (1000 V).
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
from junction to ambient
in free air
VALUE
UNIT
110
K/W
CHARACTERISTICS
VCC = 5 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCC
supply voltage range
4.5
5
5.5
V
Tamb
ambient temperature
−20
−
+85
°C
fRF
RF input frequency range
1
−
2.65
GHz
N
divider ratio
256
−
32767
ICC
supply current
−
60
80
mA
fXTAL
crystal oscillator frequency
3.2
4
4.48
MHz
ZXTAL
crystal oscillator impedance (pin 2)
600
1000
−
Ω
VXTAL(p-p)
drive level on pin 2 (quartz Philips
4322 143 04093) (peak-to-peak
value)
−
110
−
mV
VI(rms)
input voltage level (RMS value)
VCC = 4.5 to 5.5 V;
Tamb = −20 to +85 °C; see
typical sensitivity curve in
Fig.5
50/−13
−
300/2.6 mV/dBm
70/−10
−
300/2.6 mV/dBm
see Smith chart in Fig.6
−
50
−
Ω
−
2
−
pF
f = 1 to 1.8 GHz
f = 1.8 to 2.65 GHz
RI
prescaler input impedance
CI
input capacitance
1999 Aug 11
absolute value
9
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
SYMBOL
PARAMETER
TSA5055T
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Output ports P3 and P0 (current limited)
ILO
leakage current
Vo = 13.5 V
−
−
10
µA
IOS
output sink current
Vo = 13.5 V
0.7
1
1.5
mA
Output ports P7 to P4 (open collector); see note 1
ILO
leakage current
Vo = 13.5 V
−
−
10
µA
VOL
output voltage LOW
Io = 10 mA; note 2
−
−
0.7
V
Input ports P6 and P3
IIH
input current HIGH
VIH = 13.5 V
−
−
10
µA
IIL
input current LOW
VIL = 0 V
−10
−
−
µA
2.7
−
−
V
Input ports P7, P5 and P4
VIH
input voltage HIGH
VIL
input voltage LOW
−
−
0.8
V
IIH
input current HIGH
VIH = 13.5 V
−
−
10
µA
IIL
input current LOW
VIL = 0 V
−10
−
−
µA
Bus inputs SCL and SDA
VIH
input voltage HIGH
3
−
5.5
V
VIL
input voltage LOW
−
−
1.5
V
IIH
input current HIGH
IIL
input current LOW
VIH = 5 V; VCC = 0 V
−
−
10
µA
VIH = 5 V; VCC = 5 V
−
−
10
µA
VIL = 0 V; VCC = 0 V
−10
−
−
µA
VIL = 0 V; VCC = 5 V
−10
−
−
µA
Output SDA (open-collector)
IOH
leakage current
VOH = 5.5 V
−
−
10
µA
VOL
output voltage
IOL = 3 mA
−
−
0.4
V
220
300
µA
Charge-pump output PD
IOH
output current HIGH (absolute value) CP = 1
90
IOL
output current LOW (absolute value)
CP = 0
22
50
75
µA
VO
output voltage
in-lock
1.5
−
2.5
V
IO(leak)
off-state leakage current
T0 = 1
−5
−
+5
nA
−
−
100
mV
mV
Operational amplifier output UD (test mode: T0 = 1)
VO
output voltage
output voltage when switched off
T0 = 1; OS = 1; VO(PD) = 2 V
−
−
250
hFE
operational amplifier current gain
T0 = 1, OS = 0; VO(PD) = 2 V
IO(UD) = 10 µA
2000
−
−
I O ( UD )
----------------------------------------------I O ( PD ) – I O ( PD leak )
VO(PD) = 0 V
Notes
1. When a port is active, the collector voltage must not exceed 6 V.
2. Measured with a single open-collector active.
1999 Aug 11
10
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
FCE060
9
handbook, halfpage
Vi
(dBm)
guaranteed
operating
area
−3
−10 dBm
−15
−27
−39
0
800
1600
2400
3200
2650
f (MHz)
VCC = 5 V; Tamb = 25 °C.
Fig.5 Typical input sensitivity curve.
1
handbook, full pagewidth
0.5
2
0.2
5
2.65 GHz
10
+j
0
0.2
0.5
1
2
5
10
∞
2 GHz
−j
10
5
0.2
1 GHz
2
0.5
1
FCE061
VCC = 5 V; reference value = 50 Ω.
Fig.6 Smith chart of typical input impedance.
1999 Aug 11
11
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
FLOCK FLAG DEFINITION (FL)
When the FL flag is 1, the maximum frequency deviation
(∆f) from stable frequency can be expressed as follows:
K VCO
C1 + C2
∆f = ±  -------------- × I CP × ----------------------
 KO
C1 × C2
C2
handbook, halfpage
C1
where:
R
MGA032
KVCO = oscillator slope (Hz/V)
ICP = charge-pump current (A)
KO = 4 × 106
Fig.7 Loop filter.
C1 and C2 = loop filter capacitors.
Flock flag settings
PARAMETER
MIN.
MAX.
UNIT
Time span between actual phase lock and FL-flag setting
1024
1152
µs
Time span between the loop losing lock and FL-flag resetting
0
128
µs
Flock flag application
• KVCO = 50 MHz/V
• ICP = 220 µA
• C1 = 180 nF
• C2 = 39 nF
• ∆f = ±85.8 kHz.
1999 Aug 11
12
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
EQUIVALENT INPUT CIRCUITS
VCC
Vref
Vref
1
600 Ω
600 Ω
PD
200 Ω
RFIN1 13
170 Ω
RFIN2 14
16 UD
OS
FCE051
FCE052
Fig.8 RF input amplifier.
Fig.9 Current amplifier.
VCC
VCC
(2)
6-11
(2)
(1)
1 kΩ
(2)
SDA 4
FCE053
FCE054
(1) This resistor is implemented only for P0 and P3.
(2) These components are not implemented for P0.
Fig.11 I2C SDA.
Fig.10 Input/output ports, pins 6 to 11.
1999 Aug 11
13
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
VCC
VCC
Q2
3
Q1
2
1 kΩ
SCL
5
FCE055
FCE056
Fig.12 I2C SCL.
1999 Aug 11
Fig.13 Reference oscillator.
14
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
PACKAGE OUTLINE
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
HE
v M A
Z
16
9
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
8
e
0
detail X
w M
bp
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.050
0.039
0.016
0.028
0.020
0.01
0.01
0.004
0.028
0.012
inches
0.244
0.041
0.228
θ
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT109-1
076E07S
MS-012AC
1999 Aug 11
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-01-23
97-05-22
15
o
8
0o
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
SOLDERING
TSA5055T
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
Manual soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1999 Aug 11
16
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
REFLOW(1)
WAVE
BGA, SQFP
not suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
suitable(2)
suitable
suitable
suitable
not
recommended(3)(4)
suitable
not
recommended(5)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1999 Aug 11
17
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
TSA5055T
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1999 Aug 11
18
Philips Semiconductors
Product specification
2.65 GHz bidirectional I2C-bus controlled
synthesizer
NOTES
1999 Aug 11
19
TSA5055T
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Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1999
SCA 67
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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Printed in The Netherlands
545004/25/03/pp20
Date of release: 1999
Aug 11
Document order number:
9397 750 05009