CYPRESS QUALITY & RELIABILITY 2002 Q4 RELIABILITY REPORT TABLE OF CONTENTS 1.0 OVERVIEW OF CYPRESS SEMICONDUCTOR TOTAL QUALITY MANAGEMENT SYSTEM 2.0 EARLY FAILURE RATE SUMMARY 3.0 LONG TERM FAILURE RATE SUMMARY 4.0 PRESSURE COOKER TEST 5.0 HAST (Highly Accelerated Stress Test) 6.0 TEMPERATURE CYCLE Note: The results reported herein are for Quarter 4 2002. CYPRESS QUALITY & RELIABILITY 1.0 OVERVIEW OF CYPRESS SEMICONDUCTOR TOTAL QUALITY MANAGEMENT SYSTEM This report summarizes Cypress Semiconductor Product Reliability for the period of the 3rd quarter of 2002. It includes data from product fabricated at the San Jose, California; Round Rock, Texas; and Bloomington, Minnesota facilities. Cypress Semiconductor has established aggressive reliability objectives to assure that all products exhibit reliability, which exceeds customer reliability requirements for purchased components. The quality standard at Cypress is zero defects resulting in a culture requiring continuous improvement in quality and reliability. Product reliability is assured by a total quality management system. The quality management system is described in detail in the Cypress Semiconductor Quality Manual (Cypress Semiconductor Document Number 90-00001). Key reliability-related programs of the total quality management system are: (1) design rule review and approval; (2) control of raw materials and vendor quality; (3) manufacturing statistical process controls; (4) manufacturing identification of "Maverick Lot" yield limits; (5) formal training and certification of manufacturing personnel; (6) qualification of new products and manufacturing processes; (7) continuous reliability monitoring; (8) formal failure analysis and corrective action; and (9) competitive benchmarking. Product Reliability data is accumulated as a result of new product Qualification Test Plan activities (Cypress Semiconductor Document Number 25-00040) as well as from the Reliability Monitor Program (Cypress Semiconductor Document Number 25-00008). All reliability test samples are obtained from standard production material. Sample selection is based on generic product families. These generic products are designed with very similar design rules and manufactured from a core set of processes. Reliability strategy requires that every failure that occurs during reliability testing be subjected to failure analysis (Cypress Semiconductor Document Number 25-00039) to determine the failure mechanism. Corrective action is then implemented to prevent future failures, resulting in continuous improvement in product reliability. Copies of the Cypress Semiconductor documents referenced herein are available through your Cypress Semiconductor sales representative. Questions about product reliability may be addressed to the undersigned. ____________________ Director of Reliability ___________________ Director of Quality Cypress Semiconductor Corporation 3901 North First Street San Jose, CA 95134-1599 Cypress Quality Fax: (408) 943-2165 ---------------------------------------------------------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------------------------------------------------------- QUALITY & RELIABILITY CYPRESS 2.0 EARLY FAILURE RATE SUMMARY Early Failure Rate Determination: High Temperature Operating Life testing (HTOL), for as long as 96 hours, is used to estimate device early failure rate. Test: Conditions: Duration: Failure: Fit Rate: High Temperature Operating Life Test (HTOL) Dynamic Operating Conditions, VCC nominal + 15%, 150°C or 125°C. 48 hours HTOL at 150°C or 96 hours at 125°C. A failure is any device that fails to meet data sheet electrical requirements. Derated to 55° C ambient, with 60% upper confidence bound for 0 failures, Ea =0.7ev Early Failure Rate Summary Technology # Failed B53 Ram 2 HYNIX 0.35 HYNIX P26 NEC 0.35 Ram 3 Ram 4 Device Hours 128454 154764 7200 47053 122700 51200 228073 Ram 5 1722458 2 7 Ram 6 Ram 7 214973 3379185 0 6 25 10 Ram 8 S4 TSMC 0.15 TSMC 0.18 TSMC 0.25 TSMC 0.50 132623 162675 124565 58828 56021 62720 1 1 0 0 0 0 44 36 0 0 0 0 0 0 1 FIT Rate Failure Mode Insufficient data 35 26 Insufficient data Insufficient data Insufficient data Insufficient data (1 unit) Polyamide Residue, No Anomaly (2 units) Unknown Cause (4 units) Unknown Cause (1 unit) Particle on LI (1 unit) Poly-Si Particle (1 unit) Unknown Cause (1 unit) Unknown Cause Insufficient data Insufficient data Insufficient data Insufficient data Notes: Data reported is a 4-quarter rolling average. Insufficient data – interpret as insufficient accumulated life-time hours to project a 60% confidence bound for a zero-fails sample. QUALITY & RELIABILITY CYPRESS 3.0 LONG TERM FAILURE RATE SUMMARY Long Term Failure Rate Determination A High Temperature Operating Life test (HTOL) is used to estimate long-term reliability. By operating the devices at accelerated temperature and voltage, hundreds of thousands of use hours can be compressed into hundreds of test hours. Test: High Temperature Operating Life Test (HTOL) Conditions: Dynamic Operating Conditions, VCC nominal +15% 150°C or 125°C. Duration: A minimum of 80 hours at 150°C or 168 hours at 125°C Generally 500 hours at 150°C or 1000 hours at 125°C. Failure: A failure is any device that fails to meet data sheet electrical requirements. Fit Rate: Derated to 55° C ambient, with 60% upper confidence bound for 0 failures, Ea =0.7ev Long Term Failure Rate Summary Technology # Failed FIT Rate Failure Mode B53 HYNIX 0.35 HYNIX P26 NEC 0.35 Ram 3 Ram 4 Ram 5 Ram 6 Ram 7 Device Hours @150°c 310702 75000 247976 227316 263840 655450 1553457 483551 4147353 0 0 0 0 0 0 2 0 2 17 Ram 8 746020 6 47 S4 TSMC 0.15 TSMC 0.18 TSMC 0.25 TSMC 0.50 117597 101721 150086 24194 177500 0 1 0 0 0 None Insufficient data None None None None (2 units) Unknown Cause None (1 unit) Blocked Contact (1 unit) Poly Protrusion (2 units) Poly Protrusion (4 units) Unknown Cause Insufficient data (1 unit) Metal Bridging None Insufficient data None 22 24 20 8 8 11 3 58 36 30 Notes: Data reported is a 4-quarter rolling average. Insufficient data – interpret as insufficient accumulated life-time hours to project a 60% confidence bound for a zero-fails sample. QUALITY & RELIABILITY CYPRESS 4.0 PRESSURE COOKER TEST (PCT) The Pressure Cooker Test is a highly accelerated packaging stress test used to ensure environmental durability of epoxy-packaged parts. Passivation cracks, ionic contamination, and corrosion susceptibility are all accelerated by this stress. Test: Conditions: Pre-Conditioning: Failure: Pressure Cooker Test (PCT) 15 PSIG, 121°C, No bias, for a minimum of 168 hours. 5 cycles Temperature Cycles –65/+150, 24 hr Bake 125°C, Moisture loading to qualified MSL level A failure is any device that fails to meet data sheet electrical requirements. Pressure Cooker Test Failure Rate Summary Package TQFP TQFP (10x10) FBGA (0.75) FBGA (1.0) PBGA (1.27) PLCC MLF PQFP PQFP (Thermal) SSOP PDIP SOIC SOJ TSOP TSOPI TSOPII Sample Size 1158 98 545 323 144 513 200 97 144 1024 1027 1533 797 926 93 373 # Failed Defects % 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Note: Data reported is a 4-quarter rolling average. Failure Mode None None None None None None None None None None None None None None None None QUALITY & RELIABILITY CYPRESS 5.0 HIGHLY ACCELERATED STRESS TEST (HAST) Cypress uses HAST to accelerate temperature, humidity, bias failure mechanisms. This change was necessary because our package reliability had improved to the point where the old 85°C/85% R.H. Temperature-humidity-bias testing would not induce failures. Failures are necessary to judge progress and compare packaging changes. HAST testing has been shown to be at least twenty times more accelerated then 85°C/85% R.H. temperature-humidity-bias testing. Test: Conditions: Highly Accelerated Stress Test (HAST) Present Conditions: 130°C / 85% RH minimum power dissipation, for a minimum of 128 hours. Pre-Conditioning: 5 cycles Temperature Cycles –65/+150, 24 hr Bake 125°C, Moisture loading to qualified MSL level Failure : A failure is any device that fails to meet data sheet electrical requirements. Highly Accelerated Stress Test (HAST) Failure Rate Summary Package # Failed Defects % Failure Mode TQFP TQFP (10x10) Sample Size 883 31 0 1 0 3 FBGA (0.75-0.8) FBGA (1.0) PBGA (1.27) VFBGA PLCC MLF LL PQFP PQFP (Thermal) SSOP PDIP SOIC SNC SOJ TSOP TSOPI TSOP (Reverse) TSOP II 422 237 49 85 313 50 50 45 46 329 45 753 434 421 333 91 43 449 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0.2 None (1 unit) Lifted Ball Bond None None None None None None None None None None None None None None None None None (1 unit) Lifted Ball Bond & Cut Wedge Note: Data reported is a 4-quarter rolling average. QUALITY & RELIABILITY CYPRESS 6.0 TEMPERATURE CYCLE TEST (TC) Differences in thermal expansion coefficients are accentuated by cycling devices through temperature extremes. If the materials do not expand and contract equally, large stresses can develop. The Temperature Cycle test stresses mechanical integrity by exposing a device to alternating temperature extremes. Weakness and thermal expansion mismatches in die interconnections, die attach, and wire bonds are often detected with this acceleration test. Test: Condition: Pre-Condition: Duration: Failure: Temperature Cycle MIL-STD -883D, Method 1010, Condition C, -65°C to 150°C. JEDEC 22-A104 Condition B, -40°C to 125°C 5 cycles Temperature Cycles –65/+150, 24 hr Bake 125°C, Moisture loading to qualified MSL level 300 cycles minimum at Condition C, 1000 cycles minimum at Condition B A failure is any device that fails to meet data sheet electrical requirements. Temperature Cycling Failure Rate Summary Package TQFP TQFP (10X10) FBGA (0.75-0.8) FBGA (1.0) PBGA (1.27) PLCC MLF PQFP PQFP (Thermal) SSOP PDIP SOIC SOJ TSOP TSOPI TSOPII TSOP (Reverse) Sample Size 1700 96 849 726 383 570 298 96 305 1385 1053 2566 988 1778 200 690 49 # Failed Defects % Failure Mode 0 0 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0.5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 None None (4 units) Cut Wedge None None None None None None None None None None None None None None Note: Data reported is a 4-quarter rolling average.