PSoC Instruction Set Instructions adc A,expr adc A,[expr] adc A,[X+expr] adc [exp],A adc [X+expr],A adc [expr],expr adc [X+expr],expr add A,expr add A,[expr] add A,[X+expr] add [expr],A add [X+expr],A add [expr],expr add [X+expr],expr add SP,expr and A,expr and A,[expr] and A,[X+expr] and [exp],A and [X+expr],A and [expr],expr and [X+expr],expr and F,expr and reg[expr],expr and reg[X+expr],expr asl A asl [expr] asl [X+expr] asr A asr [expr] asr [X+expr] call cmp A,expr cmp A,[expr] cmp A,[X+expr] cmp [expr],expr cmp [X+expr],expr Flags Cycles Bytes Opcode c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z 4 6 7 7 8 9 10 4 6 7 7 8 9 10 5 4 6 7 7 8 9 10 4 9 10 4 7 8 4 7 8 11 5 7 8 8 9 2 2 2 2 2 3 3 2 2 2 2 2 3 3 2 2 2 2 2 2 3 3 2 3 3 1 2 2 1 2 2 2 2 3 2 3 3 09 0A 0B 0C 0D 0E 0F 01 02 03 04 05 06 0F 38 21 22 23 24 25 26 27 70 41 42 64 65 66 67 68 69 9x 39 3A 3B 3C 3D Instructions sub [expr],expr sub [X+expr],expr swap A,X swap A,[expr] swap X,[expr] swap A,SP tst [expr],expr tst [X+expr],expr tst reg[expr],expr tst reg[X+expr],expr xor F,expr xor A,expr xor A,[expr] xor A,[X+expr] xor [expr],A xor [X+expr],A xor [expr],expr xor [X+expr],expr xor reg[expr],expr xor reg[X+expr],expr Flags Cycles Bytes Opcode c,z c,z z z 9 10 5 7 7 5 8 9 9 10 4 4 6 7 7 8 9 10 9 10 3 3 1 2 2 1 3 3 3 3 2 2 2 2 2 2 3 3 3 3 16 17 4B 4C 5D 5E 47 48 49 4A 72 31 32 33 34 35 36 37 45 46 Assembler Directives area Null Terminates String Reserve RAM bytes Reserve RAM words Define Byte Define String Define Unicode String Define Word Define Word little endian Equate Export IF, ELSE, ENDIF Include Prevent Compression Macro Definition Area Origin Sections z z z z z z z c,z z z c,z c,z c,z c,z c,z c,z z z z z z c,z z z z z z z z z z area asizz blk blkw db ds dsu dw dwl equ export IF, ELSE, ENDIF include .literal, .endliteral macro, endm .org .section .endsection Instructions cpl A dec A dec X dec [expr] dec [X+expr] inc A inc X inc [expr] inc [X+expr] index jacc jc jmp jnc jnz jz lcall ljmp mov X,SP mov A,expr mov A,[expr] mov A,[X+expr] mov [expr],A mov [X+expr],A mov [expr],expr mov [X+expr],expr mov X,expr mov X,[expr] mov X,[X+expr] mov [expr],X mov A,X mov X,A mov A,reg[expr] mov A,reg[X+expr] mov [expr],[expr] mov reg[expr],A mov reg[X+expr],A mov reg[expr],expr mov reg[X+expr],expr Flags z c,z c,z c,z c,z c,z c,z c,z c,z z z z z z z z Cycles Bytes 4 4 4 7 8 4 4 7 8 13 7 5 5 5 5 5 13 7 4 4 5 6 5 6 8 9 4 6 7 5 4 4 6 7 10 5 6 8 9 Opcode Instructions mvi A,[[expr]++] mvi [[expr]++],A nop or A,expr or A,[expr] or A,[X+expr] or [expr],A or [X+expr],A or [expr],expr or [X+expr],expr or reg[expr],expr or reg[X+expr],expr or F,expr pop X pop A push X push A reti ret rlc A rlc [expr] rlc [X+expr] romx rrc A rrc [expr] rrc [X+expr] sbb A,expr sbb A,[expr] sbb A,[X+expr] sbb [expr],A sbb [X+expr],A sbb [expr],expr sbb [X+expr],expr ssc sub A,expr sub A,[expr] sub A,[X+expr] sub [expr],A sub[X+expr],A Flags Name PRTxDR PRTxIE PRTxGS PRTxDM2 PRTx0DM0 PRTx0DM1 PRTx0IC0 PRTx0IC1 Assemby Syntax Bitwise Compliment Mult/Div/Mod Add/Sub Bitwise AND Bitwise XOR Bitwise OR High Byte Low Byte Symbol Fastcall Argument Passing Argument Type Register char A char,char A,X 256*X+A int X,A 256*A+X pointer A,X Fastcall Argument Return Return Type Register char A int X,A 256*X+A pointer A,X 256*A+X 1 1 1 2 2 1 1 2 2 2 2 2 2 2 2 2 3 3 1 2 2 2 2 2 3 3 2 2 2 2 1 1 2 2 3 2 2 3 3 73 78 79 7A 7B 74 75 76 77 Fx Ex Cx 8x Dx Bx Ax 7C 7D 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 Register Definition Port x Data Register Port x Interrupt Enable Port x Global Select Port x Drive Mode 2 Port x Drive Mode 0 Port x Drive Mode 1 Port x Interrupt Control 0 Port x Interrupt Control Bank 0 0 0 0 1 1 1 1 Analog Input Multiplexer 1 AMX_IN I2C Configuration Register I2C Status and Control I2C Data Register I2C Master Status and Control I2C and Software Mask General Interrupt Mask Digital PSoC block Mask 0 0 0 0 0 0 0 I2C_CFG I2C_SCR I2C_DR I2C_MSCR INT_MSK3 INT_MSK0 INT_MSK1 Decimator Register Decimator Register Decimator Control Register Decimator Control Register 0 0 0 0 DEC_DH DEC_DL DEC_CR0 DEC_CR1 Multiplier X Register Multiplier Y Register Multiplier Result Data Multiplier Result Data) MAC X register MAC Y register MAC Clear Accum] MAC Clear Accum MAC Result MAC Result MAC Result MAC Result 0 0 0 0 0 0 0 0 0 0 0 0 MUL_X MUL_Y MUL_DH MUL_DL MAC_X MAC_Y MAC_CL0 MAC_CL1 ACC_DR1 ACC_DR0 ACC_DR3 ACC_DR2 Analog Modulator Control Analog Modulator Control 0 0 AMD_CR0 AMD_CR1 z z z z z z z z z z c,z z c,z c,z c,z c,z z c,z c,z c,z c,z c,z c.z c,z c,z c,z c,z c,z c,z c,z c,z c,z c,z ~ *,/,% +,& ^ | > < Usefull Macros M8C_EnableGInt M8C_DisableGInt M8C_EnableWatchDog M8C_ClearWDT M8C_ClearWDTAndSleep M8C_DisableIntMask M8C_EnableIntMask Apps. Hotline Cycles Bytes 10 10 4 4 6 7 7 8 9 10 9 10 4 5 5 4 4 10 8 4 7 8 11 4 7 8 4 6 7 7 8 9 10 15 4 6 7 7 8 2 2 1 2 2 2 2 2 3 3 3 3 2 1 1 1 1 1 1 1 2 2 1 1 2 2 2 2 2 2 2 3 3 1 2 2 2 2 2 Opcode 3E 3F 40 29 2A 2B 2C 2D 2E 2F 43 44 71 20 18 10 8 7e 7F 6A 6B 6C 28 6D 6E 6F 19 1A 1B 1C 1D 1E 1F 00 11 12 13 14 15 Form (~a) (a*b),(a/b),(a%b) (a+b),(a-b) (a&b) (a^b) (a|b) (>a) (<a) M8C_Stall, M8C_Unstall M8C_SetBank0 M8C_SetBank1 M8C_ClearIntFlag M8C_Sleep M8C_Reset 1 800.669.0557 x4814