SFW/I9Z34 Advanced Power MOSFET FEATURES BVDSS = -60 V ! Avalanche Rugged Technology RDS(on) = 0.14 Ω ! Rugged Gate Oxide Technology ! Lower Input Capacitance ID = -18 A ! Improved Gate Charge ! Extended Safe Operating Area D2-PAK o ! 175 C Operating Temperature ! Lower Leakage Current : 10 µA (Max.) @ VDS = -60V I2-PAK 2 ! Low RDS(ON) : 0.106 Ω (Typ.) 1 1 2 3 3 1. Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS Characteristic Value Drain-to-Source Voltage Continuous Drain Current (TC=25 C) -18 o Continuous Drain Current (TC=100 C) Drain Current-Pulsed VGS Gate-to-Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy dv/dt Peak Diode Recovery dv/dt O O1 O1 O3 2 o Total Power Dissipation (TA=25 C) * o Total Power Dissipation (TC=25 C) Linear Derating Factor TJ , TSTG TL A -12.6 O1 IDM PD V -60 o ID Units Operating Junction and -72 A ±30 V 555 mJ -18 A 8.2 mJ -5.5 V/ns 3.8 W 82 W 0.55 W/ C o - 55 to +175 Storage Temperature Range o Maximum Lead Temp. for Soldering C 300 Purposes, 1/8” from case for 5-seconds Thermal Resistance Symbol Characteristic Typ. Max. RθJC Junction-to-Case -- 1.83 RθJA Junction-to-Ambient * -- 40 RθJA Junction-to-Ambient -- 62.5 Units o C/W * When mounted on the minimum pad size recommended (PCB Mount). Rev. C P-CHANNEL POWER MOSFET SFW/I9Z34 Electrical Characteristics (TC=25oC unless otherwise specified) Symbol Characteristic BVDSS Drain-Source Breakdown Voltage ∆BV/∆TJ VGS(th) IGSS IDSS RDS(on) Min. Typ. Max. Units Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance -60 -- -- -- -0.05 -- -2.0 -- -4.0 -- -- -100 V nA See Fig 7 VDS=-5V,ID=-250µA VGS=-20V VGS=20V -- 100 -- -10 -- -- -100 -- -- 0.14 Ω VGS=-10V,ID=-9A 4 O -- S VDS=-30V,ID=-9A 4 O -- 8.8 Ciss Input Capacitance -- 890 1155 Coss Output Capacitance -- 265 400 Crss Reverse Transfer Capacitance -- 84 125 td(on) Turn-On Delay Time -- 14 40 Rise Time -- 24 60 Turn-Off Delay Time -- 43 95 Fall Time -- 28 65 tf V/ C ID=-250µA -- Forward Transconductance td(off) VGS=0V,ID=-250µA o -- gfs tr V Test Condition Qg Total Gate Charge -- 30 38 Qgs Gate-Source Charge -- 5.3 -- Qgd Gate-Drain(“Miller”) Charge -- 12 -- µA pF VDS=-60V o VDS=-48V,TC=150 C VGS=0V,VDS=-25V,f =1MHz See Fig 5 VDD=-30V,ID=-18A, ns RG=12 Ω See Fig 13 4O 5 O VDS=-48V,VGS=-10V, nC ID=-18A See Fig 6 & Fig 12 4O 5 O Source-Drain Diode Ratings and Characteristics Symbol IS Characteristic Min. Typ. Max. Units Continuous Source Current -18 Test Condition -- -- -- -- -72 -- -- -3.9 V TJ=25 C,IS=-18A,VGS=0V A Integral reverse pn-diode ISM Pulsed-Source Current 1 O VSD Diode Forward Voltage O trr Reverse Recovery Time -- 85 -- ns TJ=25 C,IF=-18A Qrr Reverse Recovery Charge -- 0.25 -- µC diF/dt=100A/µs 4 Notes ; Temperature O1 Repetitive Rating : Pulse Width Limited by Maximum Junction o 2 * =-18A, V =-25V, R =27Ω , Starting T =25 C L=2.0mH, I O AS DD G J O3 ISD <_ -18A, di/dt <_ 300A/µs, VDD <_ BVDSS , Starting TJ =25oC 4 Pulse Test : Pulse Width = 250µs, Duty Cycle< _ 2% O 5 Essentially Independent of Operating Temperature O in the MOSFET o o 4 O P-CHANNEL POWER MOSFET SFW/I9Z34 Fig 1. Output Characteristics Fig 2. Transfer Characteristics VGS 101 - 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom : - 4.5 V -ID , Drain Current [A] -ID , Drain Current [A] Top : @ Notes : 1. 250 µs Pulse Test 2. TC = 25 oC 100 10-1 100 101 175 oC 100 @ Notes : 1. VGS = 0 V 2. VDS = -30 V 3. 250 µs Pulse Test - 55 oC 10-1 101 25 oC 2 4 6 8 10 -VDS , Drain-Source Voltage [V] -VGS , Gate-Source Voltage [V] Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage 0.3 VGS = -10 V 0.2 0.1 VGS = -20 V 0.0 0 10 20 30 40 @ Note : TJ = 25 oC 50 60 -IDR , Reverse Drain Current [A] RDS(on) , [ Ω ] Drain-Source On-Resistance 0.4 101 100 175 oC 10-1 70 @ Notes : 1. VGS = 0 V 2. 250 µs Pulse Test 25 oC 0.5 1.0 -ID , Drain Current [A] 1.5 2.0 2.5 3.0 3.5 4.0 -VSD , Source-Drain Voltage [V] Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage 1500 C iss C oss 900 @ Notes : 1. VGS = 0 V 2. f = 1 MHz 600 C rss 300 00 10 101 -VDS , Drain-Source Voltage [V] VDS = -12 V VDS = -30 V VDS = -48 V 10 -VGS , Gate-Source Voltage [V] Capacitance [pF] 1200 Ciss= Cgs+ Cgd ( Cds= shorted ) Coss= Cds+ Cgd Crss= Cgd 5 @ Notes : ID =-18 A 0 0 5 10 15 20 25 QG , Total Gate Charge [nC] 30 35 P-CHANNEL POWER MOSFET SFW/I9Z34 Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature 2.5 RDS(on) , (Normalized) Drain-Source On-Resistance -BVDSS , (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 0.8 -75 @ Notes : 1. VGS = 0 V 2. ID = -250 µA -50 -25 0 25 50 75 100 125 150 175 2.0 1.5 1.0 0.0 -75 200 @ Notes : 1. VGS = -10 V 2. ID = -9.0 A 0.5 -50 -25 o 0 25 50 75 100 125 150 175 200 TJ , Junction Temperature [oC] TJ , Junction Temperature [ C] Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature -ID , Drain Current [A] Operation in This Area is Limited by R DS(on) 2 10 0.1 ms 1 ms 10 ms 101 DC @ Notes : 1. TC = 25 oC 100 = 175 oC 2. TJ 3. Single Pulse 10-1 0 10 101 16 12 8 4 0 25 102 50 75 100 125 Tc , Case Temperature [oC] -VDS , Drain-Source Voltage [V] Thermal Response Fig 11. Thermal Response 100 D=0.5 @ Notes : 1. Zθ J C (t)=1.83 o C/W Max. 2. Duty Factor, D=t1 /t2 3. TJ M -TC =PD M *Zθ J C (t) 0.2 0.1 10- 1 0.05 P.DM 0.02 t1. t2. 0.01 θ JC Z (t) , -ID , Drain Current [A] 20 single pulse 10- 2 - 5 10 10- 4 10- 3 10- 2 10- 1 t 1 , Square Wave Pulse Duration 100 [sec] 101 150 175 P-CHANNEL POWER MOSFET SFW/I9Z34 Fig 12. Gate Charge Test Circuit & Waveform “ Current Regulator ” VGS Same Type as DUT 50K Ω Qg 200nF 12V -10V 300nF VDS Qgs VGS Qgd DUT -3mA R1 R2 Current Sampling (IG) Resistor Current Sampling (ID) Resistor Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL t on Vout td(on) VDD Vin ( 0.5 rated VDS ) RG Vin t off tr td(off) tf 10% DUT -10V Vout 90% Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD LL VDS Vary tp to obtain required peak ID tp ID VDD RG C VDD -10V IAS tp VDS (t) ID (t) DUT BVDSS Time P-CHANNEL POWER MOSFET SFW/I9Z34 Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT -IS L Driver VGS RG VGS VGS ( Driver ) Compliment of DUT (N-Channel) VDD • dv/dt controlled by “RG” • IS controlled by Duty Factor “D” Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IRM IS ( DUT ) di/dt IFM , Body Diode Forward Current Vf VDS ( DUT ) Body Diode Forward Voltage Drop Body Diode Recovery dv/dt VDD TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FACT ActiveArray FACT Quiet Series Bottomless FASTâ CoolFET FASTr CROSSVOLT FRFET DOME GlobalOptoisolator EcoSPARK GTO E2CMOSTM HiSeC EnSignaTM I2C Across the board. Around the world. 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Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I1