FAIRCHILD IRLR/U230A

$GYDQFHG 3RZHU 026)(7
IRLR/U230A
FEATURES
BVDSS = 200 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.4Ω
♦ Lower Input Capacitance
♦ Improved Gate Charge
ID = 7.5 A
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 200V
D-PAK
♦ Lower RDS(ON): 0.335Ω (Typ.)
I-PAK
2
1
1
3
2
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
VDSS
ID
Characteristic
Value
Drain-to-Source Voltage
200
Continuous Drain Current (TC=25°C)
7.5
Continuous Drain Current (TC=100°C)
4.7
Units
V
A
IDM
Drain Current-Pulsed
VGS
Gate-to-Source Voltage
±20
V
EAS
Single Pulsed Avalanche Energy
(2)
37
mJ
A
A
26
(1)
IAR
Avalanche Current
(1)
7.5
EAR
Repetitive Avalanche Energy
(1)
4.8
mJ
dv/dt
Peak Diode Recovery dv/dt
(3)
5
V/ns
Total Power Dissipation (TA=25°C) *
2.5
W
Total Power Dissipation (TC=25°C)
48
W
0.38
W/°C
PD
Linear Derating Factor
TJ , TSTG
TL
Operating Junction and
- 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
Purposes, 1/8
300
from case for 5-seconds
Thermal Resistance
Symbol
RθJC
Characteristic
Typ.
Max.
Junction-to-Case
--
2.6
RθJA
Junction-to-Ambient *
--
50
RθJA
Junction-to-Ambient
--
110
Units
°C/W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
1
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IRLR/U230A
Electrical Characteristics (TC=25°C unless otherwise specified)
Symbol
Characteristic
BVDSS
Drain-Source Breakdown Voltage
200
--
--
∆BV/∆TJ
Breakdown Voltage Temp. Coeff.
--
0.25
--
1.0
--
2.0
Gate-Source Leakage , Forward
--
--
100
Gate-Source Leakage , Reverse
--
--
-100
--
--
10
--
--
100
--
--
0.4
Ω
VGS=5V,ID=3.75A
(4)
Ω
VDS=40V,ID=4.5A
(4)
VGS(th)
IGSS
IDSS
RDS(on)
Min. Typ. Max. Units
Gate Threshold Voltage
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
gfs
Forward Transconductance
--
4.2
--
Ciss
Input Capacitance
--
580
755
Coss
Output Capacitance
--
90
115
Crss
Reverse Transfer Capacitance
--
44
55
td(on)
Turn-On Delay Time
--
8
25
Rise Time
--
6
20
Turn-Off Delay Time
--
30
70
Fall Time
--
9
30
tr
td(off)
tf
Qg
Total Gate Charge
--
18.6
27
Qgs
Gate-Source Charge
--
3.5
--
Qgd
Gate-Drain ( Miller ) Charge
--
8.3
--
V
Test Condition
VGS=0V,ID=250µA
V/°C ID=250µA
V
nA
µA
pF
See Fig 7
VDS=5V,ID=250µA
VGS=20V
VGS=-20V
VDS=200V
VDS=160V,TC=125°C
VGS=0V,VDS=25V,f =1MHz
See Fig 5
VDD=100V,ID=9A,
ns
RG=6Ω
See Fig 13
(4) (5)
VDS=160V,VGS=5V,
nC
ID=9A
See Fig 6 & Fig 12 (4) (5)
Source-Drain Diode Ratings and Characteristics
Symbol
Characteristic
IS
Continuous Source Current
Min. Typ. Max. Units
--
--
7.5
A
Test Condition
Integral reverse pn-diode
ISM
Pulsed-Source Current
(1)
--
--
26
VSD
Diode Forward Voltage
(4)
--
--
1.5
V
TJ=25°C,IS=7.5A,VGS=0V
trr
Reverse Recovery Time
--
158
--
ns
TJ=25°C,IF=9A
Qrr
Reverse Recovery Charge
--
0.78
--
µC
diF/dt=100A/µs
in the MOSFET
(4)
Notes;
Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
L=1mH, IAS=7.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
ISD ≤ 9A, di/dt ≤ 220A/µs, VDD ≤ BVDSS , Starting TJ =25°C
Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
Essentially Independent of Operating Temperature
2
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IRLR/U230A
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
V
GS
Top :
5.0 V
4.5 V
4.0 V
3.5 V
Bottom : 3.0V
0
10
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1
10
100
150 oC
100
25 oC
10-1
101
@ Notes :
1. VGS = 0 V
2. VDS = 40 V
3. 250 µs Pulse Test
0
2
4
6
8
10
VDS , Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
0.75
VGS = 5 V
0.50
0.25
V = 10 V
GS
@ Note : TJ = 25 C
0.00
0
101
- 55 oC
o
5
10
15
20
25
30
101
100
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
150 oC
o
25 C
10-1
0.4
I , Drain Current [A]
0.6
0.8
1.0
1.2
1.4
1.6
1.8
VSD , Source-Drain Voltage [V]
D
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
900
C iss
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
Crss= Cgd
540
360
C oss
180
C rss
0
100
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
1
10
VDS , Drain-Source Voltage [V]
6
V = 40 V
VGS , Gate-Source Voltage [V]
720
Capacitance [pF]
RDS(on) , [ Ω ]
1.00
Drain-Source On-Resistance
ID , Drain Current [A]
5.5 V
IDR , Reverse Drain Current [A]
ID , Drain Current [A]
101
7.0V
6.0 V
DS
VDS = 100 V
4
VDS = 160 V
2
@ Notes : ID = 9 A
0
0
4
8
12
Q , Total Gate Charge [nC]
G
16
20
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IRLR/U230A
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
3.0
RDS(on) , (Normalized)
Drain-Source On-Resistance
BVDSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
0.9
@ Notes :
1. VGS = 0 V
2.5
2.0
1.5
1.0
@ Notes :
1. VGS = 5 V
2. ID = 4.5 A
0.5
2. ID = 250 µA
0.8
-75
-50
-25
0
25
50
75
100
125
150
0.0
-75
175
-50
-25
TJ , Junction Temperature [oC]
Fig 9. Max. Safe Operating Area
75
100
125
150
175
8
1 ms
10 ms
DC
100
@ Notes :
1. TC = 25 oC
10-1
50
Fig 10. Max. Drain Current vs. Case Temperature
100 µs
101
2. TJ = 150 oC
3. Single Pulse
10-2 0
10
101
6
4
2
0
25
102
50
75
100
T , Case Temperature [oC]
VDS , Drain-Source Voltage [V]
c
Thermal Response
Fig 11. Thermal Response
D=0.5
100
0.1
@ Notes :
1. Z J C (t)=1.0 o C/W Max.
0.05
2. Duty Factor, D=t1 /t2
0.2
10- 1
θ
3. T
PDM J M
0.02
0.01
-T =P
C
DM
10- 2 - 5
10
*Z
θ JC
(t)
t1
single pulse
t2
θJC
Z (t) ,
ID , Drain Current [A]
10
25
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]
2
0
TJ , Junction Temperature [oC]
10- 4
t
1
10- 3
10- 2
10- 1
, Square Wave Pulse Duration
100
[sec]
101
125
150
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IRLR/U230A
Fig 12. Gate Charge Test Circuit & Waveform
Current Regulator
VGS
Same Type
as DUT
50kΩ
Qg
200nF
12V
5V
300nF
VDS
Qgs
VGS
Qgd
DUT
3mA
R1
R2
Current Sampling (IG)
Resistor
Charge
Current Sampling (ID)
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
Vout
Vout
90%
VDD
Vin
( 0.5 rated VDS )
RG
DUT
Vin
10%
5V
td(on)
tr
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
LL
VDS
Vary tp to obtain
required peak ID
BVDSS
IAS
ID
RG
C
DUT
ID (t)
VDD
VDS (t)
VDD
5V
tp
tp
Time
5
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IRLR/U230A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
--
IS
L
Driver
VGS
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
dv/dt controlled by RG
IS controlled by Duty Factor D
Gate Pulse Width
D = -------------------------Gate Pulse Period
5V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode
Forward Voltage Drop
6
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
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First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
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any time without notice in order to improve design.
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This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.