FAIRCHILD SSH8N80A

N-CHANNEL POWER MOSFET
SSH8N80A
FEATURES
BVDSS = 800V
•
Avalanche Rugged Technology
•
Rugged Gate Oxide Technology
•
Lower Input Capacitance
•
Improved Gate Charge
•
Extended Safe Operating Area
•
Lower Leakage Current: 25µA (Max.) @ VDS = 800V
•
Lower RDS(ON): 1.000Ω (Typ.)
RDS(ON) = 1.5Ω
ID = 8A
TO-3P
1
2
3
1. Gate 2. Drain 3. Source
ABSOLUTE MAXIMUM RATINGS
Symbol
VDSS
ID
Characteristics
Drain-to-Source Voltage
Value
Units
800
V
Continuous Drain Current (TC = 25°C)
8
Continuous Drain Current (TC = 100°C)
5.1
IDM
Drain Current-Pulsed
VGS
Gate-to-Source Voltage
EAS
Single Pulsed Avalanche Energy
IAR
①
A
32
A
±30
V
②
444
mJ
Avalanche Current
①
8
A
EAR
Repetitive Avalanche Energy
①
24
mJ
dv/dt
Peak Diode Recovery dv/dt
③
2.0
V/ns
240
1.92
W
W/°C
PD
TJ, TSTG
TL
Total Power Dissipation (TC = 25°C)
Linear Derating Factor
Operating Junction and Storage
Temperature Range
−55 to +150
°C
Maximum Lead Temp. for Soldering
Purposes, 1/8” from case for 5-seconds
300
THERMAL RESISTANCE
Symbol
Characteristics
Typ.
Max.
RθJC
Junction-to-Case
−
0.52
RθCS
Case-to-Sink
0.24
−
RθJA
Junction-to-Ambient
−
40
Units
°C/W
REV. B
1
 1999 Fairchild Semiconductor Corporation
SSH8N80A
N-CHANNEL POWER MOSFET
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified)
Symbol
Characteristics
Min.
Typ.
Max.
Units
Test Conditions
BVDSS
Drain-Source Breakdown Voltage
800
−
−
V
∆BV/∆TJ
Breakdown Voltage Temp. Coeff.
−
0.96
−
V/°C
2.0
−
3.5
V
Gate-Source Leakage, Forward
−
−
100
Gate-Source Leakage, Reverse
−
−
−100
−
−
25
−
−
250
Static Drain-Source
On-State Resistance
−
−
1.5
Ω
VGS=10V, ID=4A
④
gfs
Forward Transconductance
−
6.56
−
S
VDS=50V, ID=4A
④
Ciss
Input Capacitance
−
2020
2600
Coss
Output Capacitance
−
195
230
pF
Crss
Reverse Transfer Capacitance
−
82
95
VGS=0V, VDS=25V
f=1MHz
See Fig 5
td(on)
Turn-On Delay Time
−
25
60
Rise Time
−
37
85
Turn-Off Delay Time
−
113
235
ns
VDD=400V, ID=9A
RG=10Ω
See Fig 13
Fall Time
−
42
95
Qg
Total Gate Charge
−
93
120
Qgs
Gate-Source Charge
−
14.3
−
Qgd
Gate-Drain (Miller) Charge
−
42.1
−
VGS(th)
IGSS
IDSS
RDS(on)
tr
td(off)
tf
Gate Threshold Voltage
Drain-to-Source Leakage Current
nA
µA
nC
VGS=0V, ID=250µA
ID=250µA,
See Fig 7
VDS=5V, ID=250µA
VGS=30V
VGS= −30V
VDS=800V
VDS=640V, TC=125°C
④⑤
VDS=640V, VGS=10V
ID=9A
See Fig 6 & Fig 12 ④ ⑤
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Symbol
IS
Characteristics
Continuous Source Current
Min.
Typ.
Max.
−
−
8
Test Conditions
A
Integral reverse pn-diode
in the MOSFET
ISM
Pulsed-Source Current
①
−
−
32
VSD
Diode Forward Voltage
④
−
−
1.4
V
TJ=25°C, IS=8A, VGS=0V
trr
Reverse Recovery Time
−
560
−
ns
Qrr
Reverse Recovery Charge
−
8.4
−
µC
TJ=25°C, IF=9A
diF/dt=100A/µs
Notes:
① Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
② L=13mH, IAS=8A, VDD=50V, RG=27Ω, Starting TJ =25°C
③ ISD ≤ 9A, di/dt ≤ 180A/µs, VDD ≤ BVDSS, Starting TJ =25°C
④ Pulse Test: Pulse Width ≤ 250µs, Duty Cycle ≤ 2%
⑤ Essentially Independent of Operating Temperature
2
Units
④
N-CHANNEL POWER MOSFET
SSH8N80A
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
ID , Drain Current [A]
10
ID , Drain Current [A]
Top :
1
100
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
100
101
150 oC
100
25 oC
@ Notes :
1. VGS = 0 V
2. VDS = 50 V
3. 250 µs Pulse Test
- 55 oC
10-1
101
2
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS , Drain-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
IDR , Reverse Drain Current [A]
RDS(on) , [ Ω ]
Drain-Source On-Resistance
5
4
VGS = 10 V
3
2
VGS = 20 V
1
@ Note : TJ = 25 oC
0
0
101
100
150 oC
25 oC
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
-1
5
10
15
20
25
30
35
10
40
0.2
0.4
0.6
0.8
1.0
1.2
ID , Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
3000
2000
1000
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C oss
C rss
00
10
1
10
VDS , Drain-Source Voltage [V]
VDS = 160 V
10
VGS , Gate-Source Voltage [V]
Capacitance [pF]
C iss
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
Crss= Cgd
VDS = 400 V
VDS = 640 V
5
@ Notes : ID = 9.0 A
0
0
20
40
60
80
100
QG , Total Gate Charge [nC]
3
SSH8N80A
N-CHANNEL POWER MOSFET
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
3.0
RDS(on) , (Normalized)
Drain-Source On-Resistance
BVDSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
0.9
0.8
-75
@ Notes :
1. VGS = 0 V
2. ID = 250 µA
-50
-25
0
25
50
75
100
125
150
2.5
2.0
1.5
1.0
@ Notes :
1. VGS = 10 V
2. ID = 4.5 A
0.5
0.0
-75
175
-50
-25
o
0
25
50
75
100
125
150
175
TJ , Junction Temperature [oC]
TJ , Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Case Temperature
10
ID , Drain Current [A]
102
100 µs
101
ID , Drain Current [A]
Operation in This Area
is Limited by R DS(on)
10 µs
1 ms
10 ms
DC
100
@ Notes :
1. TC = 25 oC
10-1
8
6
4
2
2. TJ = 150 oC
3. Single Pulse
10-2
101
102
0
25
103
50
75
100
Tc , Case Temperature [oC]
VDS , Drain-Source Voltage [V]
Thermal Response
Fig 11. Thermal Response
D=0.5
10- 1
@ Notes :
1. Zθ J C (t)=0.52 o C/W Max.
2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.2
0.1
ZθJC(t) ,
0.05
PDM
0.02
0.01
t1
single pulse
t2
10- 2
10- 5
10- 4
10- 3
10- 2
10- 1
t1 , Square Wave Pulse Duration
4
100
[sec]
101
125
150
N-CHANNEL POWER MOSFET
SSH8N80A
Fig 12. Gate Charge Test Circuit & Waveform
Current Regulator
VGS
Same Type
as DUT
50K
Qg
200nF
12V
10V
300nF
VDS
Qgs
VGS
Qgd
DUT
3mA
R1
R2
Current Sampling (IG)
Resistor
Current Sampling (ID)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
Vout
Vout
90%
VDD
Vin
( 0.5 rated VDS )
RG
DUT
Vin
10%
10V
td(on)
tr
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
LL
VDS
Vary tp to obtain
required peak ID
BVDSS
IAS
ID
RG
C
DUT
ID (t)
VDD
VDS (t)
VDD
10V
tp
tp
Time
5
SSH8N80A
N-CHANNEL POWER MOSFET
g
y
DUT
+
VDS
--
IS
L
Driver
VGS
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by G
• IS controlled by Duty Factor ?
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
Body Diode
Forward Voltage Drop
6
VDD
TO-3P Package Dimensions
TO-3P (FS PKG CODE AF)
15.60 ±0.20
3.00 ±0.20
3.80 ±0.20
+0.15
1.00 ±0.20
18.70 ±0.20
23.40 ±0.20
19.90 ±0.20
1.50 –0.05
16.50 ±0.30
2.00 ±0.20
9.60 ±0.20
4.80 ±0.20
3.50 ±0.20
13.90 ±0.20
ø3.20 ±0.10
12.76 ±0.20
13.60 ±0.20
1.40 ±0.20
+0.15
5.45TYP
[5.45 ±0.30]
5.45TYP
[5.45 ±0.30]
0.60 –0.05
Dimensions in Millimeters
August 1999, Rev B
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failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.