FAIRCHILD FS8S0965RCB

www.fairchildsemi.com
FS8S0965RCB
Fairchild Power Switch(FPS)
Features
Description
• Burst Mode Operation to Reduce the Power Consumption
in the Standby Mode
• External pin for Synchronization and Soft Start
• Wide Operating Frequency Range up to 150kHz
• Low Start-up Current (Max:80uA)
• Low Operating Current (Max:15mA)
• Pulse by Pulse Current Limiting
• Over Voltage Protection (Auto Restart Mode)
• Over Load Protection (Auto Restart Mode)
• Abnormal Over Current Protection (Auto Restart Mode)
• Internal Thermal Shutdown (Auto Restart Mode)
• Under Voltage Lockout
• Internal High Voltage SenseFET
FS8S0965RCB is a Fairchild Power Switch (FPS) that is
specially designed for off-line SMPS of CRT monitor with
minimal external components. This device is a current mode
PWM controller combined with a high voltage power
SenseFET in a single package. The PWM controller features
integrated oscillator to be synchronized with the external
sync signal, under voltage lockout, optimized gate driver and
temperature compensated precise current sources for the
loop compensation. This device also includes various fault
protection circuits such as over voltage protection, over load
protection, abnormal over current protection and over temperature protection. Compared with discrete MOSFET and
PWM controller solution, FPS can reduce total cost, component count, size and weight simultaneously increasing efficiency, productivity and system reliability. This device is well
suited for the cost effective monitor power supply.
Application
• Monitor SMPS
TO-220-5L
1
1. Drain 2. GND 3. VCC 4. Feedback 5. Sync
Internal Block Diagram
Vcc
3
Vref
Drain
1
Vcc good
Soft start 5
& Sync
Burst Mode Detector
Vfb<=1V
Vss>3V
No sync
Burst Mode
Controller
Vcc
Internal
Bias
OSC
Vref
Idelay
FB
9V/15V
Vref
Sync
Detector
Vref
PWM
IFB
4
S
Q
R
Q
Gate
driver
2.5R
R
LEB
V SD
Vcc
S
Q
R
Q
Vovp
TSD
2 GND
UVLO Reset
(Vcc<9V)
AOCP
Vocl
Rev.1.0.1
©2003 Fairchild Semiconductor Corporation
FS8S0965RCB
Pin Definitions
2
Pin Number
Pin Name
Pin Function Description
1
Drain
High voltage power SenseFET drain connection. This pin is designed to drive
the transformer directly.
2
GND
This pin is the control ground and the SenseFET source.
3
Vcc
This pin is the positive supply input. This pin provides internal operating current
for both start-up and steady-state operation.
4
Feedback
This pin is internally connected to the inverting input of the PWM comparator.
For stable operation, a capacitor should be placed between this pin and GND. If
the voltage of this pin reaches 7.5V, the over load protection is activated
resulting in shutdown of FPS.
5
Soft Start &
Sync
This pin is for soft start and synchronization to the external sync signal.
FS8S0965RCB
Absolute Maximum Ratings
(Ta=25°C, unless otherwise specified)
Parameter
Drain-Gate Voltage (RGS=1MΩ)
Gate-Source (GND) Voltage
(1)
Symbol
Value
Unit
VDGR
650
V
VGS
±30
V
IDM
32.4
ADC
(2)
EAS
515
mJ
Single Pulsed Avalanche Current (3)
IAS
25
A
Continuous Drain Current (Tc = 25°C)
ID
8.1
ADC
Continuous Drain Current (TC=100°C)
ID
5.1
ADC
VCC
40
V
Drain Current Pulsed
Single Pulsed Avalanche Energy
Supply Voltage
Input Voltage Range
Total Power Dissipation
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature Range
VFB
-0.3 to Vcc
V
VS_S
-0.3 to 10
V
PD(Watt H/S)
155
W
Derating
1.243
W/°C
Tj
+150
°C
TA
-25 to +85
°C
TSTG
-55 to +150
°C
Notes:
1. Repetitive rating: Pulse width limited by maximum junction temperature
2. L=14mH, starting Tj=25°C
3. L=13uH, starting Tj=25°C
3
FS8S0965RCB
Electrical Characteristics (SenseFET part)
(Ta=25°C unless otherwise specified)
Parameter
Symbol
Drain Source Breakdown Voltage
BVDSS
Zero Gate Voltage Drain Current
Static Drain Source On Resistance (1)
Forward Transconductance
Typ.
VGS=0V, ID=250µA
650
-
-
V
VDS=650V, VGS=0V
-
-
200
µA
IDSS
VDS=520V
VGS=0V, TC=125°C
-
-
300
µA
RDS(ON)
VGS=10V, ID=1.8A
-
1.0
1.2
Ω
gfs
VDS=50V, ID=1.8A
-
8
-
mho
-
1300
-
-
135
-
-
25
-
-
25
-
-
75
-
-
130
-
-
70
-
-
45
60
-
8
-
-
21
-
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn On Delay Time
td(on)
Rise Time
Turn Off Delay Time
Fall Time
tr
td(off)
tf
Total Gate Charge
(Gate-Source+Gate-Drain)
Qg
Gate-Source Charge
Qgs
Gate-Drain (Miller) Charge
Qgd
Note:
(1) Pulse test : Pulse width ≤ 300µS, duty 2%
4
Min.
Input Capacitance
Condition
VGS=0V, VDS=25V,
f = 1MHz
VDD=325V, ID=6.5A
(MOSFET switching
time is essentially
independent of
operating temperature)
VGS=10V, ID=6.5A,
VDS=520V (MOSFET
switching time is essentially
independent of operating
temperature)
Max.
Unit
pF
nS
nC
FS8S0965RCB
Electrical Characteristics (Continued)
(Ta=25°C unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
UVLO SECTION
Start Threshold Voltage
VSTART
VFB=GND
14
15
16
V
Stop Threshold Voltage
VSTOP
VFB=GND
8
9
10
V
18
20
22
kHz
12V ≤ Vcc ≤ 23V
0
1
3
%
-25°C ≤ Ta ≤ 85°C
0
±5
±10
%
OSCILLATOR SECTION
Initial Frequency
FOSC
Voltage Stability
FSTABLE
-
Temperature Stability (1)
∆FOSC
Maximum Duty Cycle
DMAX
-
92
95
98
%
Minimum Duty Cycle
DMIN
-
-
-
0
%
FEEDBACK SECTION
Feedback Source Current
IFBSO
VFB=GND
0.7
0.9
1.1
mA
Feedback Sink Current
IFBSI
VFB=4V,VCC=19V
2.4
3.0
3.6
mA
Shutdown Feedback Voltage
VSD
Vfb ≥ 6.9V
6.9
7.5
8.1
V
Idelay
VFB=5V
1.6
2.0
2.4
µA
Over Voltage Protection
VOVP
Vcc ≥ 27V
34
37
-
V
Over Current Latch Voltage (2)
VOCL
-
0.95
1.0
1.05
V
TSD
-
140
160
-
°C
Shutdown Delay Current
PROTECTION SECTION
Thermal Shutdown Temp.(1)
SYNC & SOFTSTART SECTION
Softstart Vortage
VSS
Vfb=2
4.7
5.0
5.3
V
Softstart Current
ISS
Vss=0V
0.8
1.0
1.2
mA
Sync High Threshold Voltage
VSH
Vcc=16V,Vfb=5V
6.7
7.2
7.9
V
Sync Low Threshold Voltage
VSL
Vcc=16V,Vfb=5V
5.4
5.8
6.2
V
Note:
1. These parameters, although guaranteed at the design, are not tested in mass production.
2. These parameters, although guaranteed, are tested in EDS(wafer test) process.
5
FS8S0965RCB
Electrical Characteristics(Continued)
Parameter
Symbol
Condition
Min. Typ. Max. Unit
BURST MODESECTION(DPMS MODE)
Burst Mode High Threshold Voltage
VBUH
Vfb=0V
11.6
VBUL
12
12.6
V
Vfb=0V
10.6
11
11.6
V
Burst Mode Enable FB Voltage
VBUFB
Vcc=10.5V
0.9
1.0
1.1
V
Burst Mode Enable S_S Voltage
VBUSS
Vcc=10.5V,Vfb=0V
2.5
3.0
3.5
V
Burst Mode Enable Delay Time
TBUDT
Vcc=10.5V,Vfb=0V
-
0.5
-
ms
FBU
Vcc=10.5V,Vfb=0V
32
40
48
kHz
Burst Mode Low Threshold Voltage
Burst Mode Frequency
CURRENT LIMIT(SELF-PROTECTION)SECTION
Peak Current Limit(1)
IOVER
-
5.28
6.0
6.72
A
Burst Mode Peak Current Limit
IBU_PK
-
0.45
0.6
0.75
A
-
40
80
uA
-
9
15
mA
TOTAL DEVICE SECTION
Start Up Current
Operating Supply Current (2)
ISTART
IOP
Vfb=GND, VCC=16V
IOP(MIN)
Vfb=GND, VCC=12V
IOP(MAX)
Vfb=GND, VCC=27V
Note:
1. These parameters indicate inductor current.
2. These parameters are the current flowing in the control IC.
6
VCC=Vstart-0.1V
FS8S0965RCB
Typical Performance Characteristics
(These characteristic graphs are normalized at Ta= 25°C)
Operating Supply Current VS Temp.
1.20
1.15
1.15
1.10
1.10
Normalized to 25℃
Normalized to 25℃
Start Up Current VS Temp.
1.20
1.05
1.00
0.95
0.90
0.85
1.05
1.00
0.95
0.90
0.85
0.80
-40
-20
0
20
40
60
80
0.80
-40
100 120 140 160
-20
0
20
Temperature[℃ ]
Figure 1. Start Up Current vs. Temp.
1.15
1.15
1.10
1.10
Normalized to 25℃
Normalized to 25℃
1.20
1.05
1.00
0.95
0.90
100 120 140 160
1.05
1.00
0.95
0.90
0.85
0.85
-20
0
20
40
60
80
0.80
-40
100 120 140 160
-20
0
20
40
60
80
100 120 140 160
Temperature[℃]
Temperature[℃]
Figure 4. Stop Threshold Voltage vs. Temp.
Figure 3. Start Threshold Voltage vs. Temp.
Maximum Duty Cycle VS Temp.
Initial Freqency VS Temp.
1.20
1.20
1.15
1.15
1.10
1.10
Normalized to 25℃
Normalized to 25℃
80
Stop Threshold Voltage VS Temp.
Start Threshold Voltage VS Temp.
1.05
1.00
0.95
0.90
0.85
0.80
-40
60
Figure 2. Operating Supply Current vs. Temp.
1.20
0.80
-40
40
Temperature[℃]
1.05
1.00
0.95
0.90
0.85
-20
0
20
40
60
80
100
120
Temperature[℃ ]
Figure 5. Initial Freqency vs. Temp.
140
160
0.80
-40
-20
0
20
40 60 80 100 120 140 160
Temperature[℃ ]
Figure 6. Maximum Duty Cycle vs. Temp.
7
FS8S0965RCB
Typical Performance Characteristics(Continued)
(These characteristic graphs are normalized at Ta= 25°C)
Feedback Sink Current VS Temp.
1.20
1.15
1.10
Normalized to 25℃
Normalized to 25℃
Feedback Offset Voltage VS Temp.
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
-40
1.05
1.00
0.95
0.90
0.85
-20
0
20
40
60
80
0.80
-40
100 120 140 160
-20
0
20
1.15
1.15
1.10
1.10
Normalized to 25℃
Normalized to 25℃
1.20
0.95
0.90
1.00
0.95
0.90
0.85
0.80
-40
-20
0
20
40
60
80
0.80
-40
100 120 140 160
-20
0
20
Figure 9. Shutdown Delay Current vs. Temp.
60
80
100 120 140 160
Figure 10. Shutdown Feedback Voltage vs. Temp.
SoftStart Voltage VS Temp.
Over Voltage Protection VS Temp.
1.20
1.15
1.15
Normalized to 25℃
1.20
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40
40
Temperature[℃ ]
Temperature[℃]
Normalized to 25℃
100 120 140 160
1.05
0.85
1.10
1.05
1.00
0.95
0.90
0.85
-20
0
20
40
60
80
100 120 140 160
Temperature[℃ ]
Figure 11. Soft Start Voltage vs. Temp.
8
80
Shutdown Feedback Voltage VS Temp.
Shutdown Delay Current VS Temp.
1.20
1.00
60
Figure 8. Feedback Sink Current vs. Temp.
Figure 7. Feedback Offset Voltage vs. Temp.
1.05
40
Temperature[℃ ]
Temperature[℃]
0.80
-40
-20
0
20
40
60
80
100 120 140 160
Temperature[℃]
Figure 12. Over Voltage Protection vs. Temp.
FS8S0965RCB
Typical Performance Characteristics(Continued)
(These characteristic graphs are normalized at Ta= 25°C)
Peak Current Limit VS Temp.
1.20
1.15
1.15
1.10
1.10
Normalized to 25℃
Normalized to 25℃
Normal Mode Regulation Voltage VS Temp.
1.20
1.05
1.00
0.95
0.90
0.85
1.05
1.00
0.95
0.90
0.85
0.80
-40
-20
0
20
40
60
80
0.80
-40
100 120 140 160
-20
0
20
Temperature[℃]
80
100 120 140 160
Burst Mode Low Threshold Voltage VS Temp.
Feedback Sink Current VS Temp.
1.20
1.4
1.15
Normalized to 25℃
1.3
Normalized to 25℃
60
Figure 14. Peak Current vs. Temp.
Figure 13. Normal Mode Regulation Voltage vs. Temp.
1.2
1.1
1.0
0.9
1.10
1.05
1.00
0.95
0.90
0.85
0.8
-40
-20
0
20
40
60
80
0.80
-40
100 120 140 160
-20
0
20
Temperature[℃]
60
80
100
120
140
160
Figure 16. Burst Mode Low Threshold Voltage vs. Temp.
Burst Mode Enable FB Voltage VS Temp.
Burst Mode High Threshold Voltage VS Temp.
1.20
1.15
1.15
1.10
1.10
Normalized to 25℃
1.20
1.05
1.00
0.95
0.90
0.85
0.80
-40
40
Temperature[℃ ]
Figure 15. Feedback Sink Current vs. Temp.
Normalized to 25℃
40
Temperature[℃]
1.05
1.00
0.95
0.90
0.85
-20
0
20
40
60
80
100
120
140
160
Temperature[℃ ]
Figure 17. Burst Mode High Threshold Voltage vs. Temp.
0.80
-40
-20
0
20
40
60
80
100
120
140
160
Temperature[℃ ]
Figure 18. Burst Mode Enable Voltage vs. Temp.
9
FS8S0965RCB
Typical Performance Characteristics(Continued)
(These characteristic graphs are normalized at Ta= 25°C)
Burst Mode Peak Current VS Temp.
1.20
Normalized to 25℃
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40
-20
0
20
40
60
80
100 120 140 160
Temperature[℃]
Figure 19. Burst Mode Peak Current vs. Temp.
10
FS8S0965RCB
Functional Description
1. Start up : To guarantee stable operation of the
control IC, FS8S0965RCB has UVLO circuit with 6V
hysteresis band. Figure 1 shows the relation between the supply current (Icc) and the supply voltage (Vcc). Before Vcc
reaches 15V, the FPS consumes only startup current of
80µA, which is usually provided by the DC link through
start-up resistor. When Vcc reaches 15V, the FPS begins
operation and the operating current increases to 15mA as
shown. Once the control IC starts operation, it continues its
normal operation until Vcc goes below the stop voltage of
9V
Icc
3. Protection function : FS8S0965RCB has 4 self
protective functions such as abnormal over current protection (AOCP), over load protection (OLP), over voltage protection (OVP) and thermal shutdown (TSD). Because these
protection circuits are fully integrated into the IC without
external components, the reliability can be improved without
cost increase. In the event of these fault conditions, the FPS
enters into auto-restart operation. Once the fault condition
occurs, switching operation is terminated and MOSFET
remains off, which forces Vcc to be reduced. When Vcc
reaches 9V, the protection is reset and the supply current
reduces to 80 uA. Then, Vcc begin to increase with the current provided through the start-up resistor. When Vcc
reaches 15V, the FPS resumes its normal operation if the
fault condition is removed. In this manner, the auto-restart
alternately enables and disables the switching of the power
MOSFET until the fault condition is eliminated as illustrated
in figure 3.
15mA
Prote c tion is a c tiva te d
(O CP,O LP,O VP or T SD)
V
Vds
80uA
Vcc
Vstop=9V
Vstart=15V
OVP
Figure 1. Strat up with hysteresis
2. Feedback Control : FS8S0965RCB employs primary side
regulation, which permits elimination of feedback circuit
components in the secondary side such as opto coupler and
TL431. Figure 2 shows the primary side control circuit. The
primary side regulation voltage (Vpsr) is controlled to the
breakdown voltage of zener diode (Dz). Because current
mode control is employed, the drain current of the power
MOSFET is limited by the inverting input of PWM comparator (Vfb*). When MOSFET turns on, usually there exists
high current spike in the MOSFET current caused by primary-side capacitance and secondary-side rectifier reverse
recovery. In order to prevent premature termination of the
switching pulse due to the current spike, the FPS employs
leading edge blanking (LEB). The leading edge blanking circuit inhibits the PWM comparator for a short time after the
MOSFET is turned on.
V cc
V ref
2uA
V psr
V fb
DZ
tim e
V
Vcc
15V
9V
Vcc
tim e
Figure 3. Auto restart operation after protection
3.1 Abnormal Over Current Protection (AOCP) : When
the secondary rectifying diodes or the transformer pins are
shorted, a steep current with extremely high di/dt can flow
during the LEB time. Therefore, the abnormal over current
protection (AOCP) block is added to ensure the reliability as
shown in figure 4. It turns off the SenseFET within 300ns
after the abnormal over current condition is sensed.
OVP
0.9m A
OLP
FB
4
O SC
D1
Cfb
D2
S Q'
TSD
2.5R
SenseFET
GATE
DRIVER
R
V fb*
G ate
driver
R
RZ
V SD
Au to re sta rt
O LP
UVLO
PWM Comp
AOCP COMP.
Vsense : 1V
Figure 2. Primary side control circuit
Figure 4. AOCP block
11
FS8S0965RCB
3.2 Over Load Protection (OLP) : When the load current
exceeds a pre-set level for longer than pre-determined time,
protection circuit should be activated in order to protect the
SMPS. Because of the pulse-by-pulse current limit
capability, the maximum peak current through the SMPS is
limited, and therefore the maximum input power is restricted
with a given input voltage. If the output consumes beyond
this maximum power, the output voltage together with primary side regulation voltage decrease below the set voltage.
This reduces the current through primary side regulation
transistor, which increases feedback voltage (Vfb). If Vfb
exceeds 2.7V, D1 is blocked and the 2uA current source
starts to charge Cfb slowly compared to when the 0.9mA
current source charges Cfb. In this condition, Vfb continues
increasing until it reaches 7.5V, and the switching operation
is terminated at that time as shown in figure 6. The delay
time for shutdown is the time required to charge Cfb from
2.7V to 7.5V with 2uA.
3.3 Over Voltage Protection (OVP) : In case of malfunction in the primary side feedback circuit, or feedback loop
open caused by a defect of solder, the current through primary side control transistor becomes almost zero. Then, Vfb
climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the secondary side until the over load protection is activated. Because
energy more than required is provided to the output, the output voltage may exceed the rated voltage before the over
load protection is activated, resulting in the breakdown of the
devices in the secondary side. In order to prevent this situation, an over voltage protection (OVP) circuit is employed.
When the Vcc voltage touches 37V, the OVP block is activated.
3.4 Thermal Shutdown (TSD) : The SenseFET and the
control IC are built in one package. This makes it easy for
the control IC to detect the heat generation from the
SenseFET. When the temperature exceeds approximately
160°C, the thermal shutdown is activated.
V
4. Soft Start : Figure 7 shows the soft start circuit. During
the initial start up, the 0.9 mA current source leaks out
through Css and Rss. As Css is charged, the leakage current
decreases. Therefore, by choosing much bigger Css than
Cfb, it is possible to increase the feedback voltage slowly
forcing the SenseFET current to increase slowly. After Css
reaches its steady state value, D3 is blocked and the soft
switching circuit is decoupled from the feedback circuit. If
the value of Css is too large, there is possibility that Vfb
increases to 7.5V activating the over load protection during
soft start time. In order to avoid this situation, it is recommended that the value of Css should not exceed 100 times of
Cfb.
Vds
time
V
22V
15V
Vcc
9V
Auto restart
time
Over load protection
V
7.5V
Vref
50K
Vfb
Css
5
time
Figure 5. The waveforms at the OLP and auto restart
Rss
D3
2.5R
Cfb
V FB
2uA
Over load protection
D
OSC
4
PWM
COMP.
S
GATE
DRIVER
0.9mA
R
7.5V
Voffset
FS8S0965RCB
Figure 7. The circuit for the soft start
2.7V
T 12 = Cfb*(7.5-2.7)/I delay
T1
Figure 6. Over load protection
T2
t
5. Synchronization : In order to reduce the effect of switching noise on the screen, the SMPS for monitor synchronizes
its switching frequency to an external signal, typically the
horizontal sync flyback signal. The switching frequency of
the FPS can vary from 20 kHz to 150 kHz according to the
12
FS8S0965RCB
external sync signal. The internal sync comparator detects
the sync signal and determines the SenseFET turn-on time.
The SenseFET is turned on at the negative edge of the sync
comparator output. The reference voltage of the sync comparator is an inverted saw tooth with a base frequency of
20kHz and a varying range between 5.8V and 7.2V, as
shown in the figure 8. The inverted saw tooth reference gets
rid of the excessive switching noise at the first synchronized
turn-on. The external sync signal is recommended to have an
amplitude higher than 4.2V.
sumption in standby mode, it is recommended to set the
value of Vcc during normal operation as high as possible
(about 29V).
V
5V
Vsync
3V
V
Vfb
Vref
SYNC COMP.
Css
1V
5
7.2V
External
Sync
Rss
D3
V
5.8V
D
OSC
4
Cfb
2.5R
2uA
Vds
S
PWM COMP.
GATE
DRIVER
0.9mA
V
R
Vcc
Voffset
FS8S0965RCB
Vcc
15V
12V
11V
9V
Figure 8. The circuit for the synchronization with external
sync
6. Burst mode operation : In order to minimize the power
dissipation at standby mode, FS8S0965RCB has a burst
mode operation. In burst mode, the FPS reduces the effective
switching frequency and output voltage. The FPS enters into
burst mode when the voltage of the soft start pin is higher
than 3V, no sync signal is applied and the feedback voltage is
lower than 1V. During the burst mode operation, Vcc is hysteresis controlled between 11V and 12V. Once the FPS
enters into burst mode, it stops switching operation until Vcc
drops to 11V. When Vcc reaches 11V, the FPS starts switching with switching frequency of 40kHz and peak MOSFET
current of 0.6 A until Vcc reaches 12V. When Vcc reaches
12V, the switching operation is terminated again until Vcc
reduces to 11V. Figure 9 shows operating waveforms. The
soft start during the initial start-up is shown in the section 1.
During this period, there is no external sync signal and the
switching frequency is 20kHz. The section 2 represents the
normal mode operation. The switching frequency is synchronized with the external sync signal. In the section 3, the
external sync signal is removed. However, the load still
exists and thus the feedback voltage (Vfb) is higher than 1V.
In this period, the FPS does the normal switching operation
with switching frequency of 20kHz. The section 4 and 5
show the burst mode operation. At the end of the section 3,
the load is eliminated and the feedback voltage (Vfb) drops
below 1V forcing the FPS to stop switching operation. During the section 4, Vcc goes down to 11V. During section 5,
Vcc is hysteresis controlled between 11V and 12V. When the
external sync signal is applied on the pin 5, the FPS resumes
its normal operation. In order to minimize the power con-
Section 4
Section I
Section 2
Section 3
Section 5
Section 6 time
Figure 9. The operation of the FS8S0965RCB at the normal mode and the off mode
13
FS8S0965RCB
Typical application circuit
1. 100W Universal Input Power Supply For CRT Monitor
T1
+ 2
1
BD101
3
+
D201
16
L201
R101
68K/2W
C106
220uF/400V
19T
+
46T
2
15
3
14
+
C201
22uF/400V
R201
300k
C202
22uF/400V
R202
4.2k
D202
4
-
1
C107
47nF/630V
L202
D101
R103
600K/1W
C105
18T
12
+
11T
3
C103
C104
C108
1uF/50V
4.7nF
4.7nF
IC101
S/S
Vfb
Drain
GND
1
7T
FS8S0965RCB
C110
C109
47nF
+
C206
1000uF/35V
15V
800mA
11
2
Vcc
C208
1000uF/35V
L205
3T
47uF/50V
L204
C207
1000uF/35V
-15V
600mA
D205
10
R104
2.2k
C102 47nF
+
D204
+
4
+
L203
C205
1000uF/35V
7T
7
5
80V
100mA
C204
47uF/160V
D203
15
Line Filter: LF101
+
C203
47uF/160V
13
D102
6
47nF
+
37T
4
R102
+
0
RT101
+
+
C209
1000uF/16V
C210
1000uF/16V
6.5V
600mA
9
C9
C10
C101 TNR
4.7nF
4.7nF
0
F101
FUSE
R203
1k
1
R204
1k
3
2
1
IC301
HC11A817A
4
IC201
KA431(LM431)
C211
47n
8
6
0
R205
33k
C111
2
1nF
C212 ; 0.1uF
1uF
D103 : 1N4148
1
C112
Regulator ouput_5
Hsync_O
Sync trans
Micro
controller
DC5V
R206
0
0.1K
Q201 : KSC945
R207
4k
0.7k
Off
signal
On -->
normal mode:
Off --> off mode
R208
2. Transformer Schematic Diagram
Lm : 340uH
16
1
Nvo1 : 46T
15
14
Np2 : 19T
2,3
Nvo2 : 37T
13
12
Np1 : 18T
Nvo3 : 7T
4
6
11
Nvo4 : 7T
10
Nvcc : 11T
Nvo5 : 3T
7
9
14
FS8S0965RCB
3.Winding Specification
No
Pin (s→f)
Wire
Turns
Winding Method
4→3
φ
18
Solenoid Winding
46
Center Winding
3
Center Winding
7
Solenoid Winding
7
Solenoid Winding
37
Solenoid Winding
11
Solenoid Winding
19
Solenoid Winding
Np1
0.3 × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
Nvo1
16 → 15
0.3φ × 2
Insulation: Polyester Tape t = 0.050mm, 2Layers
Nvo5
0.45φ
10 → 9
Insulation: Polyester Tape t = 0.050mm, 2Layers
9→ 11
Np4
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
Nvo3
12 → 9
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
Nvo2
14 → 13
0.3φ × 2
Insulation: Polyester Tape t = 0.050mm, 2Layers
Nvcc
0.2φ
6→7
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np2
2→1
0.3φ × 3
Outer Insulation: Polyester Tape t = 0.050mm, 2Layers
4.Electrical Charateristics
Pin
Specification
Remarks
Inductance
1-4
340uH ± 10%
300kHz, 1V
Leakage Inductance
1-4
5uH Max
2nd all short
5. Core & Bobbin
Core : EER 4044
Bobbin : EER 4044
Ae(mm2) : 154
15
FS8S0965RCB
6.Demo Circuit Part List
Part
Value
Note
Part
Value
Note
C201
22uF/400V
Electorlytic Capacitor
C202
22uF/400V
Electorlytic Capacitor
C203
47uF/160V
Electorlytic Capacitor
-
C204
47uF/160V
Electorlytic Capacitor
Fuse
F101
3A/250V
-
NTC
RT101
10D-9
C205
1000uF/35V
Electorlytic Capacitor
R101
68K
2W
C206
1000uF/35V
Electorlytic Capacitor
R102
15
1/4W
C207
1000uF/35V
Electorlytic Capacitor
R103
600K
1W
C208
1000uF/35V
Electorlytic Capacitor
R104
2.2K
1/4W
C209
1000uF/16V
Electorlytic Capacitor
R201
300K
1/4W
C210
1000uF/16V
Electorlytic Capacitor
R202
4.2K
1/4W
C211
47nF/50V
Ceramic Capacitor
R203
1K
1/4W
C212
0.1uF/16V
Electorlytic Capacitor
R204
1K
1/4W
C301
4.7nF
AC Filter Capacitor
R205
33K
1/4W
C302
4.7nF
AC Filter Capacitor
R206
0.1K
1/4W
Sync
trans
22mH
Resistor
R207
4K
1/4W
R208
0..7K
1/4W
Inductor
L201 ~ L205
13uH
Diode
Capacitor
D101
UF4007
D102
TVR10G
C101
471D10
TNR
D103
1N4148
C102
47nF
Box Capacitor
D201
RG4C
C103
4.7nF
AC Filter Capacitor
D202
SUF15J
C104
4.7nF
AC Filter Capacitor
D203
UG4D
C105
47nF
Box Capacitor
D204
UG4D
D205
UG4D
C106
220uF/400V
Electorlytic Capacitor
D206
UF4004
C107
47nF/630V
Caramic Capacitor
C108
1uF/50V
Electorlytic Capacitor
BD101
KBU6G
C109
47nF/50V
Caramic Capacitor
C110
47uF/50V
Electorlytic Capacitor
C111
1uF/50V
Electorlytic Capacitor
C112
1nF/50V
Caramic Capacitor
Bridge Diode
Line Filter
LF101
24mH
IC
IC101
FS8S0965RCB
(9A, 650V)
IC201
KA431
IC301
H11A817A
Photo coupler/QT
Q201
KSC945
NPN Transistor
16
FS8S0965RCB
Package Dimensions
TO-220-5L
17
FS8S0965RCB
Package Dimensions (Continued)
TO-220-5L(Forming)
18
FS8S0965RCB
Ordering Information
Product Number
FS8S0965RCBTU
FS8S0965RCBYDTU
TU : Non Forming Type
YDTU : Forming Type
19
Package
TO-220-5L
TO-220-5L(Forming)
Marking Code
BVdss
Rds(on)Max.
8S0965RCB
650V
1.2
FS8S0965RCB
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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