System Lens Driver Series for Mobile Phone Cameras 2-wire serial interface Lens Driver for Voice Coil Motor (I2C BUS compatible) No.12015EAT03 BH6456GUL ●General Description The BH6456GUL motor driver provide 1 Full on Driver a H-bridge. This lens driver is offered in an ultra-small functional lens system for use in an auto focus system using a Piezo actuator. ●Key Specifications Pch ON Resistance: Nch ON Resistance: Standby current consumption: 15MHz OSC: Operating temperature range: ●Features Ultra-small chip size package . Low ON-Resistance Power CMOS output. Built-in 15MHz Oscillator Built-in UVLO (Under Voltage Locked Out: UVLO). Built-in TSD (Thermal Shut Down) circuit. Standby current consumption: 0μA Typ. 1.8V can be put into each control input terminal ●Package(s) VCSP50L1 0.70Ω(Typ.) 0.70Ω(Typ.) 0μA (Typ.) ±3.0% -25℃ to +85℃ W(Typ.) x D(Typ.) x H(Max.) 1.95mm x 1.00mm x 0.55mm ●Applications For Auto focus of camera module Digital still camera Camera Modules Lens Auto focus Web Cameras ●Typical Application Circuit(s) VCC SDA SCL 2-wire Serial Interface TSD UVLO Band Gap VREG VM Pre Driver PS Controller OUTA H Bridge 15MHz OSC OUTB GND Fig.1 Block Diagram ○Product structure:Silicon monolithic integrated circuit www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. ○This product is not designed protection against radioactive rays 1/19 2012.03 - Rev.A Technical Note BH6456GUL ● Absolute maximum ratings (Ta=+25°C) Parameter Power supply voltage Motor power supply voltage Power save input voltage Control input voltage Power dissipation Operating temperature range Junction temperature Storage temperature range H-bridge output current Symbol VCC VM VPS VIN Pd Limit -0.3 to +4.5 -0.3 to +5.5 -0.3 to VCC+0.3 -0.3 to VCC+0.3 530*1 Unit V V V V mW Topr -25 to +85 °C Tjmax Tstg Iout +125 -55 to +125 -500 to +500*2 °C °C mA *1 Conditions: mounted on a glass epoxy board (50mm 58mm 1.75mm; 8 layers). *2 Must not exceed Pd, ASO, or Tjmax of 125°C. ●Operating Conditions (Ta= -25°C to +85°C) Parameter Power supply voltage Motor power supply voltage Power save input voltage Control input voltage 2-wire serial interface transmission rate H-bridge output current *3 Symbol VCC VM VPS VIN SCL Iout In case of Ta>25°C, reduced by 5.3 mW/°C. Min. 2.3 2.3 0 0 - Typ. 3.0 3.0 - Max. 3.6 4.8 VCC VCC 400 400*3 Unit V V V V kHz mA Must not exceed Pd, ASO. Package Outline Pin Arrangement (Top View) 1.0±0.05 1PIN MARK AAU 1 2 3 4 A VM OUTB SCL SDA B OUTA GND VCC PS Top View Lot No. φ0.25±0.1 (φ0.15) INDEX POST Fig.3 Pin Arrangement (Top View) Side View P=0.5×1 0.1±0.05 0.55MAX 1.95±0.05 P=0.5×3 0.25±0.05 Bottom View 0.225±0.05 Fig.2 VCSP50L1 Package (Unit: mm) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 2/19 2012.02 - Rev.A Technical Note BH6456GUL ● Electrical Characteristics (Unless otherwise specified Ta=25°C, VCC=3.0V ) Limit Parameter Symbol Unit Conditions Min. Typ. Max. Overall Circuit current ICCST 0 1 μA PS=L during standby operation Circuit current ICC 3.2 6.4 mA PS=H, SCL=400kHz, OSC active UVLO UVLO voltage VUVLO 1.8 2.2 V Power save input High level input voltage VPSH 1.5 VCC V Low level input voltage VPSL 0 0.5 V IPSH High level input current 15 30 60 μA VINH=3.0V IPSL Low level input current -3 0 μA VINL=0V Control input(SDA,SCL) VINH High level input voltage 1.5 VCC V VINL Low level input voltage 0 0.5 V VOL Low level output voltage 0.4 V IIN=3.0mA (SDA) IINH High level input current -10 10 μA Input voltage=VCC IINL Low level input current -10 10 μA Input voltage=GND H Bridge Drive Ω RONP 0.7 1.0 Output ON-Resistance Ω RONN 0.7 1.0 Cycle length of *4 TMIN 10.35 10.67 11.00 μs Built in CLK 160 count sequence drive *5 Output rise time Tr 0.1 0.8 μs 7.5Ω load condition *5 Output fall time Tf 0.02 0.4 μs 7.5Ω load condition *4 *5 The time that 1 cycle of sequence drive at the below setting of 2-wire serial data ta[7:0] = 0x13, brake1[7:0] = 0x03, tb[7:0] = 0x1E, brake2[7:0] = 0x6B, osc[2:0] = 0x0 Output switching wave Output voltage 90% 10% 90% 10% Tf www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 100 0% Tr 3/19 2012.02 - Rev.A Technical Note BH6456GUL ●2 wire Serial Interface Register detail Write mode : S Read mode : S 0 0 0 0 0 0 S=Start condition P=Stop condition 1 1 1 1 0 0 0 0 A PS T2 T1 T0 W3 W2 W1 W0 A D7 D6 D5 D4 D3 D2 D1 D0 A P ↑ ↑ Write Up date 0 0 A PS T2 T1 T0 W3 W2 W1 W0 A S 0 0 0 1 1 ↑ Write A=Acknowledge PS=Power save W3~W0=Resister address nA=not Acknowledge T2~T0=Test bit D7~D0=Data 0 0 Master is output Slave is output 1 A D7 D6 D5 D4 D3 D2 D1 D0 nA P ↑ Read ●Resister Address W3 W2 W1 W0 D7 D6 D5 D4 D3 D2 D1 D0 0H 0 0 0 0 HiZE initB[2] initB[1] InitB[0] init START MODE dir 1H 0 0 0 1 ta[7] ta[6] ta[5] ta[4] ta[3] ta[2] ta[1] ta[0] 2H 0 0 1 0 3H 0 0 1 1 4H 0 1 0 0 5H 0 1 0 1 cnt[7] cnt[6] cnt[5] cnt[4] cnt[3] cnt[2] cnt[1] cnt[0] 6H 0 1 1 0 cnt[15] cnt[14] cnt[13] cnt[12] cnt[11] cnt[10] cnt[9] cnt[8] 7H 0 1 1 1 pa pb osc[2] osc[1] osc[0] cntck[2] cntck[1] cntck[0] 8H 1 0 0 0 TEST TEST TEST TEST TEST TEST TEST TEST 9H 1 0 0 1 TEST TEST TEST TEST TEST TEST TEST TEST AH 1 0 1 0 TEST TEST TEST TEST TEST TEST EXT initEXT BH 1 0 1 1 TEST TEST TEST TEST TEST TEST TEST TEST CH 1 1 0 0 TEST TEST TEST TEST TEST TEST TEST TEST brake1[7] brake1[6] brake1[5] brake1[4] brake1[3] brake1[2] brake1[1] brake1[0] tb[7] tb[6] tb[5] tb[4] tb[3] tb[2] tb[1] tb[0] brake2[7] brake2[6] brake2[5] brake2[4] brake2[3] brake2[2] brake2[1] brake2[0] www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 4/19 2012.02 - Rev.A Technical Note BH6456GUL ●2 wire Serial Interface Action Timing Characteristics (Unless otherwise specified, Ta=-25 to +85°C, VCC=2.3 to 4.8V) FAST-MODE*6 STANDARD-MODE*6 Parameter Symbol Min. Typ. Max. Min. Typ. Max. SCL frequency fSCL 400 100 Data clock high time tHIGH 0.6 4.0 Data clock low time tLOW 1.3 4.7 Start condition hold time tHD:STA 0.6 4.0 Start condition setup time tSU:STA 0.6 4.7 Data hold time tHD:DAT 0 0.9 0 3.45 Data setup time tSU:DAT 100 250 Stop condition setup time tSU:STO 0.6 4.0 BUS release time tBUF 1.3 4.7 Noise removal valid period tI 0 50 0 50 *6 Unit kHz μs μs μs μs μs ns μs μs ns Standard-mode and Fast-mode 2-wire serial interface devices must be able to transmit or receive at that speed. The maximum bit transfer rates of 100 kbit/s for Standard-mode devices and 400 kbit/s for Fast-mode devices This transfer rates is provided the maximum transfer rates, for example it is able to drive 100 kbit/s of clocks with Fast-mode. ●2 wire Serial Interface Data timing tR tHIGH tF SCL SCL tSU : DAT tHD : STA tHD : DAT tLOW tSU : STA tSU : STO tHD : STA SDA SDA tBUF STOP BIT START BIT Fig.4 Serial data timing Fig.5 Start stop bit timing ●Recommend to power supply turning on operation timing Parameter Symbol PS input H voltage set-up time 2-wire serial interface input data set-up time TPS tI2C Recommendation limit Min. Typ. Max. 1 1 - - Unit us us ●Sequence of data input timing to power supply VCC,VM 50% PS 50% 2-wire serial input 50% tPS www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. Serial data tI2C 5/19 2012.02 - Rev.A Technical Note BH6456GUL ●Driving wave setting ○ The structure of the driving wave for SIDM 1cycle=(ta+1)+brake1+tb+brake2 Ⅰ Ⅲ Ⅳ Ⅴ Ⅱ 1osc 1osc Ⅵ Ⅶ 1osc Ⅰ Ⅷ 1osc Ⅱ Ⅲ 1osc 1osc ① ② ta+1 tb brake1 Ⅱcw(ccw) Ⅰ.HiZ *1 *2 Ⅵ CCW(cw) Ⅲ HiZ *1 Ⅴ HiZ ta brake2 Ⅱ cw(ccw) Ⅷ Short brake *1 Ⅶ HiZ *1 Ⅰ HiZ *1 Ⅲ HiZ *1 *2 Ⅳ Short brake *1 *2 CW:Forward rotation CCW:Reverse rotation The state at A or B and C is HiZ. At mode=0,the output logic is a setting of a short brake. dir(address:OH,D2) ① ② Note 0 OUTA OUTB Move to the direction of Macro 1 OUTB OUTA Move to the direction of ∞ Driving wave is set by the 4 parameters of ta / brake1 / tb / brake2. osc period is set by the osc(Internal CLK basic cycle setting). ta brake1 tb brake2 : On section is ( ta +1-1) = ta counts for cw(ccw) state. : On section is (brake1 -1) count for short brake state. : On section is (tb1 -1) count for ccw(cw) state. : On section is (brake2 -1) count for short brake state. (Ex.) In case of setting 1 cycle = 10.67μs、ta = 1.27μs、brake1 = 0.13μs、tb = 1.93μs, brake2 = 7.07μs. osc[2:0]( = Basic cycle setting ) = 3’b000( = Basic cycle = 66.67ns)、and ta / brake1 / tb / brake2 setting below; ta[7:0] = 0x13 brake1[7:0] = 0x03 tb[7:0] = 0x1E brake2[7:0] = 0x6B www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. = 19 count = 3 count = 30 count = 107 count → → → → 6/19 ON section = 19+1-1= 19 count ON section = 2 count ON section = 29 count ON section = 106 count 2012.02 - Rev.A Technical Note BH6456GUL ○ Driver function table Sequence setting mode = 0, osc = 0x0 or osc≠0x0 and HiZE = 0 Ⅰ Ⅱ Ⅲ Ⅳ Ⅴ Ⅵ Ⅶ Ⅷ output① HiZ H HiZ L L L L L output② L L L L HiZ H HiZ L mode HiZ CW HiZ Short brake HiZ CCW HiZ Short brake Ⅲ Ⅳ Ⅴ Ⅵ Ⅶ Ⅷ L mode = 0, osc≠0x0 and HiZE = 1 Ⅰ Ⅱ output① HiZ(66.67ns ec)→H H HiZ(66.67ns ec)→L L L L L output② L L L L HiZ(66.67ns ec)→H H HiZ mode HiZ(66.67ns ec)→CW CW HiZ(66.67ns ec)→Short brake Short brake HiZ(66.67ns ec)→CCW CCW HiZ Short brake *3 *3 L *3 The output ② status of Ⅶ dosen’t become from HiZ(66.67nsec) to Low.It is outputted HiZ. mode = 1, osc = 0x0 or osc≠0x0 and HiZE = 0 Ⅰ Ⅱ Ⅲ Ⅳ Ⅴ Ⅵ Ⅶ Ⅷ output① HiZ H HiZ HiZ L L L HiZ output② L L L HiZ HiZ H HiZ HiZ mode HiZ CW HiZ HiZ HiZ CCW HiZ HiZ Ⅲ Ⅳ Ⅴ Ⅵ Ⅶ Ⅷ mode = 1, osc≠0x0 and HiZE = 1 Ⅰ Ⅱ output① HiZ(66.67ns ec)→H H HiZ HiZ HiZ(66.67ns ec)→L L L output② L L L(66.67nsec )→HiZ HiZ HiZ(66.67ns ec)→H H HiZ HiZ mode HiZ(66.67ns ec)→CW CW HiZ HiZ HiZ(66.67ns ec)→CCW CCW HiZ HiZ *4 HiZ *4 The output ① status of Ⅶ dosen’t become from Low (66.67nsec) to HiZ .It is outputed Low. Truth table of Pa and Pb sequence pa pb OUTA OUTB Function mode OFF 0 0 Z Z STOP OFF 0 1 L H CCW OFF 1 0 H L CW OFF 1 1 L L Short brake ON X x - - Follow with the sequence www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 7/19 2012.02 - Rev.A Technical Note BH6456GUL ○Normal sequence Setting ta[7:0], brake1[7:0], tb[7:0], brake2[7:0], osc[2:0], HiZE, pa, pb, cntck[2:0], cnt[15:0] START = Hi → Lo while normal sequence, stop the sequence input data START Macro direction select ∞ direction select input data dir 1cycle OUTA OUTB output data EXT Internal Counter Count up Normal sequence set value Reset Count up Set output logic by Normal sequence Set output logic by pa , pb Move to ∞ to direction pa , pb Move to Macro direction (movement at set cycle) Reset In this case of short brake In the case of dir = Lo → Hi or Hi → Lo input while START=Hi,reset setting cycle,and start normal input data START Macro direction select ∞ direction select input data dir 1cycle OUTA OUTB output data EXT Internal Counter Count up set value Count up Normal sequence Normal sequence Move to macro direction Move to macro direction www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 8/19 set value see output logic by pa,pb 2012.02 - Rev.A Technical Note BH6456GUL ○Initial sequence Setting ta[7:0], brake1[7:0], tb[7:0], brake2[7:0], osc[2:0], HiZE, pa, pb, cntck[2:0], cnt[15:0], initB[2:0] Count stop Stop squence I2C input data START I2C input data init I2C output data initEXT Internal Counter reset Count up ∞ direction ∞ direction Setting value m Count up reset Normal sequence output set set output Count up reset ∞ dir output set output set Count up Count up ∞dir Normal sequence reset S et output logic by pa , pb(I2C) Initial sequence Move to ∞ direction Ignore dir(I2C) signal Move to macro direction ( setting initB[2:0] ) In the case of init(I2C)= Hi → Lo input while START(I2C)=Lo,initEXT=Hi → Lo output. In the case of initial(I2C)= Hi → Lo In the case of START(I2C)=Lo → Hi input while initial sequence, reset input while initial sequence, reset setting c ycle, and obey output setting cycle, and start normal logic by pa,pb(I2C). sequence. I2C input data START I2C input data init I2C output data initEXT Internal Counter Count up ∞ direction Setting value Count up reset Count up Normal sequence set output Normal sequence reset Count up ∞ direction Setting value reset Count up ∞direction m set output set output Set output logic by ∞ dir m pa,pb(I2C) Initial sequence Initial sequence At START(I2C)=Hi,it is initEXT(I2C)=Hi In the case of initEXT(I2C)=Hi regardless of the init(I2C) logic output at init(I2C)=Hi → Lo → Lo after initial sequence ends. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 9/19 2012.02 - Rev.A Technical Note BH6456GUL ○STOP sequence It changes to the next state after short brake 16.7μsec(typ) when the state transition shown in the following while the sequence is operating is done. ・ ・ ・ ・ ・ ・ ・ When Initial sequence ∞ direction ends When Initial sequence ends When normal sequence ends When dir bit signal reversing input is done at START bit = H When initial sequence cancels When normal sequence cancels When the normal sequence interrupts at an initial sequence ○ Output rise, fall waveform VM Output voltage Tfall A*0.1 0V Output current (VM-B)*0.9+B A A*0.9 Trise (VM-B)*0.1+B B 0mA A voltage = (VM voltage) – (Simulation DC output current at the only Resistance load) ×(Upper side output On-R) B voltage = (Simulation DC output current at the only Resistance load) × (Lower side output On-R) (Ex.) In case, the load is Resistance element = 2Ω, capacity element = 0.033μF 25°C, VM=3V, Upper side output On-R = 1Ω, Lower side output On-R = 1Ω A voltage = (VM voltage) – ((VM voltage)÷(Load (R)+ Total ON-R))×(Upper side ON-R) = 3V – (3V÷(2Ω+(1Ω+1Ω)))×1Ω = 2.25V B voltage = ((VM voltage)÷(Load (R)+ Total ON-R))×(Lower side ON-R) = (3V÷(2Ω+(1Ω+1Ω)))×1Ω = 0.75V Rise time = Trise (A×0.1 to A×0.9) = 100nsec(typ) Fall time = Tfall ((VM-B)×0.9+B to (VM-B)×0.1+B) = 100nsec(typ) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 10/19 2012.02 - Rev.A Technical Note BH6456GUL ●Register detail ○Register catalogue Bit BIT Name Function address : 0H D0 dir D1 MODE Mode of brake1/brake2 setting for initial/normal sequence Output direction setting while normal sequence D2 START Start setting for normal sequence D3 init Start setting for initial sequence D4 Initb[0] Macro direction setting while initial sequence[0] D5 Initb[1] Macro direction setting while initial sequence [1] D6 Initb[2] D7 HiZE Macro direction setting while initial sequence [2] Dead time setting (Lo: 1 cycle of osc[2:0] setting、Hi: Internal CLK 1 cycle (typ 66.67nsec) address : 1H D0 ta[0] Drive waveform setting[0] ta D1 ta[1] Drive waveform setting[1] ta D2 ta[2] Drive waveform setting[2] ta D3 ta[3] Drive waveform setting[3] ta D4 ta[4] Drive waveform setting[4] ta D5 ta[5] Drive waveform setting[5] ta D6 ta[6] Drive waveform setting[6] ta D7 ta[7] Drive waveform setting[7] ta address : 2H D0 brake1[0] Drive waveform setting[0] brake1 D1 brake1[1] Drive waveform setting[1] brake1 D2 brake1[2] Drive waveform setting[2] brake1 D3 brake1[3] Drive waveform setting[3] brake1 D4 brake1[4] Drive waveform setting[4] brake1 D5 brake1[5] Drive waveform setting[5] brake1 D6 brake1[6] Drive waveform setting[6] brake1 D7 brake1[7] Drive waveform setting[7] brake1 address : 3H D0 tb[0] Drive waveform setting[0] tb D1 tb[1] Drive waveform setting[1] tb D2 tb[2] Drive waveform setting[2] tb D3 tb[3] Drive waveform setting[3] tb D4 tb[4] Drive waveform setting[4] tb D5 tb[5] Drive waveform setting[5] tb D6 tb[6] Drive waveform setting[6] tb D7 tb[7] Drive waveform setting[7] tb www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 11/19 2012.02 - Rev.A Technical Note BH6456GUL Bit BIT Name address : 4H D0 brake2[0] D1 brake2[1] Function Drive waveform setting[0] brake2 Drive waveform setting[1] brake2 D2 brake2[2] Drive waveform setting[2] brake2 D3 brake2[3] Drive waveform setting[3] brake2 D4 brake2[4] Drive waveform setting[4] brake2 D5 brake2[5] Drive waveform setting[5] brake2 D6 brake2[6] Drive waveform setting[6] brake2 D7 brake2[7] Drive waveform setting[7] brake2 address : 5H D0 cnt[0] Drive time count setting[0] D1 cnt[1] Drive time count setting[1] D2 cnt[2] Drive time count setting[2] D3 cnt[3] Drive time count setting[3] D4 cnt[4] Drive time count setting[4] D5 cnt[5] Drive time count setting[5] D6 cnt[6] Drive time count setting[6] D7 cnt[7] Drive time count setting[7] cnt[8] Drive time count setting[8] D1 cnt[9] Drive time count setting[9] D2 cnt[10] Drive time count setting[10] D3 cnt[11] Drive time count setting[11] D4 cnt[12] Drive time count setting[12] D5 cnt[13] Drive time count setting[13] D6 cnt[14] Drive time count setting[14] D7 cnt[15] Drive time count setting[15] address : 6H D0 address : 7H D0 cntck[0] Drive time basic cycle setting[0] D1 cntck[1] Drive time basic cycle setting [1] D2 cntck[2] Drive time basic cycle setting [2] D3 osc[0] Internal CLK basic cycle setting[0] D4 osc[1] Internal CLK basic cycle setting [1] D5 osc[2] Internal CLK basic cycle setting [2] D6 pb Output logic setting b D7 pa Output logic setting a www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 12/19 2012.02 - Rev.A Technical Note BH6456GUL Bit BIT Name Function address : 8H D0 cntout[0] Drive time count value output[0] D1 cntout[1] Drive time count value output[1] D2 cntout[2] Drive time count value output[2] D3 cntout[3] Drive time count value output[3] D4 cntout[4] Drive time count value output[4] D5 cntout[5] Drive time count value output[5] D6 cntout[6] Drive time count value output[6] D7 cntout[7] Drive time count value output[7] address : 9H D0 cntout[8] Drive time count value output[8] D1 cntout[9] Drive time count value output[9] D2 cntout[10] Drive time count value output[10] D3 cntout[11] Drive time count value output[11] D4 cntout[12] Drive time count value output[12] D5 cntout[13] Drive time count value output[13] D6 cntout[14] Drive time count value output[14] D7 cntout[15] Drive time count value output[15] address : AH D0 initEXT D1 EXT D2 TEST D3 TEST D4 TEST D5 TEST D6 TEST D7 TEST After initial sequence, Hi output Hi output while normal sequence、Lo output at the stop mode address : BH D0 TEST D1 TEST D2 TEST D3 TEST D4 TEST D5 TEST D6 TEST D7 TEST address : CH D0 TEST D1 TEST D2 TEST D3 TEST D4 TEST D5 TEST D6 TEST D7 TEST www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 13/19 2012.02 - Rev.A Technical Note BH6456GUL ○Internal CLK basic cycle setting [osc] Internal CLK 1 cycle = 66.67nsec(typ) Internal Magnificati CLK cycle on number Magnificati on Internal CLK cycle number Magnificati on Internal CLK cycle number Magnificati on Internal CLK cycle number 3’b000 1 3’b010 3 3’b100 5 3’b110 7 3’b001 2 3’b011 4 3’b101 6 3’b111 8 ○Drive waveform [ta, brake1, tb, brake2] Osc Time setting Cycle Osc Time setting number Cycle Osc Time setting number Cycle Osc Time setting number Cycle number 8’b0000_0000 1 8’b0100_0000 64 8’b1000_0000 128 8’b1100_0000 192 8’b0000_0001 1 8’b0100_0001 65 8’b1000_0001 129 8’b1100_0001 193 8’b0000_0010 2 8’b0100_0010 66 8’b1000_0010 130 8’b1100_0010 194 8’b0000_0011 3 8’b0100_0011 67 8’b1000_0011 131 8’b1100_0011 195 … … … … … … … … 8’b0011_1101 61 8’b0111_1101 125 8’b1101_1101 189 8’b1111_1101 253 8’b0011_1110 62 8’b0111_1110 126 8’b1101_1110 190 8’b1111_1110 254 8’b0011_1111 63 8’b0111_1111 127 8’b1101_1111 191 8’b1111_1111 255 ○Drive time basic cycle setting [cntck] Magnificati Cycle Magnificati Cycle Magnificati Cycle Magnificati Cycle on number on number on number on number 3’b000 1 3’b010 4 3’b100 15 3’b110 64 3’b001 2 3’b011 8 3’b101 32 3’b111 127 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 14/19 2012.02 - Rev.A Technical Note BH6456GUL ○Macro direction setting while initial sequence [initB] ( (Total count number) = (cntck)×(initB)) count Cntck cycle count Cntck cycle count Cntck cycle count Cntck cycle setting number setting number setting number setting number 3’b000 1 3’b010 4 3’b100 15 3’b110 64 3’b001 2 3’b011 8 3’b101 32 3’b111 127 ○Drive time count setting [cnt] ( (Total Drive count number) = (cntck)×(cnt)) count setting Cntck cycle count setting number (Ex.) Cntck cycle count Cntck cycle count Cntck number setting number setting cycle number 16’h0000 1 16’h4000 16384 16’h8000 32768 16’hC000 49152 16’h0001 1 16’h4001 16385 16’h8001 32769 16’hC001 49153 16’h0002 2 16’h4002 16386 16’h8002 32770 16’hC002 49154 16’h0003 3 16’h4003 16387 16’h8003 32771 16’hC003 49155 … … … … … … … … 16’h3FFD 16381 16’h7FFD 32765 16’hBFFD 49149 16’hFFFD 65533 16’h3FFE 16382 16’h7FFE 32766 16’hBFFE 49150 16’hFFFE 65534 16’h3FFF 16383 16’h7FFF 32767 16’hBFFF 49151 16’hFFFF 65535 In case, setting cntck[2:0] = 3’b001, cnt[15:0] = 16’h8000 cntck×cnt = 2×32768 = 65536count = 851.968msec (In case of setting a cycle = 13usec) www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 15/19 2012.02 - Rev.A Technical Note BH6456GUL ●I/O Peripheral Circuit 1) Pull up resistance of SDA terminal SDA is NMOS open drain, so requires pull up resistance. As for this resistance value (RPU), select an appropriate value to this resistance value from micro-controller VIL, IL, and VOL – IOL characteristics of this IC. If RPU is large, action frequency is limited. The smaller the RPU, the larger the consumption current at action. 2) Maximum value of RPU The maximum value of RPU is determined by the following factors. (Ⅰ)SDA rise time to be determined by the capacity (CBUS) of BUS line of RPU and SDA should be tR or below. And AC timing should be satisfied even when SDA rise time is late. (Ⅱ)The BUS electric potential V1 to be determined by input leak total (IL) of device connected to BUS at output of “H” to SDA BUS and RPU should sufficiently secure the input “H” level (VIH) of micro-controller and driver including recommended noise margin 0.2VCC. Micro-controller BR24LX VCC - IL×RPU - 0.2×VCC ≧ VIH RPU 0.8×VCC - VIH ∴RPU≦ SDA terminal V1 ・・・・・① IL IL Example.) VCC = 3V, IL=10μA, VIH = 0.7×VCC from ① RPU≦ 0.8×3 - 0.7×3 -6 10×10 = 30kΩ IL Bus line capacity CBUS 3) Minimum value of RPU Fig.6 2 wire Serial Interface 1 The minimum value of RPU is determined by the following factors. (Ⅰ)When IC outputs LOW, it should be satisfied that VOLMAX = 0.4V, and IOLMAX = 3mA. VCC-VOL RPU ≦ IOL ・・・・・② (Ⅱ)VOLMAX = 0.4V should secure the input “L” level (VIL) of micro-controller and driver including recommended noise margin 0.1VCC. VOLMAX ≦ VIL-0.1×VCC Ex.) VCC = 3V, VOL=0.4V, IOL = 3mA, micro-controller, driver VIL = 0.3×VCC 3 - 0.4 = 867[Ω] 3×10-3 And VOL = 0.4[V], VIL = 0.3×3 = 0.9[V] Therefore, the condition (Ⅱ) is satisfied. RPU≧ 4) Pull up resistance of SCL terminal WHEN SCL control is made at CMOS output port, there is no need but in the case there is timing where SCL becomes “Hi-Z”, add a pull up resistance. As for the pull up resistance, one of several kΩ to several ten kΩ is recommended in consideration of drive performance of output port of micro-controller. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 16/19 2012.02 - Rev.A Technical Note BH6456GUL ●Cautions on Micro-controller Connection 1) Rs In the 2 wire Serial Interface, it is recommended that SDA port is of open drain input/output. However, when to use CMOS input / output of tri state to SDA port, inset a series resistance Rs between the pull up resistance Rpu and the SDA terminal of driver. This controls over current that occurs when PMOS of the micro-controller and NMOS of driver are turned ON simultaneously. Rs also plays the role of protection of SDA terminal against surge. Therefore, even when SDA port is open drain input/output, Rs can be used. ACK RPU SCL Rs H output of micro-controller SDA Driver Micro-controller L output of Driver Over current flows to SDA line by H output of micro-controller and L output of Driver Fig.8 Input / Output collision timing Fig.7 2 wire Serial Interface 2 2) Maximum value of Rs The maximum value of Rs is determined by the following relations. (Ⅰ)SDA rise time to be determined by the capacity (Cb) of BUS line of Rpu and SDA should be tR or below. And AC timing should be satisfied even when SDA rise time is late. (Ⅱ)The BUS electric potential V2 to be determined by Rpu and Rs at the moment when driver outputs “L” to SDA BUS should sufficiently secure the input “L” level (VIL) of micro-controller including recommended noise margin 0.1VCC. VCC RPU (VCC-VOL)×RS RPU+RS V2 Rs VOL IOL ∴Rs ≦ Bus line capacity Cb +VOL+0.1×VCC ≦ VIL VIL-VOL-0.1×VCC 1.1×VCC-VIL ×RPU ・・・・③ Example) When VCC = 3V, VIL = 0.3×VCC, VOL = 0.4V, RPU = 20kΩ, from ③ VIL driver micro-controller Fig.9 2 wire Serial Interface 3 Rs ≦ 0.3×3 - 0.4 - 0.1×3 1.1×3 - 0.3×3 ×20×103 = 1.67[kΩ] 3) Minimum value of RS The minimum value of Rs is determined by over current at BUS collision. When over current flows, noises in power source line, and instantaneous power failure of power source may occur. When allowable over current is defined as I, the following relation must be satisfied. Determine the allowable current in consideration of impedance of power source line in set and so forth. Set the over current to driver 10mA or below. VCC RS ≦ I ・・・・④ RPU Exampre) When VCC=3V, I=10mA, From ④ Rs≧ 3 10×10-3 RS =300[Ω] L output Over current I H output Microcontroller Driver Fig.10 2 wire Serial Interface 4 www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 17/19 2012.02 - Rev.A Technical Note BH6456GUL ●Operation Notes 1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings, such as the applied voltage (VCC) or operating temperature range (Topr), may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure, such as a fuse, should be implemented when using the IC at times where the absolute maximum ratings may be exceeded. 2) Storage temperature range (Tstq) As long as the IC is kept within this range, there should be no problems in the IC’s performance. Conversely, extreme temperature changes may result in poor IC performance, even if the changes are within the above range. 3) Power supply and wiring Be sure to connect the power terminals outside the IC. Do not leave them open. Because a return current is generated by a counter electromotive force of the motor, take necessary measures such as putting a Capacitor between the power source and the ground as a passageway for the regenerative current. Be sure to connect a Capacitor of proper capacitance (0.1μF to 10μF) between the power source and the ground at the foot of the IC, and ensure that there is no problem in properties of electrolytic Capacitors such as decrease in capacitance at low temperatures. When the connected power source does not have enough current absorbing capability, there is a possibility that the voltage of the power source line increases by the regenerative current an exceeds the absolute maximum rating of this product and the peripheral circuits. Therefore, be sure to take physical safety measures such as putting a zener diode for a voltage clamp between the power source an the ground. 4) Ground terminal and wiring The potential at GND terminals should be made the lowest under any operating conditions. Ensure that there are no terminals where the potentials are below the potential at GND terminals, including the transient phenomena. The motor ground terminals RNF and PGND, and the small signal ground terminal GND are not interconnected with one another inside the IC. It is recommended that you should isolate the large-current RNF pattern and PGND pattern from the small-signal GND pattern, and should establish a one-point grounding at a reference point of the set, to avoid fluctuation of small-signal G voltages caused by voltage changes due to pattern wire resistances and large currents. Also prevent the voltage variation of the ground wiring patterns of external components. Use short and thick power source and ground wirings to ensure low impedance. 5) Thermal design Use a proper thermal design that allows for a sufficient margin of the power dissipation (Pd) at actual operating conditions. 6) Pin short and wrong direction assembly of the device Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if positive and ground power supply terminals are reversed. The IC may also be damaged if pins are shorted together or are shorted to other circuit’s power lines. 7) Avoiding strong magnetic field Malfunction may occur if the IC is used around a strong magnetic field. 8) ASO Ensure that the output transistors of the motor driver are not driven under excess conditions of the absolute maximum ratings and ASO. 9) TSD (Thermal Shut Down) circuit If the junction temperature (Tjmax) reaches 150°C, the TSD circuit will operate, and the coil output circuit of the motor will open. There is a temperature hysterics of approximately 25°C. The TSD circuit is designed only to shut off the IC in order to prevent runaway thermal operating. It is not designed to protect the IC or guarantee its operation. The performance of the IC’s characteristics is not guaranteed and it is recommended that the device is replaced after the TSD is activated. www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 18/19 2012.02 - Rev.A Technical Note BH6456GUL 10) Regarding the input pin of the IC + This monolithic IC contains P isolation and P substrate layers between adjacent elements to keep them isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor. For example, the relation between each potential is as follows: When GND > Pin A, the P-N junction operates as a parasitic diode. When GND > Pin B, the P-N junction operates as a parasitic diode and transistor. Parasitic elements can occur inevitably in the structure of the IC. The operation of parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic elements operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used. Resistor Transistor (NPN) Pin A Pin B Pin B B C E Pin A N P + B N P P N + N Parasitic element P substrate GND Parasitic element P + N N P P C + N E P substrate Parasitic elements GND GND Parasitic elements Other adjacent elements GND Fig.11 Example of Simple IC Architecture ●Ordering Information B H 6 4 5 Part Number www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. 6 G U L Package VCSP50L1 E2 Packaging and forming specification E2: Embossed tape and reel 19/19 2012.02 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2012 ROHM Co., Ltd. All rights reserved. R1120A