Revised August 2000 100360 Low Power Dual Parity Checker/Generator General Description Features The 100360 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs (Ia or Ib) has the shorter through-put delay and is therefore preferred as the expansion input for generating parity for 16 or more bits. The 100360 also has a Compare (C) output which allows the circuit to compare two 8-bit words. The C output is LOW when the two words match, bit for bit. All inputs have 50 kΩ pull-down resistors. ■ Lower power than 100160 ■ 2000V ESD protection ■ Pin/function compatible with 100160 ■ Voltage compensated operating range = −4.2V to −5.7V ■ Min to Max propagation delay 35% tighter than 100160 ■ Available to industrial grade temperature range Ordering Code: Order Number Package Number 100360PC N24E Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 100360QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100360QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP Pin Descriptions Pin Names Description Ia, Ib, Ina, Inb Data Inputs Za, Zb Parity Odd Outputs C Compare Output Truth Table (Each Half) 28-Pin PLCC Sum of Output HIGH Inputs Z Even HIGH Odd LOW Comparator Function C = (I0a ⊕ I1a) + (I2a ⊕ I3a) + (I4a ⊕ I5a) + (I6a ⊕ I7a) + (I0b ⊕ I1b) + (I2b ⊕ I3b) + (I4b ⊕ I5b) + (I6b ⊕ I7b) © 2000 Fairchild Semiconductor Corporation DS010611 www.fairchildsemi.com 100360 Low Power Dual Parity Checker/Generator March 1998 100360 Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions −65°C to +150°C Storage Temperature (TSTG) +150°C Maximum Junction Temperature (TJ) Case Temperature (TC) −7.0V to +0.5V VEE Pin Potential to Ground Pin Output Current (DC Output HIGH) −50 mA ESD (Note 2) ≥2000V 0°C to +85°C Commercial VEE to +0.5V Input Voltage (DC) 100360 Absolute Maximum Ratings(Note 1) −40°C to +85°C Industrial −5.7V to −4.2V Supply Voltage (VEE) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version DC Electrical Characteristics (Note 3) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Min Typ Max VOH Symbol Output HIGH Voltage Parameter −1025 −955 −870 VOL Output LOW Voltage −1830 −1705 −1620 VOHC Output HIGH Voltage −1035 VOLC Output LOW Voltage VIH Input HIGH Voltage −1165 −870 mV Guaranteed HIGH Signal VIL Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal IIL Input LOW Current 0.50 IIH Input HIGH Current −1610 Units mV mV Conditions VIN = VIH (Max) Loading with or VIL (Min) 50Ω to −2.0V VIN = VIH (Min) Loading with or VIL (Max) 50Ω to −2.0V for All Inputs for All Inputs IEE Ia, Ib 340 Ina, Inb 240 Power Supply Current −100 −50 µA VIN = VIL (Min) µA VIN = VIH (Max) mA Inputs OPEN Note 3: The specified limits represent the ''worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. DIP AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol Parameter tPLH Propagation Delay tPHL Ina, Inb to Za, Zb tPLH Propagation Delay tPHL Ina, Inb to C tPLH Propagation Delay tPHL Ia, Ib to Za, Zb tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = 0°C TC = +25°C TC = +85°C Units Min Max Min Max Min Max 1.10 2.75 1.10 2.75 1.10 2.75 ns 1.10 2.80 1.10 2.80 1.10 2.80 ns 0.50 1.20 0.60 1.30 0.60 1.30 ns 0.35 1.10 0.35 1.10 0.35 1.10 ns 3 Conditions Figures 1, 2 www.fairchildsemi.com 100360 Commercial Version (Continued) PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol TC = 0°C Parameter tPLH Propagation Delay tPHL Ina, Inb to Za, Zb tPLH Propagation Delay tPHL Ina, Inb to C tPLH Propagation Delay tPHL Ia, Ib to Za, Zb tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = +25°C TC = +85°C Units Min Max Min Max Min Max 1.10 2.75 1.10 2.75 1.10 2.75 ns 1.10 2.80 1.10 2.80 1.10 2.80 ns 0.50 1.20 0.60 1.30 0.60 1.30 ns 0.35 1.10 0.35 1.10 0.35 1.10 ns Conditions Figures 1, 2 Industrial Version PLCC DC Electrical Characteristics (Note 4) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C Symbol TC = −40°C Parameter Min TC = 0°C to +85°C Max Min Max Units Conditions VOH Output HIGH Voltage −1085 −870 −1025 −870 mV VIN =VIH (Max) Loading with VOL Output LOW Voltage −1830 −1575 −1830 −1620 mV or VIL (Min) 50Ω to −2.0V VOHC Output HIGH Voltage −1095 mV VIN = VIH (Min) Loading with VOLC Output LOW Voltage −1610 mV or VIL (Max) 50Ω to −2.0V VIH Input HIGH Voltage −1170 −870 −1165 −870 mV Guaranteed HIGH Signal VIL Input LOW Voltage −1830 −1480 −1830 −1475 mV Guaranteed LOW Signal IIL Input LOW Current 0.50 IIH Input HIGH Current −1035 −1565 for All Inputs for All Inputs IEE 0.50 Ia , Ib 340 340 Ina, Inb 240 240 Power Supply Current −100 −50 −100 −50 µA VIN = VIL (Min) µA VIN = VIH (Max) mA Inputs OPEN Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol Parameter tPLH Propagation Delay tPHL Ina, Inb to Za, Zb tPLH Propagation Delay tPHL Ina, Inb to C tPLH Propagation Delay tPHL Ia, Ib to Za, Zb tTLH Transition Time tTHL 20% to 80%, 80% to 20% www.fairchildsemi.com TC = −40°C TC = +25°C TC = +85°C Units Min Max Min Max Min Max 1.00 2.75 1.10 2.75 1.10 2.75 ns 1.00 2.80 1.10 2.80 1.10 2.80 ns 0.50 1.20 0.60 1.30 0.60 1.30 ns 0.35 1.10 0.35 1.10 0.35 1.10 ns Conditions Figures 1, 2 4 100360 Test Circuitry Notes: VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF FIGURE 1. AC Test Circuit Switching Waveforms FIGURE 2. Propagation Delay and Transition Times 5 www.fairchildsemi.com 100360 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E www.fairchildsemi.com 6 100360 Low Power Dual Parity Checker/Generator Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com